From 7f1e76370b717be264f0af54719182a96fb8f36d Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 17 Jan 2012 11:20:23 -0600 Subject: sh: intc: unify evt2irq/irq2evt macros for sh and arm Move evt2irq and irq2evt macros definitions out of sh and arm includes into a common location. Signed-off-by: Rob Herring --- arch/sh/include/asm/irq.h | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index 45d08b6..2a62017 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -21,17 +21,6 @@ #define NO_IRQ_IGNORE ((unsigned int)-1) /* - * Convert back and forth between INTEVT and IRQ values. - */ -#ifdef CONFIG_CPU_HAS_INTEVT -#define evt2irq(evt) (((evt) >> 5) - 16) -#define irq2evt(irq) (((irq) + 16) << 5) -#else -#define evt2irq(evt) (evt) -#define irq2evt(irq) (irq) -#endif - -/* * Simple Mask Register Support */ extern void make_maskreg_irq(unsigned int irq); -- cgit v1.1 From 81620bb7acee40dda4dbfdd061cd22c373529372 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Tue, 7 Feb 2012 21:09:01 -0800 Subject: sh: Remove unnecessary posix_types.h type overrides Remove type overrides in for the sh architecture that are no longer necessary. Signed-off-by: H. Peter Anvin Link: http://lkml.kernel.org/r/1328677745-20121-18-git-send-email-hpa@zytor.com Cc: Paul Mundt --- arch/sh/include/asm/posix_types_32.h | 5 ----- arch/sh/include/asm/posix_types_64.h | 4 ---- 2 files changed, 9 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/posix_types_32.h b/arch/sh/include/asm/posix_types_32.h index 6a9ceaa..abda584 100644 --- a/arch/sh/include/asm/posix_types_32.h +++ b/arch/sh/include/asm/posix_types_32.h @@ -12,11 +12,6 @@ typedef unsigned short __kernel_uid_t; typedef unsigned short __kernel_gid_t; #define __kernel_gid_t __kernel_gid_t -typedef unsigned int __kernel_uid32_t; -#define __kernel_uid32_t __kernel_uid32_t -typedef unsigned int __kernel_gid32_t; -#define __kernel_gid32_t __kernel_gid32_t - typedef unsigned short __kernel_old_uid_t; #define __kernel_old_uid_t __kernel_old_uid_t typedef unsigned short __kernel_old_gid_t; diff --git a/arch/sh/include/asm/posix_types_64.h b/arch/sh/include/asm/posix_types_64.h index 8cd1148..fcda07b 100644 --- a/arch/sh/include/asm/posix_types_64.h +++ b/arch/sh/include/asm/posix_types_64.h @@ -17,10 +17,6 @@ typedef int __kernel_ssize_t; #define __kernel_ssize_t __kernel_ssize_t typedef int __kernel_ptrdiff_t; #define __kernel_ptrdiff_t __kernel_ptrdiff_t -typedef unsigned int __kernel_uid32_t; -#define __kernel_uid32_t __kernel_uid32_t -typedef unsigned int __kernel_gid32_t; -#define __kernel_gid32_t __kernel_gid32_t typedef unsigned short __kernel_old_uid_t; #define __kernel_old_uid_t __kernel_old_uid_t -- cgit v1.1 From 344dd2f4c2bf6d80b54f78012532debeb22c66fd Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 6 Mar 2012 14:07:09 +0900 Subject: sh/next: Fix build fail by asm/system.h in asm/bitops.h Other files are not done include definitely by asm/system.h made include in asm/bitops.h. This patch remove asm/system.h from asm/bitops.h. ----- LANG=C make ARCH=sh CROSS_COMPILE=sh4-linux-gnu- CHK include/linux/version.h CHK include/generated/utsrelease.h make[1]: `include/generated/machtypes.h' is up to date. CC arch/sh/kernel/asm-offsets.s In file included from include/asm-generic/getorder.h:7, from /home/iwamatsu/work/kernel/sh-2.6-devel/arch/sh/include/asm/page.h:187, from /home/iwamatsu/work/kernel/sh-2.6-devel/arch/sh/include/asm/mmu.h:38, from /home/iwamatsu/work/kernel/sh-2.6-devel/arch/sh/include/asm/system_32.h:5, from /home/iwamatsu/work/kernel/sh-2.6-devel/arch/sh/include/asm/system.h:179, from /home/iwamatsu/work/kernel/sh-2.6-devel/arch/sh/include/asm/bitops.h:10, from include/linux/bitops.h:22, from include/linux/thread_info.h:52, from include/linux/preempt.h:9, from include/linux/spinlock.h:50, from include/linux/mmzone.h:7, from include/linux/gfp.h:4, from include/linux/mm.h:8, from arch/sh/kernel/asm-offsets.c:13: include/linux/log2.h: In function '__ilog2_u32': include/linux/log2.h:34: error: implicit declaration of function 'fls' include/linux/log2.h: In function '__ilog2_u64': include/linux/log2.h:42: error: implicit declaration of function 'fls64' include/linux/log2.h: In function '__roundup_pow_of_two': include/linux/log2.h:63: error: implicit declaration of function 'fls_long' ----- Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- arch/sh/include/asm/bitops.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 90fa3e4..ea8706d 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -7,7 +7,6 @@ #error only can be included directly #endif -#include /* For __swab32 */ #include -- cgit v1.1 From 9cdb81c7fa5b429389b84978088a34f935238386 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 16 Mar 2012 11:31:25 +0900 Subject: sh: dma: Collect up CHCR of SH7723 and SH7730 CHCR of SH7723 and SH7730 is constitution same as SH7724. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Simon Horman Signed-off-by: Paul Mundt --- arch/sh/include/cpu-sh4/cpu/dma-register.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h index 18fa80a..1af4a95 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma-register.h +++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h @@ -16,14 +16,15 @@ #define DMAOR_INIT DMAOR_DME -#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \ - defined(CONFIG_CPU_SUBTYPE_SH7730) +#if defined(CONFIG_CPU_SUBTYPE_SH7343) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0 #define CHCR_TS_HIGH_SHIFT 0 #elif defined(CONFIG_CPU_SUBTYPE_SH7722) || \ + defined(CONFIG_CPU_SUBTYPE_SH7723) || \ defined(CONFIG_CPU_SUBTYPE_SH7724) || \ + defined(CONFIG_CPU_SUBTYPE_SH7730) || \ defined(CONFIG_CPU_SUBTYPE_SH7786) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3 @@ -35,11 +36,6 @@ #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0 #define CHCR_TS_HIGH_SHIFT 0 -#elif defined(CONFIG_CPU_SUBTYPE_SH7723) -#define CHCR_TS_LOW_MASK 0x00000018 -#define CHCR_TS_LOW_SHIFT 3 -#define CHCR_TS_HIGH_MASK 0 -#define CHCR_TS_HIGH_SHIFT 0 #elif defined(CONFIG_CPU_SUBTYPE_SH7757) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3 -- cgit v1.1 From ffe0e190f67f23ecf57aae68888860e69ac0d52e Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 16 Mar 2012 11:31:26 +0900 Subject: sh: dma: Collect up CHCR of SH7763, SH7764, SH7780 and SH7785 CHCR of SH7763, SH7764, SH7780 and SH7785 is constitution same as SH7757. Signed-off-by: Nobuhiro Iwamatsu Reviewed-by: Simon Horman Signed-off-by: Paul Mundt --- arch/sh/include/cpu-sh4/cpu/dma-register.h | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h index 1af4a95..02788b6 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma-register.h +++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h @@ -30,27 +30,15 @@ #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0x00300000 #define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ -#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ - defined(CONFIG_CPU_SUBTYPE_SH7764) -#define CHCR_TS_LOW_MASK 0x00000018 -#define CHCR_TS_LOW_SHIFT 3 -#define CHCR_TS_HIGH_MASK 0 -#define CHCR_TS_HIGH_SHIFT 0 -#elif defined(CONFIG_CPU_SUBTYPE_SH7757) +#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \ + defined(CONFIG_CPU_SUBTYPE_SH7763) || \ + defined(CONFIG_CPU_SUBTYPE_SH7764) || \ + defined(CONFIG_CPU_SUBTYPE_SH7780) || \ + defined(CONFIG_CPU_SUBTYPE_SH7785) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0x00100000 #define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ -#elif defined(CONFIG_CPU_SUBTYPE_SH7780) -#define CHCR_TS_LOW_MASK 0x00000018 -#define CHCR_TS_LOW_SHIFT 3 -#define CHCR_TS_HIGH_MASK 0 -#define CHCR_TS_HIGH_SHIFT 0 -#else /* SH7785 */ -#define CHCR_TS_LOW_MASK 0x00000018 -#define CHCR_TS_LOW_SHIFT 3 -#define CHCR_TS_HIGH_MASK 0 -#define CHCR_TS_HIGH_SHIFT 0 #endif /* Transmit sizes and respective CHCR register values */ -- cgit v1.1 From 9b2ffa8d048656baf7f5e764d2586ba59927a25b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 28 Mar 2012 16:20:20 +0900 Subject: sh: Avoid exporting unimplemented syscalls. Now that userspace is making use of kernel-provided sanitized headers for working out supported interfaces, we need to be a bit more diligent with matching the syscall definitions with their actual wiring/support state. In theory it shouldn't hurt anything since sys_ni_syscall will ultimately do the right thing, but there's also not much need to lie about legacy x86 syscalls that we've never supported. This tightens things up a bit for uClibc at least. Suggested-by: Carmelo Amoroso Acked-by: Mike Frysinger Signed-off-by: Paul Mundt --- arch/sh/include/asm/unistd_32.h | 57 +++++++++++++++++----------------- arch/sh/include/asm/unistd_64.h | 68 ++++++++++++++++++++--------------------- 2 files changed, 63 insertions(+), 62 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h index 152b862..2b83a49 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/asm/unistd_32.h @@ -26,7 +26,7 @@ #define __NR_mknod 14 #define __NR_chmod 15 #define __NR_lchown 16 -#define __NR_break 17 + /* 17 was sys_break */ #define __NR_oldstat 18 #define __NR_lseek 19 #define __NR_getpid 20 @@ -40,11 +40,11 @@ #define __NR_oldfstat 28 #define __NR_pause 29 #define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 + /* 31 was sys_stty */ + /* 32 was sys_gtty */ #define __NR_access 33 #define __NR_nice 34 -#define __NR_ftime 35 + /* 35 was sys_ftime */ #define __NR_sync 36 #define __NR_kill 37 #define __NR_rename 38 @@ -53,7 +53,7 @@ #define __NR_dup 41 #define __NR_pipe 42 #define __NR_times 43 -#define __NR_prof 44 + /* 44 was sys_prof */ #define __NR_brk 45 #define __NR_setgid 46 #define __NR_getgid 47 @@ -62,13 +62,13 @@ #define __NR_getegid 50 #define __NR_acct 51 #define __NR_umount2 52 -#define __NR_lock 53 + /* 53 was sys_lock */ #define __NR_ioctl 54 #define __NR_fcntl 55 -#define __NR_mpx 56 + /* 56 was sys_mpx */ #define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 + /* 58 was sys_ulimit */ + /* 59 was sys_olduname */ #define __NR_umask 60 #define __NR_chroot 61 #define __NR_ustat 62 @@ -91,7 +91,7 @@ #define __NR_settimeofday 79 #define __NR_getgroups 80 #define __NR_setgroups 81 -#define __NR_select 82 + /* 82 was sys_oldselect */ #define __NR_symlink 83 #define __NR_oldlstat 84 #define __NR_readlink 85 @@ -107,10 +107,10 @@ #define __NR_fchown 95 #define __NR_getpriority 96 #define __NR_setpriority 97 -#define __NR_profil 98 + /* 98 was sys_profil */ #define __NR_statfs 99 #define __NR_fstatfs 100 -#define __NR_ioperm 101 + /* 101 was sys_ioperm */ #define __NR_socketcall 102 #define __NR_syslog 103 #define __NR_setitimer 104 @@ -119,10 +119,10 @@ #define __NR_lstat 107 #define __NR_fstat 108 #define __NR_olduname 109 -#define __NR_iopl 110 + /* 110 was sys_iopl */ #define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86old 113 + /* 112 was sys_idle */ + /* 113 was sys_vm86old */ #define __NR_wait4 114 #define __NR_swapoff 115 #define __NR_sysinfo 116 @@ -136,17 +136,17 @@ #define __NR_adjtimex 124 #define __NR_mprotect 125 #define __NR_sigprocmask 126 -#define __NR_create_module 127 + /* 127 was sys_create_module */ #define __NR_init_module 128 #define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 + /* 130 was sys_get_kernel_syms */ #define __NR_quotactl 131 #define __NR_getpgid 132 #define __NR_fchdir 133 #define __NR_bdflush 134 #define __NR_sysfs 135 #define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ + /* 137 was sys_afs_syscall */ #define __NR_setfsuid 138 #define __NR_setfsgid 139 #define __NR__llseek 140 @@ -175,8 +175,8 @@ #define __NR_mremap 163 #define __NR_setresuid 164 #define __NR_getresuid 165 -#define __NR_vm86 166 -#define __NR_query_module 167 + /* 166 was sys_vm86 */ + /* 167 was sys_query_module */ #define __NR_poll 168 #define __NR_nfsservctl 169 #define __NR_setresgid 170 @@ -197,8 +197,8 @@ #define __NR_capset 185 #define __NR_sigaltstack 186 #define __NR_sendfile 187 -#define __NR_streams1 188 /* some people actually want it */ -#define __NR_streams2 189 /* some people actually want it */ + /* 188 reserved for sys_getpmsg */ + /* 189 reserved for sys_putpmsg */ #define __NR_vfork 190 #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ #define __NR_mmap2 192 @@ -231,7 +231,8 @@ #define __NR_madvise 219 #define __NR_getdents64 220 #define __NR_fcntl64 221 -/* 223 is unused */ + /* 222 is reserved for tux */ + /* 223 is unused */ #define __NR_gettid 224 #define __NR_readahead 225 #define __NR_setxattr 226 @@ -251,15 +252,15 @@ #define __NR_futex 240 #define __NR_sched_setaffinity 241 #define __NR_sched_getaffinity 242 -#define __NR_set_thread_area 243 -#define __NR_get_thread_area 244 + /* 243 is reserved for set_thread_area */ + /* 244 is reserved for get_thread_area */ #define __NR_io_setup 245 #define __NR_io_destroy 246 #define __NR_io_getevents 247 #define __NR_io_submit 248 #define __NR_io_cancel 249 #define __NR_fadvise64 250 - + /* 251 is unused */ #define __NR_exit_group 252 #define __NR_lookup_dcookie 253 #define __NR_epoll_create 254 @@ -281,7 +282,7 @@ #define __NR_tgkill 270 #define __NR_utimes 271 #define __NR_fadvise64_64 272 -#define __NR_vserver 273 + /* 273 is reserved for vserver */ #define __NR_mbind 274 #define __NR_get_mempolicy 275 #define __NR_set_mempolicy 276 @@ -301,7 +302,7 @@ #define __NR_inotify_init 290 #define __NR_inotify_add_watch 291 #define __NR_inotify_rm_watch 292 -/* 293 is unused */ + /* 293 is unused */ #define __NR_migrate_pages 294 #define __NR_openat 295 #define __NR_mkdirat 296 diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h index c330c23..d6ef1af 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/asm/unistd_64.h @@ -31,7 +31,7 @@ #define __NR_mknod 14 #define __NR_chmod 15 #define __NR_lchown 16 -#define __NR_break 17 + /* 17 was sys_break */ #define __NR_oldstat 18 #define __NR_lseek 19 #define __NR_getpid 20 @@ -45,11 +45,11 @@ #define __NR_oldfstat 28 #define __NR_pause 29 #define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 + /* 31 was sys_stty */ + /* 32 was sys_gtty */ #define __NR_access 33 #define __NR_nice 34 -#define __NR_ftime 35 + /* 35 was sys_ftime */ #define __NR_sync 36 #define __NR_kill 37 #define __NR_rename 38 @@ -58,7 +58,7 @@ #define __NR_dup 41 #define __NR_pipe 42 #define __NR_times 43 -#define __NR_prof 44 + /* 44 was sys_prof */ #define __NR_brk 45 #define __NR_setgid 46 #define __NR_getgid 47 @@ -67,13 +67,13 @@ #define __NR_getegid 50 #define __NR_acct 51 #define __NR_umount2 52 -#define __NR_lock 53 + /* 53 was sys_lock */ #define __NR_ioctl 54 #define __NR_fcntl 55 -#define __NR_mpx 56 + /* 56 was sys_mpx */ #define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 + /* 58 was sys_ulimit */ + /* 59 was sys_olduname */ #define __NR_umask 60 #define __NR_chroot 61 #define __NR_ustat 62 @@ -96,7 +96,7 @@ #define __NR_settimeofday 79 #define __NR_getgroups 80 #define __NR_setgroups 81 -#define __NR_select 82 + /* 82 was sys_select */ #define __NR_symlink 83 #define __NR_oldlstat 84 #define __NR_readlink 85 @@ -112,10 +112,10 @@ #define __NR_fchown 95 #define __NR_getpriority 96 #define __NR_setpriority 97 -#define __NR_profil 98 + /* 98 was sys_profil */ #define __NR_statfs 99 #define __NR_fstatfs 100 -#define __NR_ioperm 101 + /* 101 was sys_ioperm */ #define __NR_socketcall 102 /* old implementation of socket systemcall */ #define __NR_syslog 103 #define __NR_setitimer 104 @@ -124,10 +124,10 @@ #define __NR_lstat 107 #define __NR_fstat 108 #define __NR_olduname 109 -#define __NR_iopl 110 + /* 110 was sys_iopl */ #define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86old 113 + /* 112 was sys_idle */ + /* 113 was sys_vm86old */ #define __NR_wait4 114 #define __NR_swapoff 115 #define __NR_sysinfo 116 @@ -141,17 +141,17 @@ #define __NR_adjtimex 124 #define __NR_mprotect 125 #define __NR_sigprocmask 126 -#define __NR_create_module 127 + /* 127 was sys_create_module */ #define __NR_init_module 128 #define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 + /* 130 was sys_get_kernel_syms */ #define __NR_quotactl 131 #define __NR_getpgid 132 #define __NR_fchdir 133 #define __NR_bdflush 134 #define __NR_sysfs 135 #define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ + /* 137 was sys_afs_syscall */ #define __NR_setfsuid 138 #define __NR_setfsgid 139 #define __NR__llseek 140 @@ -180,8 +180,8 @@ #define __NR_mremap 163 #define __NR_setresuid 164 #define __NR_getresuid 165 -#define __NR_vm86 166 -#define __NR_query_module 167 + /* 166 was sys_vm86 */ + /* 167 was sys_query_module */ #define __NR_poll 168 #define __NR_nfsservctl 169 #define __NR_setresgid 170 @@ -202,8 +202,8 @@ #define __NR_capset 185 #define __NR_sigaltstack 186 #define __NR_sendfile 187 -#define __NR_streams1 188 /* some people actually want it */ -#define __NR_streams2 189 /* some people actually want it */ + /* 188 reserved for getpmsg */ + /* 189 reserved for putpmsg */ #define __NR_vfork 190 #define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ #define __NR_mmap2 192 @@ -262,16 +262,15 @@ #define __NR_msgrcv 241 #define __NR_msgget 242 #define __NR_msgctl 243 -#if 0 -#define __NR_shmatcall 244 -#endif +#define __NR_shmat 244 #define __NR_shmdt 245 #define __NR_shmget 246 #define __NR_shmctl 247 #define __NR_getdents64 248 #define __NR_fcntl64 249 -/* 223 is unused */ + /* 250 is reserved for tux */ + /* 251 is unused */ #define __NR_gettid 252 #define __NR_readahead 253 #define __NR_setxattr 254 @@ -291,14 +290,15 @@ #define __NR_futex 268 #define __NR_sched_setaffinity 269 #define __NR_sched_getaffinity 270 -#define __NR_set_thread_area 271 -#define __NR_get_thread_area 272 + /* 271 is reserved for set_thread_area */ + /* 272 is reserved for get_thread_area */ #define __NR_io_setup 273 #define __NR_io_destroy 274 #define __NR_io_getevents 275 #define __NR_io_submit 276 #define __NR_io_cancel 277 #define __NR_fadvise64 278 + /* 279 is unused */ #define __NR_exit_group 280 #define __NR_lookup_dcookie 281 @@ -321,17 +321,17 @@ #define __NR_tgkill 298 #define __NR_utimes 299 #define __NR_fadvise64_64 300 -#define __NR_vserver 301 -#define __NR_mbind 302 -#define __NR_get_mempolicy 303 -#define __NR_set_mempolicy 304 + /* 301 is reserved for vserver */ + /* 302 is reserved for mbind */ + /* 303 is reserved for get_mempolicy */ + /* 304 is reserved for set_mempolicy */ #define __NR_mq_open 305 #define __NR_mq_unlink (__NR_mq_open+1) #define __NR_mq_timedsend (__NR_mq_open+2) #define __NR_mq_timedreceive (__NR_mq_open+3) #define __NR_mq_notify (__NR_mq_open+4) #define __NR_mq_getsetattr (__NR_mq_open+5) -#define __NR_kexec_load 311 + /* 311 is reserved for kexec */ #define __NR_waitid 312 #define __NR_add_key 313 #define __NR_request_key 314 @@ -341,7 +341,7 @@ #define __NR_inotify_init 318 #define __NR_inotify_add_watch 319 #define __NR_inotify_rm_watch 320 -/* 321 is unused */ + /* 321 is unused */ #define __NR_migrate_pages 322 #define __NR_openat 323 #define __NR_mkdirat 324 -- cgit v1.1 From 8bf6e1bcf49dfef23d3a4187be7d9c6bdbfd8210 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 28 Mar 2012 17:10:05 +0900 Subject: sh: Consolidate duplicate _32/_64 unistd definitions. This does some more tidying and converging of the header split, following the x86 example. Signed-off-by: Paul Mundt --- arch/sh/include/asm/unistd.h | 37 +++++++++++++++++++++++++++++++++ arch/sh/include/asm/unistd_32.h | 45 +++-------------------------------------- arch/sh/include/asm/unistd_64.h | 38 ---------------------------------- 3 files changed, 40 insertions(+), 80 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/unistd.h b/arch/sh/include/asm/unistd.h index 65be656..a42a561 100644 --- a/arch/sh/include/asm/unistd.h +++ b/arch/sh/include/asm/unistd.h @@ -1,9 +1,46 @@ #ifdef __KERNEL__ # ifdef CONFIG_SUPERH32 + # include "unistd_32.h" +# define __ARCH_WANT_SYS_RT_SIGSUSPEND + # else # include "unistd_64.h" # endif + +# define __ARCH_WANT_IPC_PARSE_VERSION +# define __ARCH_WANT_OLD_READDIR +# define __ARCH_WANT_OLD_STAT +# define __ARCH_WANT_STAT64 +# define __ARCH_WANT_SYS_ALARM +# define __ARCH_WANT_SYS_GETHOSTNAME +# define __ARCH_WANT_SYS_IPC +# define __ARCH_WANT_SYS_PAUSE +# define __ARCH_WANT_SYS_SGETMASK +# define __ARCH_WANT_SYS_SIGNAL +# define __ARCH_WANT_SYS_TIME +# define __ARCH_WANT_SYS_UTIME +# define __ARCH_WANT_SYS_WAITPID +# define __ARCH_WANT_SYS_SOCKETCALL +# define __ARCH_WANT_SYS_FADVISE64 +# define __ARCH_WANT_SYS_GETPGRP +# define __ARCH_WANT_SYS_LLSEEK +# define __ARCH_WANT_SYS_NICE +# define __ARCH_WANT_SYS_OLD_GETRLIMIT +# define __ARCH_WANT_SYS_OLD_UNAME +# define __ARCH_WANT_SYS_OLDUMOUNT +# define __ARCH_WANT_SYS_SIGPENDING +# define __ARCH_WANT_SYS_SIGPROCMASK +# define __ARCH_WANT_SYS_RT_SIGACTION + +/* + * "Conditional" syscalls + * + * What we want is __attribute__((weak,alias("sys_ni_syscall"))), + * but it doesn't work on all toolchains, so we just do it by hand + */ +# define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") + #else # ifdef __SH5__ # include "unistd_64.h" diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h index 2b83a49..72fd1e0 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/asm/unistd_32.h @@ -1,5 +1,5 @@ -#ifndef __ASM_SH_UNISTD_H -#define __ASM_SH_UNISTD_H +#ifndef __ASM_SH_UNISTD_32_H +#define __ASM_SH_UNISTD_32_H /* * Copyright (C) 1999 Niibe Yutaka @@ -381,43 +381,4 @@ #define NR_syscalls 367 -#ifdef __KERNEL__ - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_IPC -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLD_UNAME -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#ifndef cond_syscall -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_UNISTD_H */ +#endif /* __ASM_SH_UNISTD_32_H */ diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h index d6ef1af..a28edc3 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/asm/unistd_64.h @@ -399,44 +399,6 @@ #define __NR_process_vm_readv 376 #define __NR_process_vm_writev 377 -#ifdef __KERNEL__ - #define NR_syscalls 378 -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_IPC -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLD_UNAME -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#ifndef cond_syscall -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif - -#endif /* __KERNEL__ */ #endif /* __ASM_SH_UNISTD_64_H */ -- cgit v1.1 From 552c0d3ea68df46646d1f0dfcbf92a133c4e792b Mon Sep 17 00:00:00 2001 From: Andrzej Pietrasiewicz Date: Wed, 14 Dec 2011 12:11:13 +0100 Subject: SH: adapt for dma_map_ops changes Adapt core SH architecture code for dma_map_ops changes: replace alloc/free_coherent with generic alloc/free methods. Signed-off-by: Andrzej Pietrasiewicz Acked-by: Kyungmin Park Signed-off-by: Marek Szyprowski Reviewed-by: Arnd Bergmann Acked-by: Paul Mundt --- arch/sh/include/asm/dma-mapping.h | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h index 1a73c3e..8bd965e 100644 --- a/arch/sh/include/asm/dma-mapping.h +++ b/arch/sh/include/asm/dma-mapping.h @@ -52,25 +52,31 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) return dma_addr == 0; } -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t gfp) +#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL) + +static inline void *dma_alloc_attrs(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); void *memory; if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) return memory; - if (!ops->alloc_coherent) + if (!ops->alloc) return NULL; - memory = ops->alloc_coherent(dev, size, dma_handle, gfp); + memory = ops->alloc(dev, size, dma_handle, gfp, attrs); debug_dma_alloc_coherent(dev, size, *dma_handle, memory); return memory; } -static inline void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle) +#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL) + +static inline void dma_free_attrs(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs) { struct dma_map_ops *ops = get_dma_ops(dev); @@ -78,14 +84,16 @@ static inline void dma_free_coherent(struct device *dev, size_t size, return; debug_dma_free_coherent(dev, size, vaddr, dma_handle); - if (ops->free_coherent) - ops->free_coherent(dev, size, vaddr, dma_handle); + if (ops->free) + ops->free(dev, size, vaddr, dma_handle, attrs); } /* arch/sh/mm/consistent.c */ extern void *dma_generic_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_addr, gfp_t flag); + dma_addr_t *dma_addr, gfp_t flag, + struct dma_attrs *attrs); extern void dma_generic_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); + void *vaddr, dma_addr_t dma_handle, + struct dma_attrs *attrs); #endif /* __ASM_SH_DMA_MAPPING_H */ -- cgit v1.1 From e839ca528718e68cad32a307dc9aabf01ef3eb05 Mon Sep 17 00:00:00 2001 From: David Howells Date: Wed, 28 Mar 2012 18:30:03 +0100 Subject: Disintegrate asm/system.h for SH Disintegrate asm/system.h for SH. Signed-off-by: David Howells cc: linux-sh@vger.kernel.org --- arch/sh/include/asm/atomic-irq.h | 2 + arch/sh/include/asm/atomic.h | 2 +- arch/sh/include/asm/auxvec.h | 2 + arch/sh/include/asm/barrier.h | 54 ++++++++ arch/sh/include/asm/bitops.h | 1 - arch/sh/include/asm/bl_bit.h | 10 ++ arch/sh/include/asm/bl_bit_32.h | 33 +++++ arch/sh/include/asm/bl_bit_64.h | 40 ++++++ arch/sh/include/asm/bug.h | 5 + arch/sh/include/asm/cache_insns.h | 11 ++ arch/sh/include/asm/cache_insns_32.h | 21 ++++ arch/sh/include/asm/cache_insns_64.h | 23 ++++ arch/sh/include/asm/cmpxchg-irq.h | 2 + arch/sh/include/asm/cmpxchg.h | 70 +++++++++++ arch/sh/include/asm/exec.h | 10 ++ arch/sh/include/asm/futex-irq.h | 1 - arch/sh/include/asm/io.h | 1 - arch/sh/include/asm/processor.h | 15 +++ arch/sh/include/asm/ptrace.h | 1 - arch/sh/include/asm/setup.h | 1 + arch/sh/include/asm/switch_to.h | 19 +++ arch/sh/include/asm/switch_to_32.h | 134 ++++++++++++++++++++ arch/sh/include/asm/switch_to_64.h | 35 ++++++ arch/sh/include/asm/system.h | 191 ++-------------------------- arch/sh/include/asm/system_32.h | 236 ----------------------------------- arch/sh/include/asm/system_64.h | 79 ------------ arch/sh/include/asm/traps.h | 21 ++++ arch/sh/include/asm/traps_32.h | 68 ++++++++++ arch/sh/include/asm/traps_64.h | 24 ++++ arch/sh/include/asm/uaccess.h | 14 +++ 30 files changed, 623 insertions(+), 503 deletions(-) create mode 100644 arch/sh/include/asm/barrier.h create mode 100644 arch/sh/include/asm/bl_bit.h create mode 100644 arch/sh/include/asm/bl_bit_32.h create mode 100644 arch/sh/include/asm/bl_bit_64.h create mode 100644 arch/sh/include/asm/cache_insns.h create mode 100644 arch/sh/include/asm/cache_insns_32.h create mode 100644 arch/sh/include/asm/cache_insns_64.h create mode 100644 arch/sh/include/asm/cmpxchg.h create mode 100644 arch/sh/include/asm/exec.h create mode 100644 arch/sh/include/asm/switch_to.h create mode 100644 arch/sh/include/asm/switch_to_32.h create mode 100644 arch/sh/include/asm/switch_to_64.h delete mode 100644 arch/sh/include/asm/system_32.h delete mode 100644 arch/sh/include/asm/system_64.h create mode 100644 arch/sh/include/asm/traps.h create mode 100644 arch/sh/include/asm/traps_32.h create mode 100644 arch/sh/include/asm/traps_64.h (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h index 467d941..9f7c566 100644 --- a/arch/sh/include/asm/atomic-irq.h +++ b/arch/sh/include/asm/atomic-irq.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_ATOMIC_IRQ_H #define __ASM_SH_ATOMIC_IRQ_H +#include + /* * To get proper branch prediction for the main line, we must branch * forward to code at the end of this object's .text section, then diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h index 63a27db..37f2f4a 100644 --- a/arch/sh/include/asm/atomic.h +++ b/arch/sh/include/asm/atomic.h @@ -9,7 +9,7 @@ #include #include -#include +#include #define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) diff --git a/arch/sh/include/asm/auxvec.h b/arch/sh/include/asm/auxvec.h index 483effd..8bcc51a 100644 --- a/arch/sh/include/asm/auxvec.h +++ b/arch/sh/include/asm/auxvec.h @@ -33,4 +33,6 @@ #define AT_L1D_CACHESHAPE 35 #define AT_L2_CACHESHAPE 36 +#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ + #endif /* __ASM_SH_AUXVEC_H */ diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h new file mode 100644 index 0000000..72c103d --- /dev/null +++ b/arch/sh/include/asm/barrier.h @@ -0,0 +1,54 @@ +/* + * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima + * Copyright (C) 2002 Paul Mundt + */ +#ifndef __ASM_SH_BARRIER_H +#define __ASM_SH_BARRIER_H + +#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#include +#endif + +/* + * A brief note on ctrl_barrier(), the control register write barrier. + * + * Legacy SH cores typically require a sequence of 8 nops after + * modification of a control register in order for the changes to take + * effect. On newer cores (like the sh4a and sh5) this is accomplished + * with icbi. + * + * Also note that on sh4a in the icbi case we can forego a synco for the + * write barrier, as it's not necessary for control registers. + * + * Historically we have only done this type of barrier for the MMUCR, but + * it's also necessary for the CCR, so we make it generic here instead. + */ +#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#define mb() __asm__ __volatile__ ("synco": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("synco": : :"memory") +#define ctrl_barrier() __icbi(PAGE_OFFSET) +#define read_barrier_depends() do { } while(0) +#else +#define mb() __asm__ __volatile__ ("": : :"memory") +#define rmb() mb() +#define wmb() __asm__ __volatile__ ("": : :"memory") +#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") +#define read_barrier_depends() do { } while(0) +#endif + +#ifdef CONFIG_SMP +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#else +#define smp_mb() barrier() +#define smp_rmb() barrier() +#define smp_wmb() barrier() +#define smp_read_barrier_depends() do { } while(0) +#endif + +#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) + +#endif /* __ASM_SH_BARRIER_H */ diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 90fa3e4..ea8706d 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -7,7 +7,6 @@ #error only can be included directly #endif -#include /* For __swab32 */ #include diff --git a/arch/sh/include/asm/bl_bit.h b/arch/sh/include/asm/bl_bit.h new file mode 100644 index 0000000..45e6b9f --- /dev/null +++ b/arch/sh/include/asm/bl_bit.h @@ -0,0 +1,10 @@ +#ifndef __ASM_SH_BL_BIT_H +#define __ASM_SH_BL_BIT_H + +#ifdef CONFIG_SUPERH32 +# include "bl_bit_32.h" +#else +# include "bl_bit_64.h" +#endif + +#endif /* __ASM_SH_BL_BIT_H */ diff --git a/arch/sh/include/asm/bl_bit_32.h b/arch/sh/include/asm/bl_bit_32.h new file mode 100644 index 0000000..fd21eee --- /dev/null +++ b/arch/sh/include/asm/bl_bit_32.h @@ -0,0 +1,33 @@ +#ifndef __ASM_SH_BL_BIT_32_H +#define __ASM_SH_BL_BIT_32_H + +static inline void set_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "or %2, %0\n\t" + "and %3, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "r" (0x10000000), "r" (0xffffff0f) + : "memory" + ); +} + +static inline void clear_bl_bit(void) +{ + unsigned long __dummy0, __dummy1; + + __asm__ __volatile__ ( + "stc sr, %0\n\t" + "and %2, %0\n\t" + "ldc %0, sr\n\t" + : "=&r" (__dummy0), "=r" (__dummy1) + : "1" (~0x10000000) + : "memory" + ); +} + +#endif /* __ASM_SH_BL_BIT_32_H */ diff --git a/arch/sh/include/asm/bl_bit_64.h b/arch/sh/include/asm/bl_bit_64.h new file mode 100644 index 0000000..6cc8711 --- /dev/null +++ b/arch/sh/include/asm/bl_bit_64.h @@ -0,0 +1,40 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_BL_BIT_64_H +#define __ASM_SH_BL_BIT_64_H + +#include + +#define SR_BL_LL 0x0000000010000000LL + +static inline void set_bl_bit(void) +{ + unsigned long long __dummy0, __dummy1 = SR_BL_LL; + + __asm__ __volatile__("getcon " __SR ", %0\n\t" + "or %0, %1, %0\n\t" + "putcon %0, " __SR "\n\t" + : "=&r" (__dummy0) + : "r" (__dummy1)); + +} + +static inline void clear_bl_bit(void) +{ + unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; + + __asm__ __volatile__("getcon " __SR ", %0\n\t" + "and %0, %1, %0\n\t" + "putcon %0, " __SR "\n\t" + : "=&r" (__dummy0) + : "r" (__dummy1)); +} + +#endif /* __ASM_SH_BL_BIT_64_H */ diff --git a/arch/sh/include/asm/bug.h b/arch/sh/include/asm/bug.h index 6323f86..2b87d86 100644 --- a/arch/sh/include/asm/bug.h +++ b/arch/sh/include/asm/bug.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_BUG_H #define __ASM_SH_BUG_H +#include + #define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ #define BUGFLAG_UNWINDER (1 << 1) @@ -107,4 +109,7 @@ do { \ #include +struct pt_regs; +extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); + #endif /* __ASM_SH_BUG_H */ diff --git a/arch/sh/include/asm/cache_insns.h b/arch/sh/include/asm/cache_insns.h new file mode 100644 index 0000000..d25fbe5 --- /dev/null +++ b/arch/sh/include/asm/cache_insns.h @@ -0,0 +1,11 @@ +#ifndef __ASM_SH_CACHE_INSNS_H +#define __ASM_SH_CACHE_INSNS_H + + +#ifdef CONFIG_SUPERH32 +# include "cache_insns_32.h" +#else +# include "cache_insns_64.h" +#endif + +#endif /* __ASM_SH_CACHE_INSNS_H */ diff --git a/arch/sh/include/asm/cache_insns_32.h b/arch/sh/include/asm/cache_insns_32.h new file mode 100644 index 0000000..b92fe54 --- /dev/null +++ b/arch/sh/include/asm/cache_insns_32.h @@ -0,0 +1,21 @@ +#ifndef __ASM_SH_CACHE_INSNS_32_H +#define __ASM_SH_CACHE_INSNS_32_H + +#include + +#if defined(CONFIG_CPU_SH4A) +#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) +#else +#define __icbi(addr) mb() +#endif + +#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) +#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) +#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) + +static inline reg_size_t register_align(void *val) +{ + return (unsigned long)(signed long)val; +} + +#endif /* __ASM_SH_CACHE_INSNS_32_H */ diff --git a/arch/sh/include/asm/cache_insns_64.h b/arch/sh/include/asm/cache_insns_64.h new file mode 100644 index 0000000..70b6357 --- /dev/null +++ b/arch/sh/include/asm/cache_insns_64.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_CACHE_INSNS_64_H +#define __ASM_SH_CACHE_INSNS_64_H + +#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) +#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) +#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) +#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) + +static inline reg_size_t register_align(void *val) +{ + return (unsigned long long)(signed long long)(signed long)val; +} + +#endif /* __ASM_SH_CACHE_INSNS_64_H */ diff --git a/arch/sh/include/asm/cmpxchg-irq.h b/arch/sh/include/asm/cmpxchg-irq.h index 43049ec..bd11f63 100644 --- a/arch/sh/include/asm/cmpxchg-irq.h +++ b/arch/sh/include/asm/cmpxchg-irq.h @@ -1,6 +1,8 @@ #ifndef __ASM_SH_CMPXCHG_IRQ_H #define __ASM_SH_CMPXCHG_IRQ_H +#include + static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) { unsigned long flags, retval; diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h new file mode 100644 index 0000000..f6bd140 --- /dev/null +++ b/arch/sh/include/asm/cmpxchg.h @@ -0,0 +1,70 @@ +#ifndef __ASM_SH_CMPXCHG_H +#define __ASM_SH_CMPXCHG_H + +/* + * Atomic operations that C can't guarantee us. Useful for + * resource counting etc.. + */ + +#include +#include + +#if defined(CONFIG_GUSA_RB) +#include +#elif defined(CONFIG_CPU_SH4A) +#include +#else +#include +#endif + +extern void __xchg_called_with_bad_pointer(void); + +#define __xchg(ptr, x, size) \ +({ \ + unsigned long __xchg__res; \ + volatile void *__xchg_ptr = (ptr); \ + switch (size) { \ + case 4: \ + __xchg__res = xchg_u32(__xchg_ptr, x); \ + break; \ + case 1: \ + __xchg__res = xchg_u8(__xchg_ptr, x); \ + break; \ + default: \ + __xchg_called_with_bad_pointer(); \ + __xchg__res = x; \ + break; \ + } \ + \ + __xchg__res; \ +}) + +#define xchg(ptr,x) \ + ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) + +/* This function doesn't exist, so you'll get a linker error + * if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + +#endif /* __ASM_SH_CMPXCHG_H */ diff --git a/arch/sh/include/asm/exec.h b/arch/sh/include/asm/exec.h new file mode 100644 index 0000000..69486a9 --- /dev/null +++ b/arch/sh/include/asm/exec.h @@ -0,0 +1,10 @@ +/* + * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima + * Copyright (C) 2002 Paul Mundt + */ +#ifndef __ASM_SH_EXEC_H +#define __ASM_SH_EXEC_H + +#define arch_align_stack(x) (x) + +#endif /* __ASM_SH_EXEC_H */ diff --git a/arch/sh/include/asm/futex-irq.h b/arch/sh/include/asm/futex-irq.h index 6cb9f19..63d3312 100644 --- a/arch/sh/include/asm/futex-irq.h +++ b/arch/sh/include/asm/futex-irq.h @@ -1,7 +1,6 @@ #ifndef __ASM_SH_FUTEX_IRQ_H #define __ASM_SH_FUTEX_IRQ_H -#include static inline int atomic_futex_op_xchg_set(int oparg, u32 __user *uaddr, int *oldval) diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 28c5aa5..35fc8b0 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -14,7 +14,6 @@ */ #include #include -#include #include #include #include diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h index 9c7bdfc..a229c39 100644 --- a/arch/sh/include/asm/processor.h +++ b/arch/sh/include/asm/processor.h @@ -101,6 +101,10 @@ extern struct sh_cpuinfo cpu_data[]; #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") #define cpu_relax() barrier() +void default_idle(void); +void cpu_idle_wait(void); +void stop_this_cpu(void *); + /* Forward decl */ struct seq_operations; struct task_struct; @@ -161,6 +165,17 @@ int vsyscall_init(void); #define vsyscall_init() do { } while (0) #endif +/* + * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks. + */ +#ifdef CONFIG_CPU_SH2A +extern unsigned int instruction_size(unsigned int insn); +#elif defined(CONFIG_SUPERH32) +#define instruction_size(insn) (2) +#else +#define instruction_size(insn) (4) +#endif + #endif /* __ASSEMBLY__ */ #ifdef CONFIG_SUPERH32 diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 2d3679b..c7b7e1e 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h @@ -37,7 +37,6 @@ #include #include #include -#include #define user_mode(regs) (((regs)->sr & 0x40000000)==0) #define kernel_stack_pointer(_regs) ((unsigned long)(_regs)->regs[15]) diff --git a/arch/sh/include/asm/setup.h b/arch/sh/include/asm/setup.h index 01fa17a..465a22d 100644 --- a/arch/sh/include/asm/setup.h +++ b/arch/sh/include/asm/setup.h @@ -20,6 +20,7 @@ void sh_mv_setup(void); void check_for_initrd(void); +void per_cpu_trap_init(void); #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/switch_to.h b/arch/sh/include/asm/switch_to.h new file mode 100644 index 0000000..62b19418 --- /dev/null +++ b/arch/sh/include/asm/switch_to.h @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_SWITCH_TO_H +#define __ASM_SH_SWITCH_TO_H + +#ifdef CONFIG_SUPERH32 +# include "switch_to_32.h" +#else +# include "switch_to_64.h" +#endif + +#endif /* __ASM_SH_SWITCH_TO_H */ diff --git a/arch/sh/include/asm/switch_to_32.h b/arch/sh/include/asm/switch_to_32.h new file mode 100644 index 0000000..0c06551 --- /dev/null +++ b/arch/sh/include/asm/switch_to_32.h @@ -0,0 +1,134 @@ +#ifndef __ASM_SH_SWITCH_TO_32_H +#define __ASM_SH_SWITCH_TO_32_H + +#ifdef CONFIG_SH_DSP + +#define is_dsp_enabled(tsk) \ + (!!(tsk->thread.dsp_status.status & SR_DSP)) + +#define __restore_dsp(tsk) \ +do { \ + register u32 *__ts2 __asm__ ("r2") = \ + (u32 *)&tsk->thread.dsp_status; \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "movs.l @r2+, a0\n\t" \ + "movs.l @r2+, a1\n\t" \ + "movs.l @r2+, a0g\n\t" \ + "movs.l @r2+, a1g\n\t" \ + "movs.l @r2+, m0\n\t" \ + "movs.l @r2+, m1\n\t" \ + "movs.l @r2+, x0\n\t" \ + "movs.l @r2+, x1\n\t" \ + "movs.l @r2+, y0\n\t" \ + "movs.l @r2+, y1\n\t" \ + "lds.l @r2+, dsr\n\t" \ + "ldc.l @r2+, rs\n\t" \ + "ldc.l @r2+, re\n\t" \ + "ldc.l @r2+, mod\n\t" \ + : : "r" (__ts2)); \ +} while (0) + +#define __save_dsp(tsk) \ +do { \ + register u32 *__ts2 __asm__ ("r2") = \ + (u32 *)&tsk->thread.dsp_status + 14; \ + \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "stc.l mod, @-r2\n\t" \ + "stc.l re, @-r2\n\t" \ + "stc.l rs, @-r2\n\t" \ + "sts.l dsr, @-r2\n\t" \ + "movs.l y1, @-r2\n\t" \ + "movs.l y0, @-r2\n\t" \ + "movs.l x1, @-r2\n\t" \ + "movs.l x0, @-r2\n\t" \ + "movs.l m1, @-r2\n\t" \ + "movs.l m0, @-r2\n\t" \ + "movs.l a1g, @-r2\n\t" \ + "movs.l a0g, @-r2\n\t" \ + "movs.l a1, @-r2\n\t" \ + "movs.l a0, @-r2\n\t" \ + : : "r" (__ts2)); \ +} while (0) + +#else + +#define is_dsp_enabled(tsk) (0) +#define __save_dsp(tsk) do { } while (0) +#define __restore_dsp(tsk) do { } while (0) +#endif + +struct task_struct *__switch_to(struct task_struct *prev, + struct task_struct *next); + +/* + * switch_to() should switch tasks to task nr n, first + */ +#define switch_to(prev, next, last) \ +do { \ + register u32 *__ts1 __asm__ ("r1"); \ + register u32 *__ts2 __asm__ ("r2"); \ + register u32 *__ts4 __asm__ ("r4"); \ + register u32 *__ts5 __asm__ ("r5"); \ + register u32 *__ts6 __asm__ ("r6"); \ + register u32 __ts7 __asm__ ("r7"); \ + struct task_struct *__last; \ + \ + if (is_dsp_enabled(prev)) \ + __save_dsp(prev); \ + \ + __ts1 = (u32 *)&prev->thread.sp; \ + __ts2 = (u32 *)&prev->thread.pc; \ + __ts4 = (u32 *)prev; \ + __ts5 = (u32 *)next; \ + __ts6 = (u32 *)&next->thread.sp; \ + __ts7 = next->thread.pc; \ + \ + __asm__ __volatile__ ( \ + ".balign 4\n\t" \ + "stc.l gbr, @-r15\n\t" \ + "sts.l pr, @-r15\n\t" \ + "mov.l r8, @-r15\n\t" \ + "mov.l r9, @-r15\n\t" \ + "mov.l r10, @-r15\n\t" \ + "mov.l r11, @-r15\n\t" \ + "mov.l r12, @-r15\n\t" \ + "mov.l r13, @-r15\n\t" \ + "mov.l r14, @-r15\n\t" \ + "mov.l r15, @r1\t! save SP\n\t" \ + "mov.l @r6, r15\t! change to new stack\n\t" \ + "mova 1f, %0\n\t" \ + "mov.l %0, @r2\t! save PC\n\t" \ + "mov.l 2f, %0\n\t" \ + "jmp @%0\t! call __switch_to\n\t" \ + " lds r7, pr\t! with return to new PC\n\t" \ + ".balign 4\n" \ + "2:\n\t" \ + ".long __switch_to\n" \ + "1:\n\t" \ + "mov.l @r15+, r14\n\t" \ + "mov.l @r15+, r13\n\t" \ + "mov.l @r15+, r12\n\t" \ + "mov.l @r15+, r11\n\t" \ + "mov.l @r15+, r10\n\t" \ + "mov.l @r15+, r9\n\t" \ + "mov.l @r15+, r8\n\t" \ + "lds.l @r15+, pr\n\t" \ + "ldc.l @r15+, gbr\n\t" \ + : "=z" (__last) \ + : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ + "r" (__ts5), "r" (__ts6), "r" (__ts7) \ + : "r3", "t"); \ + \ + last = __last; \ +} while (0) + +#define finish_arch_switch(prev) \ +do { \ + if (is_dsp_enabled(prev)) \ + __restore_dsp(prev); \ +} while (0) + +#endif /* __ASM_SH_SWITCH_TO_32_H */ diff --git a/arch/sh/include/asm/switch_to_64.h b/arch/sh/include/asm/switch_to_64.h new file mode 100644 index 0000000..ba3129d --- /dev/null +++ b/arch/sh/include/asm/switch_to_64.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_SWITCH_TO_64_H +#define __ASM_SH_SWITCH_TO_64_H + +struct thread_struct; +struct task_struct; + +/* + * switch_to() should switch tasks to task nr n, first + */ +struct task_struct *sh64_switch_to(struct task_struct *prev, + struct thread_struct *prev_thread, + struct task_struct *next, + struct thread_struct *next_thread); + +#define switch_to(prev,next,last) \ +do { \ + if (last_task_used_math != next) { \ + struct pt_regs *regs = next->thread.uregs; \ + if (regs) regs->sr |= SR_FD; \ + } \ + last = sh64_switch_to(prev, &prev->thread, next, \ + &next->thread); \ +} while (0) + + +#endif /* __ASM_SH_SWITCH_TO_64_H */ diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index 10c8b18..e2042aa 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h @@ -1,184 +1,9 @@ -#ifndef __ASM_SH_SYSTEM_H -#define __ASM_SH_SYSTEM_H - -/* - * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima - * Copyright (C) 2002 Paul Mundt - */ - -#include -#include -#include -#include -#include - -#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ - -/* - * A brief note on ctrl_barrier(), the control register write barrier. - * - * Legacy SH cores typically require a sequence of 8 nops after - * modification of a control register in order for the changes to take - * effect. On newer cores (like the sh4a and sh5) this is accomplished - * with icbi. - * - * Also note that on sh4a in the icbi case we can forego a synco for the - * write barrier, as it's not necessary for control registers. - * - * Historically we have only done this type of barrier for the MMUCR, but - * it's also necessary for the CCR, so we make it generic here instead. - */ -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) -#define mb() __asm__ __volatile__ ("synco": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("synco": : :"memory") -#define ctrl_barrier() __icbi(PAGE_OFFSET) -#define read_barrier_depends() do { } while(0) -#else -#define mb() __asm__ __volatile__ ("": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("": : :"memory") -#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") -#define read_barrier_depends() do { } while(0) -#endif - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) - -#ifdef CONFIG_GUSA_RB -#include -#elif defined(CONFIG_CPU_SH4A) -#include -#else -#include -#endif - -extern void __xchg_called_with_bad_pointer(void); - -#define __xchg(ptr, x, size) \ -({ \ - unsigned long __xchg__res; \ - volatile void *__xchg_ptr = (ptr); \ - switch (size) { \ - case 4: \ - __xchg__res = xchg_u32(__xchg_ptr, x); \ - break; \ - case 1: \ - __xchg__res = xchg_u8(__xchg_ptr, x); \ - break; \ - default: \ - __xchg_called_with_bad_pointer(); \ - __xchg__res = x; \ - break; \ - } \ - \ - __xchg__res; \ -}) - -#define xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) - -/* This function doesn't exist, so you'll get a linker error - * if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -#define __HAVE_ARCH_CMPXCHG 1 - -static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr,o,n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -struct pt_regs; - -extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); +/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */ +#include +#include +#include +#include +#include +#include +#include void free_initmem(void); -void free_initrd_mem(unsigned long start, unsigned long end); - -extern void *set_exception_table_vec(unsigned int vec, void *handler); - -static inline void *set_exception_table_evt(unsigned int evt, void *handler) -{ - return set_exception_table_vec(evt >> 5, handler); -} - -/* - * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks. - */ -#ifdef CONFIG_CPU_SH2A -extern unsigned int instruction_size(unsigned int insn); -#elif defined(CONFIG_SUPERH32) -#define instruction_size(insn) (2) -#else -#define instruction_size(insn) (4) -#endif - -void per_cpu_trap_init(void); -void default_idle(void); -void cpu_idle_wait(void); -void stop_this_cpu(void *); - -#ifdef CONFIG_SUPERH32 -#define BUILD_TRAP_HANDLER(name) \ -asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ - unsigned long r6, unsigned long r7, \ - struct pt_regs __regs) - -#define TRAP_HANDLER_DECL \ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \ - unsigned int vec = regs->tra; \ - (void)vec; -#else -#define BUILD_TRAP_HANDLER(name) \ -asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) -#define TRAP_HANDLER_DECL -#endif - -BUILD_TRAP_HANDLER(address_error); -BUILD_TRAP_HANDLER(debug); -BUILD_TRAP_HANDLER(bug); -BUILD_TRAP_HANDLER(breakpoint); -BUILD_TRAP_HANDLER(singlestep); -BUILD_TRAP_HANDLER(fpu_error); -BUILD_TRAP_HANDLER(fpu_state_restore); -BUILD_TRAP_HANDLER(nmi); - -#define arch_align_stack(x) (x) - -struct mem_access { - unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt); - unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt); -}; - -#ifdef CONFIG_SUPERH32 -# include "system_32.h" -#else -# include "system_64.h" -#endif - -#endif diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h deleted file mode 100644 index a4ad1cd..0000000 --- a/arch/sh/include/asm/system_32.h +++ /dev/null @@ -1,236 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_32_H -#define __ASM_SH_SYSTEM_32_H - -#include -#include - -#ifdef CONFIG_SH_DSP - -#define is_dsp_enabled(tsk) \ - (!!(tsk->thread.dsp_status.status & SR_DSP)) - -#define __restore_dsp(tsk) \ -do { \ - register u32 *__ts2 __asm__ ("r2") = \ - (u32 *)&tsk->thread.dsp_status; \ - __asm__ __volatile__ ( \ - ".balign 4\n\t" \ - "movs.l @r2+, a0\n\t" \ - "movs.l @r2+, a1\n\t" \ - "movs.l @r2+, a0g\n\t" \ - "movs.l @r2+, a1g\n\t" \ - "movs.l @r2+, m0\n\t" \ - "movs.l @r2+, m1\n\t" \ - "movs.l @r2+, x0\n\t" \ - "movs.l @r2+, x1\n\t" \ - "movs.l @r2+, y0\n\t" \ - "movs.l @r2+, y1\n\t" \ - "lds.l @r2+, dsr\n\t" \ - "ldc.l @r2+, rs\n\t" \ - "ldc.l @r2+, re\n\t" \ - "ldc.l @r2+, mod\n\t" \ - : : "r" (__ts2)); \ -} while (0) - - -#define __save_dsp(tsk) \ -do { \ - register u32 *__ts2 __asm__ ("r2") = \ - (u32 *)&tsk->thread.dsp_status + 14; \ - \ - __asm__ __volatile__ ( \ - ".balign 4\n\t" \ - "stc.l mod, @-r2\n\t" \ - "stc.l re, @-r2\n\t" \ - "stc.l rs, @-r2\n\t" \ - "sts.l dsr, @-r2\n\t" \ - "movs.l y1, @-r2\n\t" \ - "movs.l y0, @-r2\n\t" \ - "movs.l x1, @-r2\n\t" \ - "movs.l x0, @-r2\n\t" \ - "movs.l m1, @-r2\n\t" \ - "movs.l m0, @-r2\n\t" \ - "movs.l a1g, @-r2\n\t" \ - "movs.l a0g, @-r2\n\t" \ - "movs.l a1, @-r2\n\t" \ - "movs.l a0, @-r2\n\t" \ - : : "r" (__ts2)); \ -} while (0) - -#else - -#define is_dsp_enabled(tsk) (0) -#define __save_dsp(tsk) do { } while (0) -#define __restore_dsp(tsk) do { } while (0) -#endif - -#if defined(CONFIG_CPU_SH4A) -#define __icbi(addr) __asm__ __volatile__ ( "icbi @%0\n\t" : : "r" (addr)) -#else -#define __icbi(addr) mb() -#endif - -#define __ocbp(addr) __asm__ __volatile__ ( "ocbp @%0\n\t" : : "r" (addr)) -#define __ocbi(addr) __asm__ __volatile__ ( "ocbi @%0\n\t" : : "r" (addr)) -#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb @%0\n\t" : : "r" (addr)) - -struct task_struct *__switch_to(struct task_struct *prev, - struct task_struct *next); - -/* - * switch_to() should switch tasks to task nr n, first - */ -#define switch_to(prev, next, last) \ -do { \ - register u32 *__ts1 __asm__ ("r1"); \ - register u32 *__ts2 __asm__ ("r2"); \ - register u32 *__ts4 __asm__ ("r4"); \ - register u32 *__ts5 __asm__ ("r5"); \ - register u32 *__ts6 __asm__ ("r6"); \ - register u32 __ts7 __asm__ ("r7"); \ - struct task_struct *__last; \ - \ - if (is_dsp_enabled(prev)) \ - __save_dsp(prev); \ - \ - __ts1 = (u32 *)&prev->thread.sp; \ - __ts2 = (u32 *)&prev->thread.pc; \ - __ts4 = (u32 *)prev; \ - __ts5 = (u32 *)next; \ - __ts6 = (u32 *)&next->thread.sp; \ - __ts7 = next->thread.pc; \ - \ - __asm__ __volatile__ ( \ - ".balign 4\n\t" \ - "stc.l gbr, @-r15\n\t" \ - "sts.l pr, @-r15\n\t" \ - "mov.l r8, @-r15\n\t" \ - "mov.l r9, @-r15\n\t" \ - "mov.l r10, @-r15\n\t" \ - "mov.l r11, @-r15\n\t" \ - "mov.l r12, @-r15\n\t" \ - "mov.l r13, @-r15\n\t" \ - "mov.l r14, @-r15\n\t" \ - "mov.l r15, @r1\t! save SP\n\t" \ - "mov.l @r6, r15\t! change to new stack\n\t" \ - "mova 1f, %0\n\t" \ - "mov.l %0, @r2\t! save PC\n\t" \ - "mov.l 2f, %0\n\t" \ - "jmp @%0\t! call __switch_to\n\t" \ - " lds r7, pr\t! with return to new PC\n\t" \ - ".balign 4\n" \ - "2:\n\t" \ - ".long __switch_to\n" \ - "1:\n\t" \ - "mov.l @r15+, r14\n\t" \ - "mov.l @r15+, r13\n\t" \ - "mov.l @r15+, r12\n\t" \ - "mov.l @r15+, r11\n\t" \ - "mov.l @r15+, r10\n\t" \ - "mov.l @r15+, r9\n\t" \ - "mov.l @r15+, r8\n\t" \ - "lds.l @r15+, pr\n\t" \ - "ldc.l @r15+, gbr\n\t" \ - : "=z" (__last) \ - : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ - "r" (__ts5), "r" (__ts6), "r" (__ts7) \ - : "r3", "t"); \ - \ - last = __last; \ -} while (0) - -#define finish_arch_switch(prev) \ -do { \ - if (is_dsp_enabled(prev)) \ - __restore_dsp(prev); \ -} while (0) - -#ifdef CONFIG_CPU_HAS_SR_RB -#define lookup_exception_vector() \ -({ \ - unsigned long _vec; \ - \ - __asm__ __volatile__ ( \ - "stc r2_bank, %0\n\t" \ - : "=r" (_vec) \ - ); \ - \ - _vec; \ -}) -#else -#define lookup_exception_vector() \ -({ \ - unsigned long _vec; \ - __asm__ __volatile__ ( \ - "mov r4, %0\n\t" \ - : "=r" (_vec) \ - ); \ - \ - _vec; \ -}) -#endif - -static inline reg_size_t register_align(void *val) -{ - return (unsigned long)(signed long)val; -} - -int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, - struct mem_access *ma, int, unsigned long address); - -static inline void trigger_address_error(void) -{ - __asm__ __volatile__ ( - "ldc %0, sr\n\t" - "mov.l @%1, %0" - : - : "r" (0x10000000), "r" (0x80000001) - ); -} - -asmlinkage void do_address_error(struct pt_regs *regs, - unsigned long writeaccess, - unsigned long address); -asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); -asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7, - struct pt_regs __regs); - -static inline void set_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "or %2, %0\n\t" - "and %3, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "r" (0x10000000), "r" (0xffffff0f) - : "memory" - ); -} - -static inline void clear_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "and %2, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x10000000) - : "memory" - ); -} - -#endif /* __ASM_SH_SYSTEM_32_H */ diff --git a/arch/sh/include/asm/system_64.h b/arch/sh/include/asm/system_64.h deleted file mode 100644 index 8593bc8d..0000000 --- a/arch/sh/include/asm/system_64.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_64_H -#define __ASM_SH_SYSTEM_64_H - -/* - * include/asm-sh/system_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include - -/* - * switch_to() should switch tasks to task nr n, first - */ -struct thread_struct; -struct task_struct *sh64_switch_to(struct task_struct *prev, - struct thread_struct *prev_thread, - struct task_struct *next, - struct thread_struct *next_thread); - -#define switch_to(prev,next,last) \ -do { \ - if (last_task_used_math != next) { \ - struct pt_regs *regs = next->thread.uregs; \ - if (regs) regs->sr |= SR_FD; \ - } \ - last = sh64_switch_to(prev, &prev->thread, next, \ - &next->thread); \ -} while (0) - -#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) -#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) -#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) -#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) - -static inline reg_size_t register_align(void *val) -{ - return (unsigned long long)(signed long long)(signed long)val; -} - -extern void phys_stext(void); - -static inline void trigger_address_error(void) -{ - phys_stext(); -} - -#define SR_BL_LL 0x0000000010000000LL - -static inline void set_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); - -} - -static inline void clear_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -#endif /* __ASM_SH_SYSTEM_64_H */ diff --git a/arch/sh/include/asm/traps.h b/arch/sh/include/asm/traps.h new file mode 100644 index 0000000..afd9df8 --- /dev/null +++ b/arch/sh/include/asm/traps.h @@ -0,0 +1,21 @@ +#ifndef __ASM_SH_TRAPS_H +#define __ASM_SH_TRAPS_H + +#include + +#ifdef CONFIG_SUPERH32 +# include "traps_32.h" +#else +# include "traps_64.h" +#endif + +BUILD_TRAP_HANDLER(address_error); +BUILD_TRAP_HANDLER(debug); +BUILD_TRAP_HANDLER(bug); +BUILD_TRAP_HANDLER(breakpoint); +BUILD_TRAP_HANDLER(singlestep); +BUILD_TRAP_HANDLER(fpu_error); +BUILD_TRAP_HANDLER(fpu_state_restore); +BUILD_TRAP_HANDLER(nmi); + +#endif /* __ASM_SH_TRAPS_H */ diff --git a/arch/sh/include/asm/traps_32.h b/arch/sh/include/asm/traps_32.h new file mode 100644 index 0000000..cfd55ff --- /dev/null +++ b/arch/sh/include/asm/traps_32.h @@ -0,0 +1,68 @@ +#ifndef __ASM_SH_TRAPS_32_H +#define __ASM_SH_TRAPS_32_H + +#include +#include + +#ifdef CONFIG_CPU_HAS_SR_RB +#define lookup_exception_vector() \ +({ \ + unsigned long _vec; \ + \ + __asm__ __volatile__ ( \ + "stc r2_bank, %0\n\t" \ + : "=r" (_vec) \ + ); \ + \ + _vec; \ +}) +#else +#define lookup_exception_vector() \ +({ \ + unsigned long _vec; \ + __asm__ __volatile__ ( \ + "mov r4, %0\n\t" \ + : "=r" (_vec) \ + ); \ + \ + _vec; \ +}) +#endif + +static inline void trigger_address_error(void) +{ + __asm__ __volatile__ ( + "ldc %0, sr\n\t" + "mov.l @%1, %0" + : + : "r" (0x10000000), "r" (0x80000001) + ); +} + +asmlinkage void do_address_error(struct pt_regs *regs, + unsigned long writeaccess, + unsigned long address); +asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs); +asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs); +asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs); +asmlinkage void do_exception_error(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs); + +#define BUILD_TRAP_HANDLER(name) \ +asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ + unsigned long r6, unsigned long r7, \ + struct pt_regs __regs) + +#define TRAP_HANDLER_DECL \ + struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \ + unsigned int vec = regs->tra; \ + (void)vec; + +#endif /* __ASM_SH_TRAPS_32_H */ diff --git a/arch/sh/include/asm/traps_64.h b/arch/sh/include/asm/traps_64.h new file mode 100644 index 0000000..c52d7f9 --- /dev/null +++ b/arch/sh/include/asm/traps_64.h @@ -0,0 +1,24 @@ +/* + * Copyright (C) 2000, 2001 Paolo Alberelli + * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2004 Richard Curnow + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_SH_TRAPS_64_H +#define __ASM_SH_TRAPS_64_H + +extern void phys_stext(void); + +static inline void trigger_address_error(void) +{ + phys_stext(); +} + +#define BUILD_TRAP_HANDLER(name) \ +asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) +#define TRAP_HANDLER_DECL + +#endif /* __ASM_SH_TRAPS_64_H */ diff --git a/arch/sh/include/asm/uaccess.h b/arch/sh/include/asm/uaccess.h index 075848f..050f221 100644 --- a/arch/sh/include/asm/uaccess.h +++ b/arch/sh/include/asm/uaccess.h @@ -254,5 +254,19 @@ int fixup_exception(struct pt_regs *regs); unsigned long search_exception_table(unsigned long addr); const struct exception_table_entry *search_exception_tables(unsigned long addr); +extern void *set_exception_table_vec(unsigned int vec, void *handler); + +static inline void *set_exception_table_evt(unsigned int evt, void *handler) +{ + return set_exception_table_vec(evt >> 5, handler); +} + +struct mem_access { + unsigned long (*from)(void *dst, const void __user *src, unsigned long cnt); + unsigned long (*to)(void __user *dst, const void *src, unsigned long cnt); +}; + +int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs, + struct mem_access *ma, int, unsigned long address); #endif /* __ASM_SH_UACCESS_H */ -- cgit v1.1 From 49a7f04a4b9d45cd794741ce3d5d66524b37bdd0 Mon Sep 17 00:00:00 2001 From: David Howells Date: Wed, 28 Mar 2012 18:30:03 +0100 Subject: Move all declarations of free_initmem() to linux/mm.h Move all declarations of free_initmem() to linux/mm.h so that there's only one and it's used by everything. Signed-off-by: David Howells cc: linux-c6x-dev@linux-c6x.org cc: microblaze-uclinux@itee.uq.edu.au cc: linux-sh@vger.kernel.org cc: sparclinux@vger.kernel.org cc: x86@kernel.org cc: linux-mm@kvack.org --- arch/sh/include/asm/system.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h index e2042aa..04268aa 100644 --- a/arch/sh/include/asm/system.h +++ b/arch/sh/include/asm/system.h @@ -6,4 +6,3 @@ #include #include #include -void free_initmem(void); -- cgit v1.1 From 141124c02059eee9dbc5c86ea797b1ca888e77f7 Mon Sep 17 00:00:00 2001 From: David Howells Date: Wed, 28 Mar 2012 18:30:03 +0100 Subject: Delete all instances of asm/system.h Delete all instances of asm/system.h as they should be redundant by this point. Signed-off-by: David Howells --- arch/sh/include/asm/system.h | 8 -------- 1 file changed, 8 deletions(-) delete mode 100644 arch/sh/include/asm/system.h (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h deleted file mode 100644 index 04268aa..0000000 --- a/arch/sh/include/asm/system.h +++ /dev/null @@ -1,8 +0,0 @@ -/* FILE TO BE DELETED. DO NOT ADD STUFF HERE! */ -#include -#include -#include -#include -#include -#include -#include -- cgit v1.1 From b7e68d6876dfbab087bc3859211a9efc74cbe30c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 29 Mar 2012 16:05:10 +0900 Subject: sh: Support I/O space swapping where needed. This adopts a trimmed down version of the MIPS port mangling interface limited to the I/O swabbing for platforms that can't use little endian accessors. For platforms with mixed I/O spaces involving PCI it will still be necessary to enable byte swapping at the host controller level. Attention needs to be paid to all of host controller endianness, CPU endianness, and whether I/O accesses are explicitly swapped or not via SWAP_IO_SPACE. Fortunately the platforms that need this are in the minority. Signed-off-by: Paul Mundt --- arch/sh/include/asm/io.h | 25 ++++++------- arch/sh/include/mach-common/mach/mangle-port.h | 49 ++++++++++++++++++++++++++ 2 files changed, 59 insertions(+), 15 deletions(-) create mode 100644 arch/sh/include/mach-common/mach/mangle-port.h (limited to 'arch/sh/include') diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 28c5aa5..eb76cb3 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -24,6 +24,7 @@ #define __IO_PREFIX generic #include #include +#include #define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile u8 __force *)(a) = (v)) #define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile u16 __force *)(a) = (v)) @@ -35,21 +36,15 @@ #define __raw_readl(a) (__chk_io_ptr(a), *(volatile u32 __force *)(a)) #define __raw_readq(a) (__chk_io_ptr(a), *(volatile u64 __force *)(a)) -#define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; }) -#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(c)); __v; }) -#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(c)); __v; }) -#define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64) \ - __raw_readq(c)); __v; }) - -#define writeb_relaxed(v,c) ((void)__raw_writeb(v,c)) -#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \ - cpu_to_le16(v),c)) -#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \ - cpu_to_le32(v),c)) -#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64) \ - cpu_to_le64(v),c)) +#define readb_relaxed(c) ({ u8 __v = ioswabb(__raw_readb(c)); __v; }) +#define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; }) +#define readl_relaxed(c) ({ u32 __v = ioswabl(__raw_readl(c)); __v; }) +#define readq_relaxed(c) ({ u64 __v = ioswabq(__raw_readq(c)); __v; }) + +#define writeb_relaxed(v,c) ((void)__raw_writeb((__force u8)ioswabb(v),c)) +#define writew_relaxed(v,c) ((void)__raw_writew((__force u16)ioswabw(v),c)) +#define writel_relaxed(v,c) ((void)__raw_writel((__force u32)ioswabl(v),c)) +#define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)ioswabq(v),c)) #define readb(a) ({ u8 r_ = readb_relaxed(a); rmb(); r_; }) #define readw(a) ({ u16 r_ = readw_relaxed(a); rmb(); r_; }) diff --git a/arch/sh/include/mach-common/mach/mangle-port.h b/arch/sh/include/mach-common/mach/mangle-port.h new file mode 100644 index 0000000..4ca1769 --- /dev/null +++ b/arch/sh/include/mach-common/mach/mangle-port.h @@ -0,0 +1,49 @@ +/* + * SH version cribbed from the MIPS copy: + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2003, 2004 Ralf Baechle + */ +#ifndef __MACH_COMMON_MANGLE_PORT_H +#define __MACH_COMMON_MANGLE_PORT_H + +/* + * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; + * less sane hardware forces software to fiddle with this... + * + * Regardless, if the host bus endianness mismatches that of PCI/ISA, then + * you can't have the numerical value of data and byte addresses within + * multibyte quantities both preserved at the same time. Hence two + * variations of functions: non-prefixed ones that preserve the value + * and prefixed ones that preserve byte addresses. The latters are + * typically used for moving raw data between a peripheral and memory (cf. + * string I/O functions), hence the "__mem_" prefix. + */ +#if defined(CONFIG_SWAP_IO_SPACE) + +# define ioswabb(x) (x) +# define __mem_ioswabb(x) (x) +# define ioswabw(x) le16_to_cpu(x) +# define __mem_ioswabw(x) (x) +# define ioswabl(x) le32_to_cpu(x) +# define __mem_ioswabl(x) (x) +# define ioswabq(x) le64_to_cpu(x) +# define __mem_ioswabq(x) (x) + +#else + +# define ioswabb(x) (x) +# define __mem_ioswabb(x) (x) +# define ioswabw(x) (x) +# define __mem_ioswabw(x) cpu_to_le16(x) +# define ioswabl(x) (x) +# define __mem_ioswabl(x) cpu_to_le32(x) +# define ioswabq(x) (x) +# define __mem_ioswabq(x) cpu_to_le32(x) + +#endif + +#endif /* __MACH_COMMON_MANGLE_PORT_H */ -- cgit v1.1