From 25d83cbfaa44e1b9170c0941c3ef52ca39f54ccc Mon Sep 17 00:00:00 2001
From: Heiko Carstens <heiko.carstens@de.ibm.com>
Date: Thu, 28 Sep 2006 16:56:37 +0200
Subject: [S390] Whitespace cleanup.

Huge s390 assembly files whitespace cleanup.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
---
 arch/s390/kernel/entry64.S | 443 ++++++++++++++++++++++-----------------------
 1 file changed, 221 insertions(+), 222 deletions(-)

(limited to 'arch/s390/kernel/entry64.S')

diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index 29bbfba..0f758c3 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -4,8 +4,8 @@
  *
  *    Copyright (C) IBM Corp. 1999,2006
  *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- *               Hartmut Penner (hp@de.ibm.com),
- *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
+ *		 Hartmut Penner (hp@de.ibm.com),
+ *		 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  *		 Heiko Carstens <heiko.carstens@de.ibm.com>
  */
 
@@ -24,29 +24,29 @@
  * Stack layout for the system_call stack entry.
  * The first few entries are identical to the user_regs_struct.
  */
-SP_PTREGS    =  STACK_FRAME_OVERHEAD
-SP_ARGS      =  STACK_FRAME_OVERHEAD + __PT_ARGS
-SP_PSW       =  STACK_FRAME_OVERHEAD + __PT_PSW
-SP_R0        =  STACK_FRAME_OVERHEAD + __PT_GPRS
-SP_R1        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 8
-SP_R2        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 16
-SP_R3        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 24
-SP_R4        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 32
-SP_R5        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 40
-SP_R6        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 48
-SP_R7        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 56
-SP_R8        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 64
-SP_R9        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 72
-SP_R10       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 80
-SP_R11       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 88
-SP_R12       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 96
-SP_R13       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 104
-SP_R14       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 112
-SP_R15       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 120
-SP_ORIG_R2   =  STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
-SP_ILC       =  STACK_FRAME_OVERHEAD + __PT_ILC
-SP_TRAP      =  STACK_FRAME_OVERHEAD + __PT_TRAP
-SP_SIZE      =  STACK_FRAME_OVERHEAD + __PT_SIZE
+SP_PTREGS    =	STACK_FRAME_OVERHEAD
+SP_ARGS      =	STACK_FRAME_OVERHEAD + __PT_ARGS
+SP_PSW	     =	STACK_FRAME_OVERHEAD + __PT_PSW
+SP_R0	     =	STACK_FRAME_OVERHEAD + __PT_GPRS
+SP_R1	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 8
+SP_R2	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 16
+SP_R3	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 24
+SP_R4	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 32
+SP_R5	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 40
+SP_R6	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 48
+SP_R7	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 56
+SP_R8	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 64
+SP_R9	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 72
+SP_R10	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 80
+SP_R11	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 88
+SP_R12	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 96
+SP_R13	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 104
+SP_R14	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 112
+SP_R15	     =	STACK_FRAME_OVERHEAD + __PT_GPRS + 120
+SP_ORIG_R2   =	STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
+SP_ILC	     =	STACK_FRAME_OVERHEAD + __PT_ILC
+SP_TRAP      =	STACK_FRAME_OVERHEAD + __PT_TRAP
+SP_SIZE      =	STACK_FRAME_OVERHEAD + __PT_SIZE
 
 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
 STACK_SIZE  = 1 << STACK_SHIFT
@@ -71,14 +71,14 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
 #define TRACE_IRQS_OFF
 #endif
 
-	.macro  STORE_TIMER lc_offset
+	.macro	STORE_TIMER lc_offset
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 	stpt	\lc_offset
 #endif
 	.endm
 
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
-	.macro  UPDATE_VTIME lc_from,lc_to,lc_sum
+	.macro	UPDATE_VTIME lc_from,lc_to,lc_sum
 	lg	%r10,\lc_from
 	slg	%r10,\lc_to
 	alg	%r10,\lc_sum
@@ -94,7 +94,7 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
  *    R15 - kernel stack pointer
  */
 
-        .macro  SAVE_ALL_BASE savearea
+	.macro	SAVE_ALL_BASE savearea
 	stmg	%r12,%r15,\savearea
 	larl	%r13,system_call
 	.endm
@@ -139,8 +139,8 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
 	.endm
 
 	.macro	CREATE_STACK_FRAME psworg,savearea
-	aghi    %r15,-SP_SIZE		# make room for registers & psw
-	mvc     SP_PSW(16,%r15),0(%r12)	# move user PSW to stack
+	aghi	%r15,-SP_SIZE		# make room for registers & psw
+	mvc	SP_PSW(16,%r15),0(%r12)	# move user PSW to stack
 	la	%r12,\psworg
 	stg	%r2,SP_ORIG_R2(%r15)	# store original content of gpr 2
 	icm	%r12,12,__LC_SVC_ILC
@@ -149,7 +149,7 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
 	mvc	SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
 	la	%r12,0
 	stg	%r12,__SF_BACKCHAIN(%r15)
-        .endm
+	.endm
 
 	.macro	RESTORE_ALL psworg,sync
 	mvc	\psworg(16),SP_PSW(%r15) # move user PSW to lowcore
@@ -168,29 +168,29 @@ _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
  * Returns:
  *  gpr2 = prev
  */
-        .globl  __switch_to
+	.globl	__switch_to
 __switch_to:
 	tm	__THREAD_per+4(%r3),0xe8 # is the new process using per ?
 	jz	__switch_to_noper		# if not we're fine
-        stctg   %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
-        clc     __THREAD_per(24,%r3),__SF_EMPTY(%r15)
-        je      __switch_to_noper            # we got away without bashing TLB's
-        lctlg   %c9,%c11,__THREAD_per(%r3)	# Nope we didn't
+	stctg	%c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
+	clc	__THREAD_per(24,%r3),__SF_EMPTY(%r15)
+	je	__switch_to_noper	     # we got away without bashing TLB's
+	lctlg	%c9,%c11,__THREAD_per(%r3)	# Nope we didn't
 __switch_to_noper:
-	lg	%r4,__THREAD_info(%r2)              # get thread_info of prev
+	lg	%r4,__THREAD_info(%r2)		    # get thread_info of prev
 	tm	__TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
 	jz	__switch_to_no_mcck
 	ni	__TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
 	lg	%r4,__THREAD_info(%r3)		    # get thread_info of next
 	oi	__TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
 __switch_to_no_mcck:
-        stmg    %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
+	stmg	%r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
 	stg	%r15,__THREAD_ksp(%r2)	# store kernel stack to prev->tss.ksp
 	lg	%r15,__THREAD_ksp(%r3)	# load kernel stack from next->tss.ksp
-        lmg     %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
+	lmg	%r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
 	stg	%r3,__LC_CURRENT	# __LC_CURRENT = current task struct
 	lctl	%c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
-	lg	%r3,__THREAD_info(%r3)  # load thread_info from task struct
+	lg	%r3,__THREAD_info(%r3)	# load thread_info from task struct
 	stg	%r3,__LC_THREAD_INFO
 	aghi	%r3,STACK_SIZE
 	stg	%r3,__LC_KERNEL_STACK	# __LC_KERNEL_STACK = new kernel stack
@@ -202,14 +202,14 @@ __critical_start:
  * are executed with interrupts enabled.
  */
 
-	.globl  system_call
+	.globl	system_call
 system_call:
 	STORE_TIMER __LC_SYNC_ENTER_TIMER
 sysc_saveall:
 	SAVE_ALL_BASE __LC_SAVE_AREA
 	SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
-        CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
-	llgh    %r7,__LC_SVC_INT_CODE # get svc number from lowcore
+	CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
+	llgh	%r7,__LC_SVC_INT_CODE	# get svc number from lowcore
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 sysc_vtime:
 	tm	SP_PSW+1(%r15),0x01	# interrupting from user ?
@@ -222,45 +222,45 @@ sysc_update:
 #endif
 sysc_do_svc:
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
-        slag    %r7,%r7,2         # *4 and test for svc 0
+	slag	%r7,%r7,2	# *4 and test for svc 0
 	jnz	sysc_nr_ok
 	# svc 0: system call number in %r1
 	cl	%r1,BASED(.Lnr_syscalls)
 	jnl	sysc_nr_ok
-	lgfr	%r7,%r1           # clear high word in r1
-	slag    %r7,%r7,2         # svc 0: system call number in %r1
+	lgfr	%r7,%r1 	# clear high word in r1
+	slag	%r7,%r7,2	# svc 0: system call number in %r1
 sysc_nr_ok:
 	mvc	SP_ARGS(8,%r15),SP_R7(%r15)
 sysc_do_restart:
-	larl    %r10,sys_call_table
+	larl	%r10,sys_call_table
 #ifdef CONFIG_COMPAT
 	tm	__TI_flags+5(%r9),(_TIF_31BIT>>16)  # running in 31 bit mode ?
 	jno	sysc_noemu
-	larl    %r10,sys_call_table_emu  # use 31 bit emulation system calls
+	larl	%r10,sys_call_table_emu  # use 31 bit emulation system calls
 sysc_noemu:
 #endif
 	tm	__TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
-        lgf     %r8,0(%r7,%r10)   # load address of system call routine
-        jnz     sysc_tracesys
-        basr    %r14,%r8          # call sys_xxxx
-        stg     %r2,SP_R2(%r15)   # store return value (change R2 on stack)
-                                  # ATTENTION: check sys_execve_glue before
-                                  # changing anything here !!
+	lgf	%r8,0(%r7,%r10) # load address of system call routine
+	jnz	sysc_tracesys
+	basr	%r14,%r8	# call sys_xxxx
+	stg	%r2,SP_R2(%r15) # store return value (change R2 on stack)
+				# ATTENTION: check sys_execve_glue before
+				# changing anything here !!
 
 sysc_return:
-        tm      SP_PSW+1(%r15),0x01    # returning to user ?
-        jno     sysc_leave
+	tm	SP_PSW+1(%r15),0x01	# returning to user ?
+	jno	sysc_leave
 	tm	__TI_flags+7(%r9),_TIF_WORK_SVC
-	jnz	sysc_work         # there is work to do (signals etc.)
+	jnz	sysc_work	# there is work to do (signals etc.)
 sysc_leave:
-        RESTORE_ALL __LC_RETURN_PSW,1
+	RESTORE_ALL __LC_RETURN_PSW,1
 
 #
 # recheck if there is more work to do
 #
 sysc_work_loop:
 	tm	__TI_flags+7(%r9),_TIF_WORK_SVC
-	jz	sysc_leave        # there is no work to do
+	jz	sysc_leave	  # there is no work to do
 #
 # One of the work bits is on. Find out which one.
 #
@@ -279,25 +279,25 @@ sysc_work:
 
 #
 # _TIF_NEED_RESCHED is set, call schedule
-#	
-sysc_reschedule:        
-	larl    %r14,sysc_work_loop
-        jg      schedule            # return point is sysc_return
+#
+sysc_reschedule:
+	larl	%r14,sysc_work_loop
+	jg	schedule	# return point is sysc_return
 
 #
 # _TIF_MCCK_PENDING is set, call handler
 #
 sysc_mcck_pending:
 	larl	%r14,sysc_work_loop
-	jg	s390_handle_mcck    # TIF bit will be cleared by handler
+	jg	s390_handle_mcck	# TIF bit will be cleared by handler
 
 #
 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
 #
-sysc_sigpending:     
+sysc_sigpending:
 	ni	__TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
-        la      %r2,SP_PTREGS(%r15) # load pt_regs
-	brasl	%r14,do_signal    # call do_signal
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	brasl	%r14,do_signal		# call do_signal
 	tm	__TI_flags+7(%r9),_TIF_RESTART_SVC
 	jo	sysc_restart
 	tm	__TI_flags+7(%r9),_TIF_SINGLE_STEP
@@ -309,11 +309,11 @@ sysc_sigpending:
 #
 sysc_restart:
 	ni	__TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
-	lg	%r7,SP_R2(%r15)        # load new svc number
-        slag    %r7,%r7,2              # *4
+	lg	%r7,SP_R2(%r15)		# load new svc number
+	slag	%r7,%r7,2		# *4
 	mvc	SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
-	lmg	%r2,%r6,SP_R2(%r15)    # load svc arguments
-	j	sysc_do_restart        # restart svc
+	lmg	%r2,%r6,SP_R2(%r15)	# load svc arguments
+	j	sysc_do_restart 	# restart svc
 
 #
 # _TIF_SINGLE_STEP is set, call do_single_step
@@ -326,49 +326,48 @@ sysc_singlestep:
 	larl	%r14,sysc_return	# load adr. of system return
 	jg	do_single_step		# branch to do_sigtrap
 
-
 #
 # call syscall_trace before and after system call
 # special linkage: %r12 contains the return address for trace_svc
 #
 sysc_tracesys:
-	la	%r2,SP_PTREGS(%r15)    # load pt_regs
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
 	la	%r3,0
 	srl	%r7,2
-	stg     %r7,SP_R2(%r15)
-        brasl   %r14,syscall_trace
+	stg	%r7,SP_R2(%r15)
+	brasl	%r14,syscall_trace
 	lghi	%r0,NR_syscalls
 	clg	%r0,SP_R2(%r15)
 	jnh	sysc_tracenogo
-	lg	%r7,SP_R2(%r15)   # strace might have changed the
-	sll     %r7,2             #  system call
+	lg	%r7,SP_R2(%r15)		# strace might have changed the
+	sll	%r7,2			# system call
 	lgf	%r8,0(%r7,%r10)
 sysc_tracego:
-	lmg     %r3,%r6,SP_R3(%r15)
-	lg      %r2,SP_ORIG_R2(%r15)
-        basr    %r14,%r8            # call sys_xxx
-        stg     %r2,SP_R2(%r15)     # store return value
+	lmg	%r3,%r6,SP_R3(%r15)
+	lg	%r2,SP_ORIG_R2(%r15)
+	basr	%r14,%r8		# call sys_xxx
+	stg	%r2,SP_R2(%r15)		# store return value
 sysc_tracenogo:
 	tm	__TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
-        jz      sysc_return
-	la	%r2,SP_PTREGS(%r15)    # load pt_regs
+	jz	sysc_return
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
 	la	%r3,1
-	larl	%r14,sysc_return    # return point is sysc_return
+	larl	%r14,sysc_return	# return point is sysc_return
 	jg	syscall_trace
 
 #
 # a new process exits the kernel with ret_from_fork
 #
-        .globl  ret_from_fork
+	.globl	ret_from_fork
 ret_from_fork:
 	lg	%r13,__LC_SVC_NEW_PSW+8
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
 	tm	SP_PSW+1(%r15),0x01	# forking a kernel thread ?
 	jo	0f
 	stg	%r15,SP_R15(%r15)	# store stack pointer for new kthread
-0:	brasl   %r14,schedule_tail
+0:	brasl	%r14,schedule_tail
 	TRACE_IRQS_ON
-        stosm   24(%r15),0x03     # reenable interrupts
+	stosm	24(%r15),0x03		# reenable interrupts
 	j	sysc_return
 
 #
@@ -377,78 +376,78 @@ ret_from_fork:
 # but are called with different parameter.
 # return-address is set up above
 #
-sys_clone_glue: 
-        la      %r2,SP_PTREGS(%r15)    # load pt_regs
-        jg      sys_clone              # branch to sys_clone
+sys_clone_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	jg	sys_clone		# branch to sys_clone
 
 #ifdef CONFIG_COMPAT
-sys32_clone_glue: 
-        la      %r2,SP_PTREGS(%r15)    # load pt_regs
-        jg      sys32_clone            # branch to sys32_clone
+sys32_clone_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	jg	sys32_clone		# branch to sys32_clone
 #endif
 
-sys_fork_glue:  
-        la      %r2,SP_PTREGS(%r15)    # load pt_regs
-        jg      sys_fork               # branch to sys_fork
-
-sys_vfork_glue: 
-        la      %r2,SP_PTREGS(%r15)    # load pt_regs
-        jg      sys_vfork              # branch to sys_vfork
-
-sys_execve_glue:        
-        la      %r2,SP_PTREGS(%r15)   # load pt_regs
-	lgr     %r12,%r14             # save return address
-        brasl   %r14,sys_execve       # call sys_execve
-        ltgr    %r2,%r2               # check if execve failed
-        bnz     0(%r12)               # it did fail -> store result in gpr2
-        b       6(%r12)               # SKIP STG 2,SP_R2(15) in
-                                      # system_call/sysc_tracesys
+sys_fork_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	jg	sys_fork		# branch to sys_fork
+
+sys_vfork_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	jg	sys_vfork		# branch to sys_vfork
+
+sys_execve_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	lgr	%r12,%r14		# save return address
+	brasl	%r14,sys_execve 	# call sys_execve
+	ltgr	%r2,%r2 		# check if execve failed
+	bnz	0(%r12) 		# it did fail -> store result in gpr2
+	b	6(%r12) 		# SKIP STG 2,SP_R2(15) in
+					# system_call/sysc_tracesys
 #ifdef CONFIG_COMPAT
-sys32_execve_glue:        
-        la      %r2,SP_PTREGS(%r15)   # load pt_regs
-	lgr     %r12,%r14             # save return address
-        brasl   %r14,sys32_execve     # call sys32_execve
-        ltgr    %r2,%r2               # check if execve failed
-        bnz     0(%r12)               # it did fail -> store result in gpr2
-        b       6(%r12)               # SKIP STG 2,SP_R2(15) in
-                                      # system_call/sysc_tracesys
+sys32_execve_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
+	lgr	%r12,%r14		# save return address
+	brasl	%r14,sys32_execve	# call sys32_execve
+	ltgr	%r2,%r2 		# check if execve failed
+	bnz	0(%r12) 		# it did fail -> store result in gpr2
+	b	6(%r12) 		# SKIP STG 2,SP_R2(15) in
+					# system_call/sysc_tracesys
 #endif
 
-sys_sigreturn_glue:     
-        la      %r2,SP_PTREGS(%r15)   # load pt_regs as parameter
-        jg      sys_sigreturn         # branch to sys_sigreturn
+sys_sigreturn_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs as parameter
+	jg	sys_sigreturn		# branch to sys_sigreturn
 
 #ifdef CONFIG_COMPAT
-sys32_sigreturn_glue:     
-        la      %r2,SP_PTREGS(%r15)   # load pt_regs as parameter
-        jg      sys32_sigreturn       # branch to sys32_sigreturn
+sys32_sigreturn_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs as parameter
+	jg	sys32_sigreturn 	# branch to sys32_sigreturn
 #endif
 
-sys_rt_sigreturn_glue:     
-        la      %r2,SP_PTREGS(%r15)   # load pt_regs as parameter
-        jg      sys_rt_sigreturn      # branch to sys_sigreturn
+sys_rt_sigreturn_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs as parameter
+	jg	sys_rt_sigreturn	# branch to sys_sigreturn
 
 #ifdef CONFIG_COMPAT
-sys32_rt_sigreturn_glue:     
-        la      %r2,SP_PTREGS(%r15)   # load pt_regs as parameter
-        jg      sys32_rt_sigreturn    # branch to sys32_sigreturn
+sys32_rt_sigreturn_glue:
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs as parameter
+	jg	sys32_rt_sigreturn	# branch to sys32_sigreturn
 #endif
 
 sys_sigaltstack_glue:
-        la      %r4,SP_PTREGS(%r15)   # load pt_regs as parameter
-        jg      sys_sigaltstack       # branch to sys_sigreturn
+	la	%r4,SP_PTREGS(%r15)	# load pt_regs as parameter
+	jg	sys_sigaltstack 	# branch to sys_sigreturn
 
 #ifdef CONFIG_COMPAT
 sys32_sigaltstack_glue:
-        la      %r4,SP_PTREGS(%r15)   # load pt_regs as parameter
-        jg      sys32_sigaltstack_wrapper # branch to sys_sigreturn
+	la	%r4,SP_PTREGS(%r15)	# load pt_regs as parameter
+	jg	sys32_sigaltstack_wrapper # branch to sys_sigreturn
 #endif
 
 /*
  * Program check handler routine
  */
 
-        .globl  pgm_check_handler
+	.globl	pgm_check_handler
 pgm_check_handler:
 /*
  * First we need to check for a special case:
@@ -465,8 +464,8 @@ pgm_check_handler:
  */
 	STORE_TIMER __LC_SYNC_ENTER_TIMER
 	SAVE_ALL_BASE __LC_SAVE_AREA
-        tm      __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
-        jnz     pgm_per                  # got per exception -> special case
+	tm	__LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
+	jnz	pgm_per 		 # got per exception -> special case
 	SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
 	CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
@@ -478,29 +477,29 @@ pgm_check_handler:
 pgm_no_vtime:
 #endif
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
-	lgf     %r3,__LC_PGM_ILC	 # load program interruption code
+	lgf	%r3,__LC_PGM_ILC	# load program interruption code
 	lghi	%r8,0x7f
 	ngr	%r8,%r3
 pgm_do_call:
-        sll     %r8,3
-        larl    %r1,pgm_check_table
-        lg      %r1,0(%r8,%r1)		 # load address of handler routine
-        la      %r2,SP_PTREGS(%r15)	 # address of register-save area
+	sll	%r8,3
+	larl	%r1,pgm_check_table
+	lg	%r1,0(%r8,%r1)		# load address of handler routine
+	la	%r2,SP_PTREGS(%r15)	# address of register-save area
 	larl	%r14,sysc_return
-        br      %r1			 # branch to interrupt-handler
+	br	%r1			# branch to interrupt-handler
 
 #
 # handle per exception
 #
 pgm_per:
-        tm      __LC_PGM_OLD_PSW,0x40    # test if per event recording is on
-        jnz     pgm_per_std              # ok, normal per event from user space
+	tm	__LC_PGM_OLD_PSW,0x40	# test if per event recording is on
+	jnz	pgm_per_std		# ok, normal per event from user space
 # ok its one of the special cases, now we need to find out which one
-        clc     __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
-        je      pgm_svcper
+	clc	__LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
+	je	pgm_svcper
 # no interesting special case, ignore PER event
 	lmg	%r12,%r15,__LC_SAVE_AREA
-	lpswe   __LC_PGM_OLD_PSW
+	lpswe	__LC_PGM_OLD_PSW
 
 #
 # Normal per exception
@@ -524,9 +523,9 @@ pgm_no_vtime2:
 	mvc	__THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
 	mvc	__THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
 	oi	__TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
-	lgf     %r3,__LC_PGM_ILC	 # load program interruption code
+	lgf	%r3,__LC_PGM_ILC	# load program interruption code
 	lghi	%r8,0x7f
-	ngr	%r8,%r3			 # clear per-event-bit and ilc
+	ngr	%r8,%r3			# clear per-event-bit and ilc
 	je	sysc_return
 	j	pgm_do_call
 
@@ -544,7 +543,7 @@ pgm_svcper:
 	mvc	__LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 pgm_no_vtime3:
 #endif
-	llgh    %r7,__LC_SVC_INT_CODE	# get svc number from lowcore
+	llgh	%r7,__LC_SVC_INT_CODE	# get svc number from lowcore
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
 	lg	%r1,__TI_task(%r9)
 	mvc	__THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
@@ -568,7 +567,7 @@ kernel_per:
 /*
  * IO interrupt handler routine
  */
-        .globl io_int_handler
+	.globl io_int_handler
 io_int_handler:
 	STORE_TIMER __LC_ASYNC_ENTER_TIMER
 	stck	__LC_INT_CLOCK
@@ -585,42 +584,42 @@ io_no_vtime:
 #endif
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
 	TRACE_IRQS_OFF
-        la      %r2,SP_PTREGS(%r15)    # address of register-save area
-	brasl   %r14,do_IRQ            # call standard irq handler
+	la	%r2,SP_PTREGS(%r15)	# address of register-save area
+	brasl	%r14,do_IRQ		# call standard irq handler
 	TRACE_IRQS_ON
 
 io_return:
-        tm      SP_PSW+1(%r15),0x01    # returning to user ?
+	tm	SP_PSW+1(%r15),0x01	# returning to user ?
 #ifdef CONFIG_PREEMPT
-	jno     io_preempt             # no -> check for preemptive scheduling
+	jno	io_preempt		# no -> check for preemptive scheduling
 #else
-        jno     io_leave               # no-> skip resched & signal
+	jno	io_leave		# no-> skip resched & signal
 #endif
 	tm	__TI_flags+7(%r9),_TIF_WORK_INT
-	jnz	io_work                # there is work to do (signals etc.)
+	jnz	io_work 		# there is work to do (signals etc.)
 io_leave:
-        RESTORE_ALL __LC_RETURN_PSW,0
+	RESTORE_ALL __LC_RETURN_PSW,0
 io_done:
 
 #ifdef CONFIG_PREEMPT
 io_preempt:
-	icm	%r0,15,__TI_precount(%r9)	
-	jnz     io_leave
+	icm	%r0,15,__TI_precount(%r9)
+	jnz	io_leave
 	# switch to kernel stack
 	lg	%r1,SP_R15(%r15)
 	aghi	%r1,-SP_SIZE
 	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
-        xc      __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
+	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
 	lgr	%r15,%r1
 io_resume_loop:
 	tm	__TI_flags+7(%r9),_TIF_NEED_RESCHED
 	jno	io_leave
-	larl    %r1,.Lc_pactive
-	mvc     __TI_precount(4,%r9),0(%r1)
-        stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
-	brasl   %r14,schedule          # call schedule
-        stnsm   __SF_EMPTY(%r15),0xfc   # disable I/O and ext. interrupts
-	xc      __TI_precount(4,%r9),__TI_precount(%r9)
+	larl	%r1,.Lc_pactive
+	mvc	__TI_precount(4,%r9),0(%r1)
+	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
+	brasl	%r14,schedule		# call schedule
+	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
+	xc	__TI_precount(4,%r9),__TI_precount(%r9)
 	j	io_resume_loop
 #endif
 
@@ -631,7 +630,7 @@ io_work:
 	lg	%r1,__LC_KERNEL_STACK
 	aghi	%r1,-SP_SIZE
 	mvc	SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
-        xc      __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
+	xc	__SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
 	lgr	%r15,%r1
 #
 # One of the work bits is on. Find out which one.
@@ -656,11 +655,11 @@ io_mcck_pending:
 
 #
 # _TIF_NEED_RESCHED is set, call schedule
-#	
-io_reschedule:        
-	stosm   __SF_EMPTY(%r15),0x03	# reenable interrupts
-	brasl   %r14,schedule		# call scheduler
-	stnsm   __SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
+#
+io_reschedule:
+	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
+	brasl	%r14,schedule		# call scheduler
+	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
 	tm	__TI_flags+7(%r9),_TIF_WORK_INT
 	jz	io_leave		# there is no work to do
 	j	io_work_loop
@@ -668,17 +667,17 @@ io_reschedule:
 #
 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
 #
-io_sigpending:     
-	stosm   __SF_EMPTY(%r15),0x03	# reenable interrupts
-	la      %r2,SP_PTREGS(%r15)	# load pt_regs
+io_sigpending:
+	stosm	__SF_EMPTY(%r15),0x03	# reenable interrupts
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
 	brasl	%r14,do_signal		# call do_signal
-	stnsm   __SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
+	stnsm	__SF_EMPTY(%r15),0xfc	# disable I/O and ext. interrupts
 	j	io_work_loop
 
 /*
  * External interrupt handler routine
  */
-        .globl  ext_int_handler
+	.globl	ext_int_handler
 ext_int_handler:
 	STORE_TIMER __LC_ASYNC_ENTER_TIMER
 	stck	__LC_INT_CLOCK
@@ -695,9 +694,9 @@ ext_no_vtime:
 #endif
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
 	TRACE_IRQS_OFF
-	la	%r2,SP_PTREGS(%r15)    # address of register-save area
-	llgh	%r3,__LC_EXT_INT_CODE  # get interruption code
-	brasl   %r14,do_extint
+	la	%r2,SP_PTREGS(%r15)	# address of register-save area
+	llgh	%r3,__LC_EXT_INT_CODE	# get interruption code
+	brasl	%r14,do_extint
 	TRACE_IRQS_ON
 	j	io_return
 
@@ -706,14 +705,14 @@ __critical_end:
 /*
  * Machine check handler routines
  */
-        .globl mcck_int_handler
+	.globl mcck_int_handler
 mcck_int_handler:
 	la	%r1,4095		# revalidate r1
 	spt	__LC_CPU_TIMER_SAVE_AREA-4095(%r1)	# revalidate cpu timer
-  	lmg     %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
+	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
 	SAVE_ALL_BASE __LC_SAVE_AREA+64
 	la	%r12,__LC_MCK_OLD_PSW
-	tm	__LC_MCCK_CODE,0x80     # system damage?
+	tm	__LC_MCCK_CODE,0x80	# system damage?
 	jo	mcck_int_main		# yes -> rest of mcck code invalid
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 	la	%r14,4095
@@ -737,19 +736,19 @@ mcck_int_handler:
 #endif
 	tm	__LC_MCCK_CODE+2,0x09	# mwp + ia of old psw valid?
 	jno	mcck_int_main		# no -> skip cleanup critical
-	tm      __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
+	tm	__LC_MCK_OLD_PSW+1,0x01 # test problem state bit
 	jnz	mcck_int_main		# from user -> load kernel stack
 	clc	__LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
 	jhe	mcck_int_main
-	clc     __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
+	clc	__LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
 	jl	mcck_int_main
-	brasl   %r14,cleanup_critical
+	brasl	%r14,cleanup_critical
 mcck_int_main:
-	lg      %r14,__LC_PANIC_STACK   # are we already on the panic stack?
+	lg	%r14,__LC_PANIC_STACK	# are we already on the panic stack?
 	slgr	%r14,%r15
 	srag	%r14,%r14,PAGE_SHIFT
 	jz	0f
-	lg      %r15,__LC_PANIC_STACK   # load panic stack
+	lg	%r15,__LC_PANIC_STACK	# load panic stack
 0:	CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 	tm	__LC_MCCK_CODE+2,0x08	# mwp of old psw valid?
@@ -764,7 +763,7 @@ mcck_no_vtime:
 	lg	%r9,__LC_THREAD_INFO	# load pointer to thread_info struct
 	la	%r2,SP_PTREGS(%r15)	# load pt_regs
 	brasl	%r14,s390_do_machine_check
-	tm	SP_PSW+1(%r15),0x01     # returning to user ?
+	tm	SP_PSW+1(%r15),0x01	# returning to user ?
 	jno	mcck_return
 	lg	%r1,__LC_KERNEL_STACK	# switch to kernel stack
 	aghi	%r1,-SP_SIZE
@@ -794,28 +793,28 @@ mcck_return:
 /*
  * Restart interruption handler, kick starter for additional CPUs
  */
-        .globl restart_int_handler
+	.globl restart_int_handler
 restart_int_handler:
-        lg      %r15,__LC_SAVE_AREA+120 # load ksp
-        lghi    %r10,__LC_CREGS_SAVE_AREA
-        lctlg   %c0,%c15,0(%r10) # get new ctl regs
-        lghi    %r10,__LC_AREGS_SAVE_AREA
-        lam     %a0,%a15,0(%r10)
-        lmg     %r6,%r15,__SF_GPRS(%r15) # load registers from clone
-        stosm   __SF_EMPTY(%r15),0x04    # now we can turn dat on
-	jg      start_secondary
+	lg	%r15,__LC_SAVE_AREA+120 # load ksp
+	lghi	%r10,__LC_CREGS_SAVE_AREA
+	lctlg	%c0,%c15,0(%r10) # get new ctl regs
+	lghi	%r10,__LC_AREGS_SAVE_AREA
+	lam	%a0,%a15,0(%r10)
+	lmg	%r6,%r15,__SF_GPRS(%r15) # load registers from clone
+	stosm	__SF_EMPTY(%r15),0x04	# now we can turn dat on
+	jg	start_secondary
 #else
 /*
  * If we do not run with SMP enabled, let the new CPU crash ...
  */
-        .globl restart_int_handler
+	.globl restart_int_handler
 restart_int_handler:
-        basr    %r1,0
+	basr	%r1,0
 restart_base:
-        lpswe   restart_crash-restart_base(%r1)
-        .align 8
+	lpswe	restart_crash-restart_base(%r1)
+	.align 8
 restart_crash:
-        .long  0x000a0000,0x00000000,0x00000000,0x00000000
+	.long  0x000a0000,0x00000000,0x00000000,0x00000000
 restart_go:
 #endif
 
@@ -836,9 +835,9 @@ stack_overflow:
 	chi	%r12,__LC_PGM_OLD_PSW
 	je	0f
 	la	%r1,__LC_SAVE_AREA+32
-0:	mvc	SP_R12(32,%r15),0(%r1)  # move %r12-%r15 to stack
-        xc      __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
-        la      %r2,SP_PTREGS(%r15)	# load pt_regs
+0:	mvc	SP_R12(32,%r15),0(%r1)	# move %r12-%r15 to stack
+	xc	__SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
+	la	%r2,SP_PTREGS(%r15)	# load pt_regs
 	jg	kernel_stack_overflow
 #endif
 
@@ -941,10 +940,10 @@ cleanup_novtime:
 cleanup_system_call_insn:
 	.quad	sysc_saveall
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
-	.quad   system_call
-	.quad   sysc_vtime
-	.quad   sysc_stime
-	.quad   sysc_update
+	.quad	system_call
+	.quad	sysc_vtime
+	.quad	sysc_stime
+	.quad	sysc_update
 #endif
 
 cleanup_sysc_return:
@@ -1010,21 +1009,21 @@ cleanup_io_leave_insn:
 /*
  * Integer constants
  */
-               .align 4
+		.align	4
 .Lconst:
-.Lc_pactive:   .long  PREEMPT_ACTIVE
-.Lnr_syscalls: .long  NR_syscalls
-.L0x0130:      .short 0x130
-.L0x0140:      .short 0x140
-.L0x0150:      .short 0x150
-.L0x0160:      .short 0x160
-.L0x0170:      .short 0x170
+.Lc_pactive:	.long	PREEMPT_ACTIVE
+.Lnr_syscalls:	.long	NR_syscalls
+.L0x0130:	.short	0x130
+.L0x0140:	.short	0x140
+.L0x0150:	.short	0x150
+.L0x0160:	.short	0x160
+.L0x0170:	.short	0x170
 .Lcritical_start:
-               .quad  __critical_start
+		.quad	__critical_start
 .Lcritical_end:
-               .quad  __critical_end
+		.quad	__critical_end
 
-	       .section .rodata, "a"
+		.section .rodata, "a"
 #define SYSCALL(esa,esame,emu)	.long esame
 sys_call_table:
 #include "syscalls.S"
-- 
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