From 8b27f0b61db57f5555fc2d3fc95c3ea9fd1a9d6c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 15 Oct 2009 12:49:01 -0500 Subject: powerpc/fsl-booke: Rework TLB CAM code Re-write the code so its more standalone and fixed some issues: * Bump'd # of CAM entries to 64 to support e500mc * Make the code handle MAS7 properly * Use pr_cont instead of creating a string as we go Signed-off-by: Kumar Gala --- arch/powerpc/kernel/head_fsl_booke.S | 22 ---------------------- 1 file changed, 22 deletions(-) (limited to 'arch/powerpc/kernel/head_fsl_booke.S') diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 975788c..7f4bd7f 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -944,28 +944,6 @@ _GLOBAL(__setup_e500mc_ivors) blr /* - * extern void loadcam_entry(unsigned int index) - * - * Load TLBCAM[index] entry in to the L2 CAM MMU - */ -_GLOBAL(loadcam_entry) - lis r4,TLBCAM@ha - addi r4,r4,TLBCAM@l - mulli r5,r3,TLBCAM_SIZE - add r3,r5,r4 - lwz r4,0(r3) - mtspr SPRN_MAS0,r4 - lwz r4,4(r3) - mtspr SPRN_MAS1,r4 - lwz r4,8(r3) - mtspr SPRN_MAS2,r4 - lwz r4,12(r3) - mtspr SPRN_MAS3,r4 - tlbwe - isync - blr - -/* * extern void giveup_altivec(struct task_struct *prev) * * The e500 core does not have an AltiVec unit. -- cgit v1.1