From c48d0dbaac7f27c083430170c66194d6a523bc2a Mon Sep 17 00:00:00 2001 From: Dave Kleikamp Date: Wed, 26 Jan 2011 06:17:58 +0000 Subject: powerpc/476: define specific cpu table entry DD2 core The DD2 core still has some unstability. Define CPU_FTR_476_DD2 to enable workarounds in later patches. This is based on an earlier, unreleased patch for DD1 by Ben Herrenschmidt. Signed-off-by: Dave Kleikamp Signed-off-by: Josh Boyer --- arch/powerpc/include/asm/cputable.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index f0a211d..be3cdf9 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h @@ -154,6 +154,7 @@ extern const char *powerpc_base_platform; #define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) #define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) #define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) +#define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000) #define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) #define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) #define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) @@ -465,7 +466,7 @@ enum { CPU_FTRS_44X | CPU_FTRS_440x6 | #endif #ifdef CONFIG_PPC_47x - CPU_FTRS_47X | + CPU_FTRS_47X | CPU_FTR_476_DD2 | #endif #ifdef CONFIG_E200 CPU_FTRS_E200 | -- cgit v1.1 From 089fb442f3018a3ed094f8ac7a7cc2d3bd03b114 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Fri, 21 Jan 2011 06:12:28 +0000 Subject: powerpc: Use ARCH_IRQ_INIT_FLAGS Define the ARCH_IRQ_INIT_FLAGS instead of fixing it up in a loop. Signed-off-by: Thomas Gleixner Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/hw_irq.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index ff08b70..bb712c9 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -141,6 +141,8 @@ static inline bool arch_irqs_disabled(void) #endif /* CONFIG_PPC64 */ +#define ARCH_IRQ_INIT_FLAGS IRQ_NOREQUEST + /* * interrupt-retrigger: should we handle this via lost interrupts and IPIs * or should we not care like we do now ? --BenH. -- cgit v1.1 From fe3cc0d99de6a9bf99b6c279a8afb5833888c1f7 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Mon, 28 Feb 2011 20:00:47 +0000 Subject: powerpc: Add pgprot_writecombine A number of drivers are using pgprot_writecombine() to enable write combining on userspace mappings. Implement it on powerpc. Signed-off-by: Anton Blanchard Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/pgtable.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h index 89f1587..88b0bd9 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h @@ -170,6 +170,7 @@ extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addre #define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \ _PAGE_COHERENT | _PAGE_WRITETHRU)) +#define pgprot_writecombine pgprot_noncached_wc struct file; extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, -- cgit v1.1 From 0f4ac132365e56802cbe377313491aa84086371c Mon Sep 17 00:00:00 2001 From: Jim Keniston Date: Wed, 9 Feb 2011 12:43:13 +0000 Subject: powerpc/nvram: Generalize code for OS partitions in NVRAM Adapt the functions used to create and write to the RTAS-log partition to work with any OS-type partition. Signed-off-by: Jim Keniston Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/nvram.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/nvram.h b/arch/powerpc/include/asm/nvram.h index 92efe67..9d1aafe 100644 --- a/arch/powerpc/include/asm/nvram.h +++ b/arch/powerpc/include/asm/nvram.h @@ -51,7 +51,8 @@ static inline int mmio_nvram_init(void) extern int __init nvram_scan_partitions(void); extern loff_t nvram_create_partition(const char *name, int sig, int req_size, int min_size); -extern int nvram_remove_partition(const char *name, int sig); +extern int nvram_remove_partition(const char *name, int sig, + const char *exceptions[]); extern int nvram_get_partition_size(loff_t data_index); extern loff_t nvram_find_partition(const char *name, int sig, int *out_size); -- cgit v1.1 From 6edc642ebee87dfceb97050d51c5ab1fe539a597 Mon Sep 17 00:00:00 2001 From: "Tseng-Hui (Frank) Lin" Date: Wed, 2 Mar 2011 07:20:50 +0000 Subject: powerpc: Cleanup definition of the PID register Move SPRN_PID declearations in various locations into one place. Signed-off-by: Tseng-Hui (Frank) Lin Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/reg.h | 10 ++++++++++ arch/powerpc/include/asm/reg_booke.h | 3 --- 2 files changed, 10 insertions(+), 3 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 125fc1a..bd0d36e 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -170,6 +170,16 @@ #define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ /* Special Purpose Registers (SPRNs)*/ + +#ifdef CONFIG_40x +#define SPRN_PID 0x3B1 /* Process ID */ +#else +#define SPRN_PID 0x030 /* Process ID */ +#ifdef CONFIG_BOOKE +#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */ +#endif +#endif + #define SPRN_CTR 0x009 /* Count Register */ #define SPRN_DSCR 0x11 #define SPRN_CTRLF 0x088 diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index e68c69b..86ad812 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -150,8 +150,6 @@ * or IBM 40x. */ #ifdef CONFIG_BOOKE -#define SPRN_PID 0x030 /* Process ID */ -#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */ #define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */ #define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */ #define SPRN_DEAR 0x03D /* Data Error Address Register */ @@ -168,7 +166,6 @@ #define SPRN_TCR 0x154 /* Timer Control Register */ #endif /* Book E */ #ifdef CONFIG_40x -#define SPRN_PID 0x3B1 /* Process ID */ #define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */ #define SPRN_ESR 0x3D4 /* Exception Syndrome Register */ #define SPRN_DEAR 0x3D5 /* Data Error Address Register */ -- cgit v1.1 From 835c0553eb151588b6a1b52b28ecbbd59f7ff052 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 8 Mar 2011 22:26:43 +0000 Subject: powerpc: mpic irq_data conversion. Signed-off-by: Lennert Buytenhek Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/mpic.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index e000cce..946ec49 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h @@ -467,11 +467,11 @@ extern void mpic_request_ipis(void); void smp_mpic_message_pass(int target, int msg); /* Unmask a specific virq */ -extern void mpic_unmask_irq(unsigned int irq); +extern void mpic_unmask_irq(struct irq_data *d); /* Mask a specific virq */ -extern void mpic_mask_irq(unsigned int irq); +extern void mpic_mask_irq(struct irq_data *d); /* EOI a specific virq */ -extern void mpic_end_irq(unsigned int irq); +extern void mpic_end_irq(struct irq_data *d); /* Fetch interrupt from a given mpic */ extern unsigned int mpic_get_one_irq(struct mpic *mpic); -- cgit v1.1 From 3a0adfab4a9773e70b5448a9dbc785a48d12d713 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Tue, 8 Mar 2011 22:27:00 +0000 Subject: powerpc: sysdev/qe_lib/qe_ic irq_data conversion. Signed-off-by: Lennert Buytenhek Signed-off-by: Benjamin Herrenschmidt --- arch/powerpc/include/asm/qe_ic.h | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h index cf51966..9e2cb201 100644 --- a/arch/powerpc/include/asm/qe_ic.h +++ b/arch/powerpc/include/asm/qe_ic.h @@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); static inline void qe_ic_cascade_low_ipic(unsigned int irq, struct irq_desc *desc) { - struct qe_ic *qe_ic = desc->handler_data; + struct qe_ic *qe_ic = get_irq_desc_data(desc); unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); if (cascade_irq != NO_IRQ) @@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq, static inline void qe_ic_cascade_high_ipic(unsigned int irq, struct irq_desc *desc) { - struct qe_ic *qe_ic = desc->handler_data; + struct qe_ic *qe_ic = get_irq_desc_data(desc); unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); if (cascade_irq != NO_IRQ) @@ -101,32 +101,35 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq, static inline void qe_ic_cascade_low_mpic(unsigned int irq, struct irq_desc *desc) { - struct qe_ic *qe_ic = desc->handler_data; + struct qe_ic *qe_ic = get_irq_desc_data(desc); unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); + struct irq_chip *chip = get_irq_desc_chip(desc); if (cascade_irq != NO_IRQ) generic_handle_irq(cascade_irq); - desc->chip->eoi(irq); + chip->irq_eoi(&desc->irq_data); } static inline void qe_ic_cascade_high_mpic(unsigned int irq, struct irq_desc *desc) { - struct qe_ic *qe_ic = desc->handler_data; + struct qe_ic *qe_ic = get_irq_desc_data(desc); unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); + struct irq_chip *chip = get_irq_desc_chip(desc); if (cascade_irq != NO_IRQ) generic_handle_irq(cascade_irq); - desc->chip->eoi(irq); + chip->irq_eoi(&desc->irq_data); } static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, struct irq_desc *desc) { - struct qe_ic *qe_ic = desc->handler_data; + struct qe_ic *qe_ic = get_irq_desc_data(desc); unsigned int cascade_irq; + struct irq_chip *chip = get_irq_desc_chip(desc); cascade_irq = qe_ic_get_high_irq(qe_ic); if (cascade_irq == NO_IRQ) @@ -135,7 +138,7 @@ static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, if (cascade_irq != NO_IRQ) generic_handle_irq(cascade_irq); - desc->chip->eoi(irq); + chip->irq_eoi(&desc->irq_data); } #endif /* _ASM_POWERPC_QE_IC_H */ -- cgit v1.1 From ac6f120369ffe66058518fabf90cdd53b2503a82 Mon Sep 17 00:00:00 2001 From: Liu Yu Date: Tue, 25 Jan 2011 14:02:13 +0800 Subject: powerpc/85xx: Workaroudn e500 CPU erratum A005 This erratum can occur if a single-precision floating-point, double-precision floating-point or vector floating-point instruction on a mispredicted branch path signals one of the floating-point data interrupts which are enabled by the SPEFSCR (FINVE, FDBZE, FUNFE or FOVFE bits). This interrupt must be recorded in a one-cycle window when the misprediction is resolved. If this extremely rare event should occur, the result could be: The SPE Data Exception from the mispredicted path may be reported erroneously if a single-precision floating-point, double-precision floating-point or vector floating-point instruction is the second instruction on the correct branch path. According to errata description, some efp instructions which are not supposed to trigger SPE exceptions can trigger the exceptions in this case. However, as we haven't emulated these instructions here, a signal will send to userspace, and userspace application would exit. This patch re-issue the efp instruction that we haven't emulated, so that hardware can properly execute it again if this case happen. Signed-off-by: Liu Yu Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/reg.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/powerpc/include') diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index bd0d36e..1bc6a12 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -862,6 +862,8 @@ #define PVR_7450 0x80000000 #define PVR_8540 0x80200000 #define PVR_8560 0x80200000 +#define PVR_VER_E500V1 0x8020 +#define PVR_VER_E500V2 0x8021 /* * For the 8xx processors, all of them report the same PVR family for * the PowerPC core. The various versions of these processors must be -- cgit v1.1