From 74ad3d28af2104b92dd83a43add79e6a8c45d8e2 Mon Sep 17 00:00:00 2001 From: Babu Moger Date: Thu, 6 Jul 2017 09:34:19 -0700 Subject: parisc: Define CONFIG_CPU_BIG_ENDIAN While working on enabling queued rwlock on SPARC, found this following code in include/asm-generic/qrwlock.h which uses CONFIG_CPU_BIG_ENDIAN to clear a byte. static inline u8 *__qrwlock_write_byte(struct qrwlock *lock) { return (u8 *)lock + 3 * IS_BUILTIN(CONFIG_CPU_BIG_ENDIAN); } Problem is many of the fixed big endian architectures don't define CPU_BIG_ENDIAN and clears the wrong byte. Define CPU_BIG_ENDIAN for parisc architecture to fix it. Signed-off-by: Babu Moger Signed-off-by: Helge Deller --- arch/parisc/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/parisc') diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 531da9e..dda1f55 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig @@ -47,6 +47,9 @@ config PARISC and later HP3000 series). The PA-RISC Linux project home page is at . +config CPU_BIG_ENDIAN + def_bool y + config MMU def_bool y -- cgit v1.1