From 195d1a96ae5fdfbedb8dc4b97afee578921fa99e Mon Sep 17 00:00:00 2001 From: peter fuerst Date: Sun, 17 May 2009 23:49:45 +0200 Subject: MIPS: IP28: Change to build with -mr10k-cache-barrier=store Richard Sandiford's new code for inserting the cache-barriers, for GCC 4.3 and above and already incorporated in the current GCC-release, uses a slightly different option-syntax. Signed-off-by: peter fuerst Signed-off-by: Ralf Baechle --- arch/mips/Makefile | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/mips') diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 26947ab..c4cae9e 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -473,12 +473,12 @@ endif # Simplified: what IP22 does at 128MB+ in ksegN, IP28 does at 512MB+ in xkphys # ifdef CONFIG_SGI_IP28 - ifeq ($(call cc-option-yn,-mr10k-cache-barrier=1), n) - $(error gcc doesn't support needed option -mr10k-cache-barrier=1) + ifeq ($(call cc-option-yn,-mr10k-cache-barrier=store), n) + $(error gcc doesn't support needed option -mr10k-cache-barrier=store) endif endif core-$(CONFIG_SGI_IP28) += arch/mips/sgi-ip22/ -cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=1 -I$(srctree)/arch/mips/include/asm/mach-ip28 +cflags-$(CONFIG_SGI_IP28) += -mr10k-cache-barrier=store -I$(srctree)/arch/mips/include/asm/mach-ip28 load-$(CONFIG_SGI_IP28) += 0xa800000020004000 # -- cgit v1.1