From 77ae798f5b736dfdc692b86b393d9699052ac77a Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Wed, 31 Oct 2012 12:01:39 +0000 Subject: MIPS: Netlogic: Support for multi-chip configuration Upto 4 Netlogic XLP SoCs can be connected over ICI links to form a coherent multi-node system. Each SoC has its own set of on-chip devices including PIC. To support this, add a per SoC stucture and use it for the PIC and SYS block addresses instead of using global variables. Signed-off-by: Jayachandran C Patchwork: http://patchwork.linux-mips.org/patch/4469 Signed-off-by: John Crispin --- arch/mips/netlogic/xlr/setup.c | 20 +++++++++++++------- arch/mips/netlogic/xlr/wakeup.c | 21 +++++++++++++++++++-- 2 files changed, 32 insertions(+), 9 deletions(-) (limited to 'arch/mips/netlogic/xlr') diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c index 8fca680..696d424 100644 --- a/arch/mips/netlogic/xlr/setup.c +++ b/arch/mips/netlogic/xlr/setup.c @@ -51,14 +51,11 @@ #include uint64_t nlm_io_base = DEFAULT_NETLOGIC_IO_BASE; -uint64_t nlm_pic_base; struct psb_info nlm_prom_info; -unsigned long nlm_common_ebase = 0x0; - /* default to uniprocessor */ -uint32_t nlm_coremask = 1; -int nlm_threads_per_core = 1; +unsigned int nlm_threads_per_core = 1; +struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; cpumask_t nlm_cpumask = CPU_MASK_CPU0; static void __init nlm_early_serial_setup(void) @@ -177,6 +174,16 @@ static void prom_add_memory(void) } } +static void nlm_init_node(void) +{ + struct nlm_soc_info *nodep; + + nodep = nlm_current_node(); + nodep->picbase = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET); + nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1)); + spin_lock_init(&nodep->piclock); +} + void __init prom_init(void) { int i, *argv, *envp; /* passed as 32 bit ptrs */ @@ -188,11 +195,10 @@ void __init prom_init(void) prom_infop = (struct psb_info *)(long)(int)fw_arg3; nlm_prom_info = *prom_infop; - nlm_pic_base = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET); + nlm_init_node(); nlm_early_serial_setup(); build_arcs_cmdline(argv); - nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1)); prom_add_memory(); #ifdef CONFIG_SMP diff --git a/arch/mips/netlogic/xlr/wakeup.c b/arch/mips/netlogic/xlr/wakeup.c index 0878924..3ebf741 100644 --- a/arch/mips/netlogic/xlr/wakeup.c +++ b/arch/mips/netlogic/xlr/wakeup.c @@ -33,6 +33,7 @@ */ #include +#include #include #include @@ -50,18 +51,34 @@ int __cpuinit xlr_wakeup_secondary_cpus(void) { - unsigned int i, boot_cpu; + struct nlm_soc_info *nodep; + unsigned int i, j, boot_cpu; /* * In case of RMI boot, hit with NMI to get the cores * from bootloader to linux code. */ + nodep = nlm_get_node(0); boot_cpu = hard_smp_processor_id(); nlm_set_nmi_handler(nlm_rmiboot_preboot); for (i = 0; i < NR_CPUS; i++) { if (i == boot_cpu || !cpumask_test_cpu(i, &nlm_cpumask)) continue; - nlm_pic_send_ipi(nlm_pic_base, i, 1, 1); /* send NMI */ + nlm_pic_send_ipi(nodep->picbase, i, 1, 1); /* send NMI */ + } + + /* Fill up the coremask early */ + nodep->coremask = 1; + for (i = 1; i < NLM_CORES_PER_NODE; i++) { + for (j = 1000000; j > 0; j--) { + if (nlm_cpu_ready[i * NLM_THREADS_PER_CORE]) + break; + udelay(10); + } + if (j != 0) + nodep->coremask |= (1u << i); + else + pr_err("Failed to wakeup core %d\n", i); } return 0; -- cgit v1.1