From 4a0156fbfb78b8006ce9b2ffac9383b7d4a8192b Mon Sep 17 00:00:00 2001 From: "Steven J. Hill" Date: Thu, 14 Nov 2013 16:12:24 +0000 Subject: MIPS: features: Add initial support for Segmentation Control registers MIPS32R3 introduced a new set of Segmentation Control registers which increase the flexibility of the segmented-based memory scheme. Signed-off-by: Steven J. Hill Signed-off-by: Markos Chandras Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6131/ --- arch/mips/kernel/cpu-probe.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index a284e8c..e1acfa8 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -272,6 +272,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) c->options |= MIPS_CPU_MICROMIPS; if (config3 & MIPS_CONF3_VZ) c->ases |= MIPS_ASE_VZ; + if (config3 & MIPS_CONF3_SC) + c->options |= MIPS_CPU_SEGMENTS; return config3 & MIPS_CONF_M; } -- cgit v1.1