From f6771dbb27c704ce837ba3bb1dcaa53f48f76ea8 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 8 Nov 2007 18:02:29 +0000 Subject: [MIPS] Fix shadow register support. Shadow register support would not possibly have worked on multicore systems. The support code for it was also depending not on MIPS R2 but VSMP or SMTC kernels even though it makes perfect sense with UP kernels. SR sets are a scarce resource and the expected usage pattern is that users actually hardcode the register set numbers in their code. So fix the allocator by ditching it. Move the remaining CPU probe bits into the generic CPU probe. Signed-off-by: Ralf Baechle --- arch/mips/kernel/proc.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/mips/kernel/proc.c') diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index efd2d13..6e6e947 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -60,6 +60,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) cpu_has_dsp ? " dsp" : "", cpu_has_mipsmt ? " mt" : "" ); + seq_printf(m, "shadow register sets\t: %d\n", + cpu_data[n].srsets); sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", cpu_has_vce ? "%u" : "not available"); -- cgit v1.1