From 6f329468f3086e9d8f3832930fdb09ab3769176b Mon Sep 17 00:00:00 2001 From: David Daney Date: Wed, 10 Feb 2010 15:12:48 -0800 Subject: MIPS: Give Octeon+ CPUs their own cputype. This allows us to treat them differently at runtime. Signed-off-by: David Daney To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/951/ Patchwork: http://patchwork.linux-mips.org/patch/987/ Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'arch/mips/kernel/cpu-probe.c') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 9ea5ca8..be5bb16 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -162,6 +162,7 @@ void __init check_wait(void) case CPU_BCM6348: case CPU_BCM6358: case CPU_CAVIUM_OCTEON: + case CPU_CAVIUM_OCTEON_PLUS: cpu_wait = r4k_wait; break; @@ -911,12 +912,16 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) case PRID_IMP_CAVIUM_CN38XX: case PRID_IMP_CAVIUM_CN31XX: case PRID_IMP_CAVIUM_CN30XX: + c->cputype = CPU_CAVIUM_OCTEON; + __cpu_name[cpu] = "Cavium Octeon"; + goto platform; case PRID_IMP_CAVIUM_CN58XX: case PRID_IMP_CAVIUM_CN56XX: case PRID_IMP_CAVIUM_CN50XX: case PRID_IMP_CAVIUM_CN52XX: - c->cputype = CPU_CAVIUM_OCTEON; - __cpu_name[cpu] = "Cavium Octeon"; + c->cputype = CPU_CAVIUM_OCTEON_PLUS; + __cpu_name[cpu] = "Cavium Octeon+"; +platform: if (cpu == 0) __elf_platform = "octeon"; break; -- cgit v1.1