From b70eb30056dc84568f3d32440d9be6a558025843 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 9 Jun 2017 17:26:39 -0700 Subject: MIPS: cmpxchg: Implement 1 byte & 2 byte xchg() Implement 1 & 2 byte xchg() using read-modify-write atop a 4 byte cmpxchg(). This allows us to support these atomic operations despite the MIPS ISA only providing for 4 & 8 byte atomic operations. This is required in order to support queued spinlocks (qspinlock) in a later patch, since these make use of a 2 byte xchg() in their slow path. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16354/ Signed-off-by: Ralf Baechle --- arch/mips/kernel/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/kernel/Makefile') diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index f0edd7e..46c0581 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -4,7 +4,7 @@ extra-y := head.o vmlinux.lds -obj-y += cpu-probe.o branch.o elf.o entry.o genex.o idle.o irq.o \ +obj-y += cmpxchg.o cpu-probe.o branch.o elf.o entry.o genex.o idle.o irq.o \ process.o prom.o ptrace.o reset.o setup.o signal.o \ syscall.o time.o topology.o traps.o unaligned.o watch.o \ vdso.o cacheinfo.o -- cgit v1.1