From 75b5b5e0a262790fa11043fe45700499c7e3d818 Mon Sep 17 00:00:00 2001 From: Leonid Yegoshin Date: Thu, 14 Nov 2013 16:12:31 +0000 Subject: MIPS: Add support for FTLBs The Fixed Page Size TLB (FTLB) is a set-associative dual entry TLB. Its purpose is to reduce the number of TLB misses by increasing the effective TLB size and keep the implementation complexity to minimum levels. A supported core can have both VTLB and FTLB. Reviewed-by: James Hogan Reviewed-by: Paul Burton Signed-off-by: Leonid Yegoshin Signed-off-by: Markos Chandras Signed-off-by: John Crispin Patchwork: http://patchwork.linux-mips.org/patch/6139/ --- arch/mips/include/asm/cpu-info.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/mips/include/asm/cpu-info.h') diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index 21c8e29..8f7adf0 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -52,6 +52,9 @@ struct cpuinfo_mips { unsigned int cputype; int isa_level; int tlbsize; + int tlbsizevtlb; + int tlbsizeftlbsets; + int tlbsizeftlbways; struct cache_desc icache; /* Primary I-cache */ struct cache_desc dcache; /* Primary D or combined I/D cache */ struct cache_desc scache; /* Secondary cache */ -- cgit v1.1