From 7b9334215f53135fb9cbdf0b44833cbc8e7d57b2 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 18 Jun 2013 16:55:40 +0000 Subject: MIPS: BCM63XX: add support for BCM3368 Cable Modem The Broadcom BCM3368 Cable Modem SoC is extremely similar to the existing BCM63xx DSL SoCs, in particular BCM6358, therefore little effort in the existing code base is required to get it supported. This patch adds support for the following on-chip peripherals: - two UARTS - GPIO - Ethernet - SPI - PCI - NOR Flash The most noticeable difference with 3368 is that it has its peripheral register at 0xfff8_0000 we check that separately in ioremap.h. Since 3368 is identical to 6358 for its clock and reset bits, we use them verbatim. Signed-off-by: Florian Fainelli Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5499/ Signed-off-by: Ralf Baechle --- arch/mips/bcm63xx/prom.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/mips/bcm63xx/prom.c') diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c index fd69808..f3ff28f 100644 --- a/arch/mips/bcm63xx/prom.c +++ b/arch/mips/bcm63xx/prom.c @@ -26,7 +26,9 @@ void __init prom_init(void) bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG); /* disable all hardware blocks clock for now */ - if (BCMCPU_IS_6328()) + if (BCMCPU_IS_3368()) + mask = CKCTL_3368_ALL_SAFE_EN; + else if (BCMCPU_IS_6328()) mask = CKCTL_6328_ALL_SAFE_EN; else if (BCMCPU_IS_6338()) mask = CKCTL_6338_ALL_SAFE_EN; -- cgit v1.1 From a068dde168e0c618e1dc2151a0922254ec3bbf04 Mon Sep 17 00:00:00 2001 From: Kevin Cernekee Date: Tue, 18 Jun 2013 08:34:31 +0000 Subject: MIPS: BCM63xx: Add SMP support to prom.c This involves two changes to the BSP code: 1) register_smp_ops() for BMIPS SMP 2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with the special interrupt vector (IV). Move it to 0x8000_0380 at boot time, to resolve the conflict. Signed-off-by: Kevin Cernekee [jogo@openwrt.org: moved SMP ops registration into ifdef guard, changed ifdef guards to if (IS_ENABLED())] Signed-off-by: Jonas Gorski Cc: linux-mips@linux-mips.org Cc: John Crispin Cc: Maxime Bizon Cc: Florian Fainelli Patchwork: https://patchwork.linux-mips.org/patch/5489/ Signed-off-by: Ralf Baechle --- arch/mips/bcm63xx/prom.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch/mips/bcm63xx/prom.c') diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c index f3ff28f..3b21454 100644 --- a/arch/mips/bcm63xx/prom.c +++ b/arch/mips/bcm63xx/prom.c @@ -8,7 +8,11 @@ #include #include +#include #include +#include +#include +#include #include #include #include @@ -54,6 +58,43 @@ void __init prom_init(void) /* do low level board init */ board_prom_init(); + + if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) { + /* set up SMP */ + register_smp_ops(&bmips_smp_ops); + + /* + * BCM6328 might not have its second CPU enabled, while BCM6358 + * needs special handling for its shared TLB, so disable SMP + * for now. + */ + if (BCMCPU_IS_6328()) { + bmips_smp_enabled = 0; + } else if (BCMCPU_IS_6358()) { + bmips_smp_enabled = 0; + } + + if (!bmips_smp_enabled) + return; + + /* + * The bootloader has set up the CPU1 reset vector at + * 0xa000_0200. + * This conflicts with the special interrupt vector (IV). + * The bootloader has also set up CPU1 to respond to the wrong + * IPI interrupt. + * Here we will start up CPU1 in the background and ask it to + * reconfigure itself then go back to sleep. + */ + memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20); + __sync(); + set_c0_cause(C_SW0); + cpumask_set_cpu(1, &bmips_booted_mask); + + /* + * FIXME: we really should have some sort of hazard barrier here + */ + } } void __init prom_free_prom_memory(void) -- cgit v1.1 From 7ac836ce2aa7b931f6347e554cb65f9e9cc1da57 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Tue, 18 Jun 2013 08:34:32 +0000 Subject: MIPS: BCM63xx: Enable second core SMP on BCM6328 if available BCM6328 has a OTP which tells us if the second core is available. Signed-off-by: Jonas Gorski Cc: linux-mips@linux-mips.org Cc: John Crispin Cc: Maxime Bizon Cc: Florian Fainelli Cc: Kevin Cernekee Patchwork: https://patchwork.linux-mips.org/patch/5490/ Signed-off-by: Ralf Baechle --- arch/mips/bcm63xx/prom.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/mips/bcm63xx/prom.c') diff --git a/arch/mips/bcm63xx/prom.c b/arch/mips/bcm63xx/prom.c index 3b21454..8ac4e09 100644 --- a/arch/mips/bcm63xx/prom.c +++ b/arch/mips/bcm63xx/prom.c @@ -69,7 +69,11 @@ void __init prom_init(void) * for now. */ if (BCMCPU_IS_6328()) { - bmips_smp_enabled = 0; + reg = bcm_readl(BCM_6328_OTP_BASE + + OTP_USER_BITS_6328_REG(3)); + + if (reg & OTP_6328_REG3_TP1_DISABLED) + bmips_smp_enabled = 0; } else if (BCMCPU_IS_6358()) { bmips_smp_enabled = 0; } -- cgit v1.1