From 9bdcf336d0c061e77f4c45c7b2bc32e3ed6b57e3 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sun, 4 Oct 2009 14:55:24 +0200 Subject: MIPS: Alchemy: devboard register abstraction All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: Manuel Lauss Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 62 +++++++++++++----------- 1 file changed, 34 insertions(+), 28 deletions(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index de30d8e..e713390 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -32,12 +32,10 @@ #include #include +#include #include - -static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; - const char *get_system_type(void) { #ifdef CONFIG_MIPS_BOSPORUS @@ -49,15 +47,43 @@ const char *get_system_type(void) void board_reset(void) { - /* Hit BCSR.SW_RESET[RESET] */ - bcsr->swreset = 0x0000; + bcsr_write(BCSR_SYSTEM, 0); } void __init board_setup(void) { + unsigned long bcsr1, bcsr2; u32 pin_func = 0; char *argptr; + bcsr1 = DB1000_BCSR_PHYS_ADDR; + bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS; + +#ifdef CONFIG_MIPS_DB1000 + printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); +#endif +#ifdef CONFIG_MIPS_DB1500 + printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n"); +#endif +#ifdef CONFIG_MIPS_DB1100 + printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); +#endif +#ifdef CONFIG_MIPS_BOSPORUS + printk(KERN_INFO "AMD Alchemy Bosporus Board\n"); +#endif +#ifdef CONFIG_MIPS_MIRAGE + printk(KERN_INFO "AMD Alchemy Mirage Board\n"); +#endif +#ifdef CONFIG_MIPS_DB1550 + printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n"); + + bcsr1 = DB1550_BCSR_PHYS_ADDR; + bcsr2 = DB1550_BCSR_PHYS_ADDR + DB1550_BCSR_HEXLED_OFS; +#endif + + /* initialize board register space */ + bcsr_init(bcsr1, bcsr2); + argptr = prom_getcmdline(); #ifdef CONFIG_SERIAL_8250_CONSOLE argptr = strstr(argptr, "console="); @@ -89,11 +115,10 @@ void __init board_setup(void) pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF; au_writel(pin_func, SYS_PINFUNC); /* Power off until the driver is in use */ - bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK; - bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF; - au_sync(); + bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK, + BCSR_RESETS_IRDA_MODE_OFF); #endif - bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */ + bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */ /* Enable GPIO[31:0] inputs */ alchemy_gpio1_input_enable(); @@ -123,23 +148,4 @@ void __init board_setup(void) #endif au_sync(); - -#ifdef CONFIG_MIPS_DB1000 - printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); -#endif -#ifdef CONFIG_MIPS_DB1500 - printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n"); -#endif -#ifdef CONFIG_MIPS_DB1100 - printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); -#endif -#ifdef CONFIG_MIPS_BOSPORUS - printk(KERN_INFO "AMD Alchemy Bosporus Board\n"); -#endif -#ifdef CONFIG_MIPS_MIRAGE - printk(KERN_INFO "AMD Alchemy Mirage Board\n"); -#endif -#ifdef CONFIG_MIPS_DB1550 - printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n"); -#endif } -- cgit v1.1 From 7e50b2b741bb4f9dbddc9f56972ef82a7d4b33ed Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sun, 4 Oct 2009 14:55:26 +0200 Subject: MIPS: Alchemy: remove board_init_irq() function. remove board_init_irq(): On all in-kernel boards it is sufficient to initialize board interrupts in an arch_initcall by using the default linux irq functions. Some small irqmap.c files have been folded into board_setup files. Run-tested on DB1200; compile-tested on all other affected boards. Signed-off-by: Manuel Lauss Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/Makefile | 2 +- arch/mips/alchemy/devboards/db1x00/board_setup.c | 51 ++++++++++++++ arch/mips/alchemy/devboards/db1x00/irqmap.c | 90 ------------------------ 3 files changed, 52 insertions(+), 91 deletions(-) delete mode 100644 arch/mips/alchemy/devboards/db1x00/irqmap.c (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/Makefile b/arch/mips/alchemy/devboards/db1x00/Makefile index 432241a..ce48d58 100644 --- a/arch/mips/alchemy/devboards/db1x00/Makefile +++ b/arch/mips/alchemy/devboards/db1x00/Makefile @@ -5,4 +5,4 @@ # Makefile for the Alchemy Semiconductor DBAu1xx0 boards. # -obj-y := board_setup.o irqmap.o +obj-y := board_setup.o diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index e713390..9a619ae 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -29,6 +29,7 @@ #include #include +#include #include #include @@ -36,6 +37,37 @@ #include +#ifdef CONFIG_MIPS_DB1500 +char irq_tab_alchemy[][5] __initdata = { + [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */ + [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ +}; +#endif + +#ifdef CONFIG_MIPS_BOSPORUS +char irq_tab_alchemy[][5] __initdata = { + [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */ + [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */ + [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ +}; +#endif + +#ifdef CONFIG_MIPS_MIRAGE +char irq_tab_alchemy[][5] __initdata = { + [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */ + [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */ + [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */ +}; +#endif + +#ifdef CONFIG_MIPS_DB1550 +char irq_tab_alchemy[][5] __initdata = { + [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */ + [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */ + [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */ +}; +#endif + const char *get_system_type(void) { #ifdef CONFIG_MIPS_BOSPORUS @@ -149,3 +181,22 @@ void __init board_setup(void) au_sync(); } + +static int __init db1x00_init_irq(void) +{ +#if defined(CONFIG_MIPS_MIRAGE) + set_irq_type(AU1000_GPIO_7, IRQF_TRIGGER_RISING); /* TS pendown */ +#elif defined(CONFIG_MIPS_DB1550) + set_irq_type(AU1000_GPIO_3, IRQF_TRIGGER_LOW); /* CARD0# */ + set_irq_type(AU1000_GPIO_5, IRQF_TRIGGER_LOW); /* CARD1# */ +#else + set_irq_type(AU1000_GPIO_0, IRQF_TRIGGER_LOW); /* CD0# */ + set_irq_type(AU1000_GPIO_3, IRQF_TRIGGER_LOW); /* CD1# */ + set_irq_type(AU1000_GPIO_2, IRQF_TRIGGER_LOW); /* CARD0# */ + set_irq_type(AU1000_GPIO_5, IRQF_TRIGGER_LOW); /* CARD1# */ + set_irq_type(AU1000_GPIO_1, IRQF_TRIGGER_LOW); /* STSCHG0# */ + set_irq_type(AU1000_GPIO_4, IRQF_TRIGGER_LOW); /* STSCHG1# */ +#endif + return 0; +} +arch_initcall(db1x00_init_irq); diff --git a/arch/mips/alchemy/devboards/db1x00/irqmap.c b/arch/mips/alchemy/devboards/db1x00/irqmap.c deleted file mode 100644 index 0b09025..0000000 --- a/arch/mips/alchemy/devboards/db1x00/irqmap.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * BRIEF MODULE DESCRIPTION - * Au1xxx irq map table - * - * Copyright 2003 Embedded Edge, LLC - * dan@embeddededge.com - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include -#include - -#include - -#ifdef CONFIG_MIPS_DB1500 -char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ -}; -#endif - -#ifdef CONFIG_MIPS_BOSPORUS -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */ - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ -}; -#endif - -#ifdef CONFIG_MIPS_MIRAGE -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */ - [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */ - [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */ -}; -#endif - -#ifdef CONFIG_MIPS_DB1550 -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */ - [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */ -}; -#endif - - -struct au1xxx_irqmap __initdata au1xxx_irq_map[] = { - -#ifndef CONFIG_MIPS_MIRAGE -#ifdef CONFIG_MIPS_DB1550 - { AU1000_GPIO_3, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 IRQ# */ - { AU1000_GPIO_5, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 IRQ# */ -#else - { AU1000_GPIO_0, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 Fully_Interted# */ - { AU1000_GPIO_1, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 STSCHG# */ - { AU1000_GPIO_2, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 0 IRQ# */ - - { AU1000_GPIO_3, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 Fully_Interted# */ - { AU1000_GPIO_4, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 STSCHG# */ - { AU1000_GPIO_5, IRQF_TRIGGER_LOW, 0 }, /* PCMCIA Card 1 IRQ# */ -#endif -#else - { AU1000_GPIO_7, IRQF_TRIGGER_RISING, 0 }, /* touchscreen pen down */ -#endif - -}; - -void __init board_init_irq(void) -{ - au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map)); -} -- cgit v1.1 From 27dd65ac9afabc8e67ab73f7c2f575eddbb47167 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Sun, 4 Oct 2009 14:55:28 +0200 Subject: MIPS: Alchemy: devboards: wire up new PCMCIA driver. Register the PCMCIA driver on all boards supported by it, get rid of now-unused pcmcia macros in the board headers (and subsequently empty pb1100/pb1500 ones). Signed-off-by: Manuel Lauss Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/Makefile | 2 +- arch/mips/alchemy/devboards/db1x00/board_setup.c | 4 ++ arch/mips/alchemy/devboards/db1x00/platform.c | 84 ++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 1 deletion(-) create mode 100644 arch/mips/alchemy/devboards/db1x00/platform.c (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/Makefile b/arch/mips/alchemy/devboards/db1x00/Makefile index ce48d58..613c0c0 100644 --- a/arch/mips/alchemy/devboards/db1x00/Makefile +++ b/arch/mips/alchemy/devboards/db1x00/Makefile @@ -5,4 +5,4 @@ # Makefile for the Alchemy Semiconductor DBAu1xx0 boards. # -obj-y := board_setup.o +obj-y := board_setup.o platform.o diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 9a619ae..3b228a2 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -187,8 +187,12 @@ static int __init db1x00_init_irq(void) #if defined(CONFIG_MIPS_MIRAGE) set_irq_type(AU1000_GPIO_7, IRQF_TRIGGER_RISING); /* TS pendown */ #elif defined(CONFIG_MIPS_DB1550) + set_irq_type(AU1000_GPIO_0, IRQF_TRIGGER_LOW); /* CD0# */ + set_irq_type(AU1000_GPIO_1, IRQF_TRIGGER_LOW); /* CD1# */ set_irq_type(AU1000_GPIO_3, IRQF_TRIGGER_LOW); /* CARD0# */ set_irq_type(AU1000_GPIO_5, IRQF_TRIGGER_LOW); /* CARD1# */ + set_irq_type(AU1000_GPIO_21, IRQF_TRIGGER_LOW); /* STSCHG0# */ + set_irq_type(AU1000_GPIO_22, IRQF_TRIGGER_LOW); /* STSCHG1# */ #else set_irq_type(AU1000_GPIO_0, IRQF_TRIGGER_LOW); /* CD0# */ set_irq_type(AU1000_GPIO_3, IRQF_TRIGGER_LOW); /* CD1# */ diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c new file mode 100644 index 0000000..b762b79 --- /dev/null +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -0,0 +1,84 @@ +/* + * DBAu1xxx board platform device registration + * + * Copyright (C) 2009 Manuel Lauss + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include + +#include +#include "../platform.h" + +#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ + defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) +#define DB1XXX_HAS_PCMCIA +#endif + +/* DB1xxx PCMCIA interrupt sources: + * CD0/1 GPIO0/3 + * STSCHG0/1 GPIO1/4 + * CARD0/1 GPIO2/5 + * Db1550: 0/1, 21/22, 3/5 + */ +#ifndef CONFIG_MIPS_DB1550 +/* Db1000, Db1100, Db1500 */ +#define DB1XXX_PCMCIA_CD0 AU1000_GPIO_0 +#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO_1 +#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO_2 +#define DB1XXX_PCMCIA_CD1 AU1000_GPIO_3 +#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO_4 +#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO_5 +#else +#define DB1XXX_PCMCIA_CD0 AU1000_GPIO_0 +#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO_21 +#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO_3 +#define DB1XXX_PCMCIA_CD1 AU1000_GPIO_1 +#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO_22 +#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO_5 +#endif + +static int __init db1xxx_dev_init(void) +{ +#ifdef DB1XXX_HAS_PCMCIA + db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, + PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, + PCMCIA_MEM_PSEUDO_PHYS, + PCMCIA_MEM_PSEUDO_PHYS + 0x00040000 - 1, + PCMCIA_IO_PSEUDO_PHYS, + PCMCIA_IO_PSEUDO_PHYS + 0x00001000 - 1, + DB1XXX_PCMCIA_CARD0, + DB1XXX_PCMCIA_CD0, + /*DB1XXX_PCMCIA_STSCHG0*/0, + 0, + 0); + + db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS + 0x00400000, + PCMCIA_ATTR_PSEUDO_PHYS + 0x00440000 - 1, + PCMCIA_MEM_PSEUDO_PHYS + 0x00400000, + PCMCIA_MEM_PSEUDO_PHYS + 0x00440000 - 1, + PCMCIA_IO_PSEUDO_PHYS + 0x00400000, + PCMCIA_IO_PSEUDO_PHYS + 0x00401000 - 1, + DB1XXX_PCMCIA_CARD1, + DB1XXX_PCMCIA_CD1, + /*DB1XXX_PCMCIA_STSCHG1*/0, + 0, + 1); +#endif + return 0; +} +device_initcall(db1xxx_dev_init); -- cgit v1.1 From 788144656b8a862e724a1296e64ab6375eb541ed Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Wed, 7 Oct 2009 20:15:15 +0200 Subject: MIPS: Alchemy: Stop IRQ name sharing Eliminate the sharing of IRQ names among the differenct Alchemy variants. IRQ numbers need no longer be hidden behind a CONFIG_SOC_AU1XXX symbol: step 1 in my quest to make the Alchemy code less reliant on a hardcoded subtype. This patch also renames the GPIO irq number constants. It's really an interrupt line, NOT a GPIO number! Code which relied on certain irq numbers to have the same name across all supported cpu subtypes is changed to determine current cpu subtype at runtime; in some places this isn't possible so a "compat" symbol is used. Run-tested on DB1200. Signed-off-by: Manuel Lauss Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 64 +++++++++++++++--------- arch/mips/alchemy/devboards/db1x00/platform.c | 52 ++++++++++++------- 2 files changed, 72 insertions(+), 44 deletions(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 3b228a2..64eb26f 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -39,32 +39,32 @@ #ifdef CONFIG_MIPS_DB1500 char irq_tab_alchemy[][5] __initdata = { - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - HPT371 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ + [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */ + [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ }; #endif #ifdef CONFIG_MIPS_BOSPORUS char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 11 - miniPCI */ - [12] = { -1, INTA, INTX, INTX, INTX }, /* IDSEL 12 - SN1741 */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot */ + [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */ + [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */ + [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ }; #endif #ifdef CONFIG_MIPS_MIRAGE char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTD, INTX, INTX, INTX }, /* IDSEL 11 - SMI VGX */ - [12] = { -1, INTX, INTX, INTC, INTX }, /* IDSEL 12 - PNX1300 */ - [13] = { -1, INTA, INTB, INTX, INTX }, /* IDSEL 13 - miniPCI */ + [11] = { -1, AU1500_PCI_INTD, 0xff, 0xff, 0xff }, /* IDSEL 11 - SMI VGX */ + [12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */ + [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */ }; #endif #ifdef CONFIG_MIPS_DB1550 char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, INTC, INTX, INTX, INTX }, /* IDSEL 11 - on-board HPT371 */ - [12] = { -1, INTB, INTC, INTD, INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, INTA, INTB, INTC, INTD }, /* IDSEL 13 - PCI slot 1 (right) */ + [11] = { -1, AU1550_PCI_INTC, 0xff, 0xff, 0xff }, /* IDSEL 11 - on-board HPT371 */ + [12] = { -1, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD, AU1550_PCI_INTA }, /* IDSEL 12 - PCI slot 2 (left) */ + [13] = { -1, AU1550_PCI_INTA, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD }, /* IDSEL 13 - PCI slot 1 (right) */ }; #endif @@ -185,21 +185,35 @@ void __init board_setup(void) static int __init db1x00_init_irq(void) { #if defined(CONFIG_MIPS_MIRAGE) - set_irq_type(AU1000_GPIO_7, IRQF_TRIGGER_RISING); /* TS pendown */ + set_irq_type(AU1500_GPIO7_INT, IRQF_TRIGGER_RISING); /* TS pendown */ #elif defined(CONFIG_MIPS_DB1550) - set_irq_type(AU1000_GPIO_0, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1000_GPIO_1, IRQF_TRIGGER_LOW); /* CD1# */ - set_irq_type(AU1000_GPIO_3, IRQF_TRIGGER_LOW); /* CARD0# */ - set_irq_type(AU1000_GPIO_5, IRQF_TRIGGER_LOW); /* CARD1# */ - set_irq_type(AU1000_GPIO_21, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1000_GPIO_22, IRQF_TRIGGER_LOW); /* STSCHG1# */ -#else - set_irq_type(AU1000_GPIO_0, IRQF_TRIGGER_LOW); /* CD0# */ - set_irq_type(AU1000_GPIO_3, IRQF_TRIGGER_LOW); /* CD1# */ - set_irq_type(AU1000_GPIO_2, IRQF_TRIGGER_LOW); /* CARD0# */ - set_irq_type(AU1000_GPIO_5, IRQF_TRIGGER_LOW); /* CARD1# */ - set_irq_type(AU1000_GPIO_1, IRQF_TRIGGER_LOW); /* STSCHG0# */ - set_irq_type(AU1000_GPIO_4, IRQF_TRIGGER_LOW); /* STSCHG1# */ + set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */ + set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + set_irq_type(AU1550_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + set_irq_type(AU1550_GPIO21_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + set_irq_type(AU1550_GPIO22_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ +#elif defined(CONFIG_MIPS_DB1500) + set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ + set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ +#elif defined(CONFIG_MIPS_DB1100) + set_irq_type(AU1100_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + set_irq_type(AU1100_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ + set_irq_type(AU1100_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + set_irq_type(AU1100_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + set_irq_type(AU1100_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + set_irq_type(AU1100_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ +#elif defined(CONFIG_MIPS_DB1000) + set_irq_type(AU1000_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ + set_irq_type(AU1000_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ + set_irq_type(AU1000_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ + set_irq_type(AU1000_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ + set_irq_type(AU1000_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ + set_irq_type(AU1000_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ #endif return 0; } diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index b762b79..0ac5dd0 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -24,32 +24,46 @@ #include #include "../platform.h" -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ - defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) -#define DB1XXX_HAS_PCMCIA -#endif - /* DB1xxx PCMCIA interrupt sources: * CD0/1 GPIO0/3 * STSCHG0/1 GPIO1/4 * CARD0/1 GPIO2/5 * Db1550: 0/1, 21/22, 3/5 */ -#ifndef CONFIG_MIPS_DB1550 -/* Db1000, Db1100, Db1500 */ -#define DB1XXX_PCMCIA_CD0 AU1000_GPIO_0 -#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO_1 -#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO_2 -#define DB1XXX_PCMCIA_CD1 AU1000_GPIO_3 -#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO_4 -#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO_5 + +#define DB1XXX_HAS_PCMCIA + +#if defined(CONFIG_MIPS_DB1000) +#define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1000_GPIO1_INT +#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO2_INT +#define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT +#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT +#elif defined(CONFIG_MIPS_DB1100) +#define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT +#define DB1XXX_PCMCIA_CARD0 AU1100_GPIO2_INT +#define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT +#define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT +#elif defined(CONFIG_MIPS_DB1500) +#define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT +#define DB1XXX_PCMCIA_CARD0 AU1500_GPIO2_INT +#define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT +#define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT +#elif defined(CONFIG_MIPS_DB1550) +#define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT +#define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT +#define DB1XXX_PCMCIA_CARD0 AU1550_GPIO3_INT +#define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT +#define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT +#define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT #else -#define DB1XXX_PCMCIA_CD0 AU1000_GPIO_0 -#define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO_21 -#define DB1XXX_PCMCIA_CARD0 AU1000_GPIO_3 -#define DB1XXX_PCMCIA_CD1 AU1000_GPIO_1 -#define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO_22 -#define DB1XXX_PCMCIA_CARD1 AU1000_GPIO_5 +/* other board: no PCMCIA */ +#undef DB1XXX_HAS_PCMCIA #endif static int __init db1xxx_dev_init(void) -- cgit v1.1 From 32fc0adeb89c7e1e592bf31b7158ddc154298207 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Sun, 18 Oct 2009 16:04:09 +0200 Subject: MIPS: Alchemy: Fix warnings in DB1x00 / PB1000 / PB1550 board setup code This patch fixes warnings due to potentially unused variables in board setup code or mixed variables declaration and code (forbidden by ISO C90). Signed-off-by: Florian Fainelli Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 64eb26f..7aee14d7 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -85,12 +85,14 @@ void board_reset(void) void __init board_setup(void) { unsigned long bcsr1, bcsr2; - u32 pin_func = 0; + u32 pin_func; char *argptr; bcsr1 = DB1000_BCSR_PHYS_ADDR; bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS; + pin_func = 0; + #ifdef CONFIG_MIPS_DB1000 printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); #endif -- cgit v1.1 From 206aa6cdadad8bbedee5649f1346fe47e922a039 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Mon, 19 Oct 2009 12:53:37 +0200 Subject: MIPS: Alchemy: physmap-flash for all devboards Replace the devboard NOR MTD mapping driver with physmap-flash support. Also honor the "swapboot" switch settings wrt. to the layout of the NOR partitions. Signed-off-by: Manuel Lauss Cc: Linux-MIPS Acked-By: David Woodhouse Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/platform.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index 0ac5dd0..62e2a96 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -22,6 +22,7 @@ #include #include +#include #include "../platform.h" /* DB1xxx PCMCIA interrupt sources: @@ -32,6 +33,7 @@ */ #define DB1XXX_HAS_PCMCIA +#define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) #if defined(CONFIG_MIPS_DB1000) #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT @@ -40,6 +42,8 @@ #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT +#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ +#define BOARD_FLASH_WIDTH 4 /* 32-bits */ #elif defined(CONFIG_MIPS_DB1100) #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT @@ -47,6 +51,8 @@ #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT +#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ +#define BOARD_FLASH_WIDTH 4 /* 32-bits */ #elif defined(CONFIG_MIPS_DB1500) #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT @@ -54,6 +60,8 @@ #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT +#define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ +#define BOARD_FLASH_WIDTH 4 /* 32-bits */ #elif defined(CONFIG_MIPS_DB1550) #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT @@ -61,9 +69,20 @@ #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT +#define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ +#define BOARD_FLASH_WIDTH 4 /* 32-bits */ #else /* other board: no PCMCIA */ #undef DB1XXX_HAS_PCMCIA +#undef F_SWAPPED +#define F_SWAPPED 0 +#if defined(CONFIG_MIPS_BOSPORUS) +#define BOARD_FLASH_SIZE 0x01000000 /* 16MB */ +#define BOARD_FLASH_WIDTH 2 /* 16-bits */ +#elif defined(CONFIG_MIPS_MIRAGE) +#define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ +#define BOARD_FLASH_WIDTH 4 /* 32-bits */ +#endif #endif static int __init db1xxx_dev_init(void) @@ -93,6 +112,7 @@ static int __init db1xxx_dev_init(void) 0, 1); #endif + db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED); return 0; } device_initcall(db1xxx_dev_init); -- cgit v1.1 From 66f75ccb856304c190fde9c26e651c2b754e3e72 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 10 Nov 2009 01:13:30 +0100 Subject: MIPS: Alchemy: Add au1000-eth platform device This patch makes the board code register the au1000-eth platform device. The au1000-eth platform data can be overriden with the au1xxx_override_eth_cfg function like it has to be done for the Bosporus board which uses a different MAC/PHY setup. Signed-off-by: Florian Fainelli Cc: David Miller Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: http://patchwork.linux-mips.org/patch/618/ Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 7aee14d7..b490eff 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -32,6 +32,7 @@ #include #include +#include #include #include @@ -44,12 +45,26 @@ char irq_tab_alchemy[][5] __initdata = { }; #endif +/* + * Micrel/Kendin 5 port switch attached to MAC0, + * MAC0 is associated with PHY address 5 (== WAN port) + * MAC1 is not associated with any PHY, since it's connected directly + * to the switch. + * no interrupts are used + */ +static struct au1000_eth_platform_data eth0_pdata = { + .phy_static_config = 1, + .phy_addr = 5, +}; + #ifdef CONFIG_MIPS_BOSPORUS char irq_tab_alchemy[][5] __initdata = { [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */ [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */ [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ }; + + #endif #ifdef CONFIG_MIPS_MIRAGE @@ -103,6 +118,8 @@ void __init board_setup(void) printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); #endif #ifdef CONFIG_MIPS_BOSPORUS + au1xxx_override_eth_cfg(0, ð0_pdata); + printk(KERN_INFO "AMD Alchemy Bosporus Board\n"); #endif #ifdef CONFIG_MIPS_MIRAGE -- cgit v1.1 From 32fd6901a6d8d19f94e4de6be4e4b552ab078620 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Tue, 8 Dec 2009 19:18:13 +0100 Subject: MIPS: Alchemy: get rid of common/reset.c Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by: Manuel Lauss Signed-off-by: Yoichi Yuasa Cc: Linux-MIPS Patchwork: http://patchwork.linux-mips.org/patch/783/ Patchwork: http://patchwork.linux-mips.org/patch/882/ Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 49 ++++++++++++++++++++---- 1 file changed, 41 insertions(+), 8 deletions(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index b490eff..56c541d 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -30,11 +30,13 @@ #include #include #include +#include #include #include #include #include +#include #include @@ -43,6 +45,18 @@ char irq_tab_alchemy[][5] __initdata = { [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */ [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ }; + +static void bosporus_power_off(void) +{ + printk(KERN_INFO "It's now safe to turn off power\n"); + while (1) + asm volatile (".set mips3 ; wait ; .set mips0"); +} + +const char *get_system_type(void) +{ + return "Alchemy Bosporus Gateway Reference"; +} #endif /* @@ -73,6 +87,16 @@ char irq_tab_alchemy[][5] __initdata = { [12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */ [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */ }; + +static void mirage_power_off(void) +{ + alchemy_gpio_direction_output(210, 1); +} + +const char *get_system_type(void) +{ + return "Alchemy Mirage"; +} #endif #ifdef CONFIG_MIPS_DB1550 @@ -83,19 +107,19 @@ char irq_tab_alchemy[][5] __initdata = { }; #endif -const char *get_system_type(void) +#if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE) +static void mips_softreset(void) { -#ifdef CONFIG_MIPS_BOSPORUS - return "Alchemy Bosporus Gateway Reference"; -#else - return "Alchemy Db1x00"; -#endif + asm volatile ("jr\t%0" : : "r"(0xbfc00000)); } -void board_reset(void) +#else + +const char *get_system_type(void) { - bcsr_write(BCSR_SYSTEM, 0); + return "Alchemy Db1x00"; } +#endif void __init board_setup(void) { @@ -196,8 +220,17 @@ void __init board_setup(void) * be part of the audio driver. */ alchemy_gpio_direction_output(209, 1); + + pm_power_off = mirage_power_off; + _machine_halt = mirage_power_off; + _machine_restart = (void(*)(char *))mips_softreset; #endif +#ifdef CONFIG_MIPS_BOSPORUS + pm_power_off = bosporus_power_off; + _machine_halt = bosporus_power_off; + _machine_restart = (void(*)(char *))mips_softreset; +#endif au_sync(); } -- cgit v1.1 From c63d0cb5feedbc2cc456b6ea2105c15b563217cf Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Fri, 29 Jan 2010 17:49:52 +0900 Subject: MIPS: Alchemy: Remove forced command line setting It is not always used, even if it is available. Signed-off-by: Yoichi Yuasa Cc: linux-mips Patchwork: http://patchwork.linux-mips.org/patch/893/ Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 25 ------------------------ 1 file changed, 25 deletions(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 56c541d..559d9b2 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -125,7 +125,6 @@ void __init board_setup(void) { unsigned long bcsr1, bcsr2; u32 pin_func; - char *argptr; bcsr1 = DB1000_BCSR_PHYS_ADDR; bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS; @@ -159,30 +158,6 @@ void __init board_setup(void) /* initialize board register space */ bcsr_init(bcsr1, bcsr2); - argptr = prom_getcmdline(); -#ifdef CONFIG_SERIAL_8250_CONSOLE - argptr = strstr(argptr, "console="); - if (argptr == NULL) { - argptr = prom_getcmdline(); - strcat(argptr, " console=ttyS0,115200"); - } -#endif - -#ifdef CONFIG_FB_AU1100 - argptr = strstr(argptr, "video="); - if (argptr == NULL) { - argptr = prom_getcmdline(); - /* default panel */ - /*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/ - } -#endif - -#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000) - /* au1000 does not support vra, au1500 and au1100 do */ - strcat(argptr, " au1000_audio=vra"); - argptr = prom_getcmdline(); -#endif - /* Not valid for Au1550 */ #if defined(CONFIG_IRDA) && \ (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) -- cgit v1.1 From 11b897cf84c37e6522db914793677e933ef311fb Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Wed, 24 Feb 2010 17:40:21 +0100 Subject: MIPS: Alchemy: use 36bit addresses for PCMCIA resources. On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus area. Currently, addresses at the far end of the 32bit area are assumed to belong to the PCMCIA area and fixed up to the real 36bit address before being passed to ioremap(). A previous commit enabled 64 bit physical size for the resource datatype on Alchemy and this allows to use the correct 36bit addresses when registering the PCMCIA sockets. This patch removes the 32-to-36bit address fixup and registers the Alchemy demo board pcmcia socket with the correct 36bit physical addresses. Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet card. Signed-off-by: Manuel Lauss To: Linux-MIPS Cc: Manuel Lauss Patchwork: http://patchwork.linux-mips.org/patch/994/ Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/platform.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index 62e2a96..978d5ab 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c @@ -88,24 +88,24 @@ static int __init db1xxx_dev_init(void) { #ifdef DB1XXX_HAS_PCMCIA - db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, - PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, - PCMCIA_MEM_PSEUDO_PHYS, - PCMCIA_MEM_PSEUDO_PHYS + 0x00040000 - 1, - PCMCIA_IO_PSEUDO_PHYS, - PCMCIA_IO_PSEUDO_PHYS + 0x00001000 - 1, + db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR, + PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1, + PCMCIA_MEM_PHYS_ADDR, + PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1, + PCMCIA_IO_PHYS_ADDR, + PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1, DB1XXX_PCMCIA_CARD0, DB1XXX_PCMCIA_CD0, /*DB1XXX_PCMCIA_STSCHG0*/0, 0, 0); - db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS + 0x00400000, - PCMCIA_ATTR_PSEUDO_PHYS + 0x00440000 - 1, - PCMCIA_MEM_PSEUDO_PHYS + 0x00400000, - PCMCIA_MEM_PSEUDO_PHYS + 0x00440000 - 1, - PCMCIA_IO_PSEUDO_PHYS + 0x00400000, - PCMCIA_IO_PSEUDO_PHYS + 0x00401000 - 1, + db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000, + PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1, + PCMCIA_MEM_PHYS_ADDR + 0x004000000, + PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1, + PCMCIA_IO_PHYS_ADDR + 0x004000000, + PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1, DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1, /*DB1XXX_PCMCIA_STSCHG1*/0, -- cgit v1.1 From 570cb456efbd1f1e761869881ae72177595de356 Mon Sep 17 00:00:00 2001 From: Manuel Lauss Date: Fri, 26 Feb 2010 17:22:01 +0100 Subject: MIPS: Alchemy: Repair db1500/bosporus builds A few hunks somehow ended up outside their #ifdef/endif blocks, leading to -Werror-induces build failures. Signed-off-by: Manuel Lauss To: Linux-MIPS Patchwork: http://patchwork.linux-mips.org/patch/1003/ Signed-off-by: Ralf Baechle --- arch/mips/alchemy/devboards/db1x00/board_setup.c | 52 +++++++++++++----------- 1 file changed, 28 insertions(+), 24 deletions(-) (limited to 'arch/mips/alchemy/devboards/db1x00') diff --git a/arch/mips/alchemy/devboards/db1x00/board_setup.c b/arch/mips/alchemy/devboards/db1x00/board_setup.c index 559d9b2..50c9bef 100644 --- a/arch/mips/alchemy/devboards/db1x00/board_setup.c +++ b/arch/mips/alchemy/devboards/db1x00/board_setup.c @@ -46,19 +46,25 @@ char irq_tab_alchemy[][5] __initdata = { [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ }; -static void bosporus_power_off(void) -{ - printk(KERN_INFO "It's now safe to turn off power\n"); - while (1) - asm volatile (".set mips3 ; wait ; .set mips0"); -} +#endif -const char *get_system_type(void) -{ - return "Alchemy Bosporus Gateway Reference"; -} + +#ifdef CONFIG_MIPS_DB1550 +char irq_tab_alchemy[][5] __initdata = { + [11] = { -1, AU1550_PCI_INTC, 0xff, 0xff, 0xff }, /* IDSEL 11 - on-board HPT371 */ + [12] = { -1, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD, AU1550_PCI_INTA }, /* IDSEL 12 - PCI slot 2 (left) */ + [13] = { -1, AU1550_PCI_INTA, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD }, /* IDSEL 13 - PCI slot 1 (right) */ +}; #endif + +#ifdef CONFIG_MIPS_BOSPORUS +char irq_tab_alchemy[][5] __initdata = { + [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */ + [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */ + [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ +}; + /* * Micrel/Kendin 5 port switch attached to MAC0, * MAC0 is associated with PHY address 5 (== WAN port) @@ -71,16 +77,20 @@ static struct au1000_eth_platform_data eth0_pdata = { .phy_addr = 5, }; -#ifdef CONFIG_MIPS_BOSPORUS -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */ - [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */ - [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ -}; - +static void bosporus_power_off(void) +{ + printk(KERN_INFO "It's now safe to turn off power\n"); + while (1) + asm volatile (".set mips3 ; wait ; .set mips0"); +} +const char *get_system_type(void) +{ + return "Alchemy Bosporus Gateway Reference"; +} #endif + #ifdef CONFIG_MIPS_MIRAGE char irq_tab_alchemy[][5] __initdata = { [11] = { -1, AU1500_PCI_INTD, 0xff, 0xff, 0xff }, /* IDSEL 11 - SMI VGX */ @@ -99,13 +109,6 @@ const char *get_system_type(void) } #endif -#ifdef CONFIG_MIPS_DB1550 -char irq_tab_alchemy[][5] __initdata = { - [11] = { -1, AU1550_PCI_INTC, 0xff, 0xff, 0xff }, /* IDSEL 11 - on-board HPT371 */ - [12] = { -1, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD, AU1550_PCI_INTA }, /* IDSEL 12 - PCI slot 2 (left) */ - [13] = { -1, AU1550_PCI_INTA, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD }, /* IDSEL 13 - PCI slot 1 (right) */ -}; -#endif #if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE) static void mips_softreset(void) @@ -121,6 +124,7 @@ const char *get_system_type(void) } #endif + void __init board_setup(void) { unsigned long bcsr1, bcsr2; -- cgit v1.1