From 32234328e24a38d8f9c42bd534ebfbd73fce8435 Mon Sep 17 00:00:00 2001 From: Steven King Date: Fri, 8 Jun 2012 14:15:29 -0700 Subject: m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller. Extending the interrupt controller code in intc-simr.c to support the third interrupt controller on the m5441x means we need to add defines (as 0) for the third interrupt controller on devices that don't have a third interrupt controller. Signed-off-by: Steven King Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m520xsim.h | 3 +++ arch/m68k/include/asm/m532xsim.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'arch/m68k') diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index 5a8b5e4..b1bc76f 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -42,6 +42,9 @@ #define MCFINTC1_SIMR (0) #define MCFINTC1_CIMR (0) #define MCFINTC1_ICR0 (0) +#define MCFINTC2_SIMR (0) +#define MCFINTC2_CIMR (0) +#define MCFINTC2_ICR0 (0) #define MCFINT_VECBASE 64 #define MCFINT_UART0 26 /* Interrupt number for UART0 */ diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 29b66e2..8d86020 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -82,6 +82,9 @@ #define MCFINTC1_SIMR 0xFC04C01C #define MCFINTC1_CIMR 0xFC04C01D #define MCFINTC1_ICR0 0xFC04C040 +#define MCFINTC2_SIMR (0) +#define MCFINTC2_CIMR (0) +#define MCFINTC2_ICR0 (0) #define MCFSIM_ICR_TIMER1 (0xFC048040+32) #define MCFSIM_ICR_TIMER2 (0xFC048040+33) -- cgit v1.1