From 7366b92a77fc00357294819bb495896d7482f30c Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 11 Dec 2012 13:58:43 +0900 Subject: ARM: Add interface for registering and calling firmware-specific operations Some boards are running with secure firmware running in TrustZone secure world, which changes the way some things have to be initialized. This patch adds an interface for platforms to specify available firmware operations and call them. A wrapper macro, call_firmware_op(), checks if the operation is provided and calls it if so, otherwise returns -ENOSYS to allow fallback to legacy operation.. By default no operations are provided. Example of use: In code using firmware ops: __raw_writel(virt_to_phys(exynos4_secondary_startup), CPU1_BOOT_REG); /* Call Exynos specific smc call */ if (call_firmware_op(cpu_boot, cpu) == -ENOSYS) cpu_boot_legacy(...); /* Try legacy way */ gic_raise_softirq(cpumask_of(cpu), 1); In board-/platform-specific code: static int platformX_do_idle(void) { /* tell platformX firmware to enter idle */ return 0; } static int platformX_cpu_boot(int i) { /* tell platformX firmware to boot CPU i */ return 0; } static const struct firmware_ops platformX_firmware_ops = { .do_idle = exynos_do_idle, .cpu_boot = exynos_cpu_boot, /* other operations not available on platformX */ }; static void __init board_init_early(void) { register_firmware_ops(&platformX_firmware_ops); } Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/common/Makefile | 2 ++ arch/arm/common/firmware.c | 18 +++++++++++ arch/arm/include/asm/firmware.h | 66 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 86 insertions(+) create mode 100644 arch/arm/common/firmware.c create mode 100644 arch/arm/include/asm/firmware.h (limited to 'arch/arm') diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index dc8dd0d..45f7eae 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile @@ -2,6 +2,8 @@ # Makefile for the linux kernel. # +obj-y += firmware.o + obj-$(CONFIG_ICST) += icst.o obj-$(CONFIG_SA1111) += sa1111.o obj-$(CONFIG_PCI_HOST_VIA82C505) += via82c505.o diff --git a/arch/arm/common/firmware.c b/arch/arm/common/firmware.c new file mode 100644 index 0000000..27ddccb --- /dev/null +++ b/arch/arm/common/firmware.c @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2012 Samsung Electronics. + * Kyungmin Park + * Tomasz Figa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +#include + +static const struct firmware_ops default_firmware_ops; + +const struct firmware_ops *firmware_ops = &default_firmware_ops; diff --git a/arch/arm/include/asm/firmware.h b/arch/arm/include/asm/firmware.h new file mode 100644 index 0000000..1563130 --- /dev/null +++ b/arch/arm/include/asm/firmware.h @@ -0,0 +1,66 @@ +/* + * Copyright (C) 2012 Samsung Electronics. + * Kyungmin Park + * Tomasz Figa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARM_FIRMWARE_H +#define __ASM_ARM_FIRMWARE_H + +#include + +/* + * struct firmware_ops + * + * A structure to specify available firmware operations. + * + * A filled up structure can be registered with register_firmware_ops(). + */ +struct firmware_ops { + /* + * Enters CPU idle mode + */ + int (*do_idle)(void); + /* + * Sets boot address of specified physical CPU + */ + int (*set_cpu_boot_addr)(int cpu, unsigned long boot_addr); + /* + * Boots specified physical CPU + */ + int (*cpu_boot)(int cpu); + /* + * Initializes L2 cache + */ + int (*l2x0_init)(void); +}; + +/* Global pointer for current firmware_ops structure, can't be NULL. */ +extern const struct firmware_ops *firmware_ops; + +/* + * call_firmware_op(op, ...) + * + * Checks if firmware operation is present and calls it, + * otherwise returns -ENOSYS + */ +#define call_firmware_op(op, ...) \ + ((firmware_ops->op) ? firmware_ops->op(__VA_ARGS__) : (-ENOSYS)) + +/* + * register_firmware_ops(ops) + * + * A function to register platform firmware_ops struct. + */ +static inline void register_firmware_ops(const struct firmware_ops *ops) +{ + BUG_ON(!ops); + + firmware_ops = ops; +} + +#endif -- cgit v1.1 From a4a18d2b3a9245ac43eec1e2eddd6b929b8f0bb9 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 11 Dec 2012 13:58:43 +0900 Subject: ARM: EXYNOS: Add support for secure monitor calls Some boards use secure monitor calls to communicate with secure firmware. This patch adds exynos_smc function which uses smc assembly instruction to do secure monitor calls. Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Makefile | 5 +++++ arch/arm/mach-exynos/exynos-smc.S | 22 ++++++++++++++++++++++ arch/arm/mach-exynos/smc.h | 31 +++++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+) create mode 100644 arch/arm/mach-exynos/exynos-smc.S create mode 100644 arch/arm/mach-exynos/smc.h (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index d2f6b36..5567bf7 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -24,6 +24,11 @@ obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o +obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o + +plus_sec := $(call as-instr,.arch_extension sec,+sec) +AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) + # machine support obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o diff --git a/arch/arm/mach-exynos/exynos-smc.S b/arch/arm/mach-exynos/exynos-smc.S new file mode 100644 index 0000000..2e27aa3 --- /dev/null +++ b/arch/arm/mach-exynos/exynos-smc.S @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2012 Samsung Electronics. + * + * Copied from omap-smc.S Copyright (C) 2010 Texas Instruments, Inc. + * + * This program is free software,you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include + +/* + * Function signature: void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3) + */ + +ENTRY(exynos_smc) + stmfd sp!, {r4-r11, lr} + dsb + smc #0 + ldmfd sp!, {r4-r11, pc} +ENDPROC(exynos_smc) diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h new file mode 100644 index 0000000..13a1dc8 --- /dev/null +++ b/arch/arm/mach-exynos/smc.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2012 Samsung Electronics. + * + * EXYNOS - SMC Call + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_EXYNOS_SMC_H +#define __ASM_ARCH_EXYNOS_SMC_H + +#define SMC_CMD_INIT (-1) +#define SMC_CMD_INFO (-2) +/* For Power Management */ +#define SMC_CMD_SLEEP (-3) +#define SMC_CMD_CPU1BOOT (-4) +#define SMC_CMD_CPU0AFTR (-5) +/* For CP15 Access */ +#define SMC_CMD_C15RESUME (-11) +/* For L2 Cache Access */ +#define SMC_CMD_L2X0CTRL (-21) +#define SMC_CMD_L2X0SETUP1 (-22) +#define SMC_CMD_L2X0SETUP2 (-23) +#define SMC_CMD_L2X0INVALL (-24) +#define SMC_CMD_L2X0DEBUG (-25) + +extern void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3); + +#endif -- cgit v1.1 From bca28f8f6b93fc1fb000d8695e59266d307aceab Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 11 Dec 2012 13:58:43 +0900 Subject: ARM: EXYNOS: Add support for Exynos secure firmware Some Exynos-based boards contain secure firmware and must use firmware operations to set up some hardware. This patch adds firmware operations for Exynos secure firmware and a way for board code and device tree to specify that they must be used. Example of use: In board code: ...MACHINE_START(...) /* ... */ .init_early = exynos_firmware_init, /* ... */ MACHINE_END In device tree: / { /* ... */ firmware@0203F000 { compatible = "samsung,secure-firmware"; reg = <0x0203F000 0x1000>; }; /* ... */ }; Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Makefile | 1 + arch/arm/mach-exynos/common.h | 2 + arch/arm/mach-exynos/firmware.c | 70 ++++++++++++++++++++++++++++++++++ arch/arm/mach-exynos/mach-exynos4-dt.c | 1 + 4 files changed, 74 insertions(+) create mode 100644 arch/arm/mach-exynos/firmware.c (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 5567bf7..b09b027 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_ARCH_EXYNOS) += exynos-smc.o +obj-$(CONFIG_ARCH_EXYNOS) += firmware.o plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index cb89ab8..b17448c 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -30,6 +30,8 @@ void exynos_init_late(void); void exynos4_clk_init(struct device_node *np); void exynos4_clk_register_fixed_ext(unsigned long, unsigned long); +void exynos_firmware_init(void); + #ifdef CONFIG_PM_GENERIC_DOMAINS int exynos_pm_late_initcall(void); #else diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c new file mode 100644 index 0000000..ed11f10 --- /dev/null +++ b/arch/arm/mach-exynos/firmware.c @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2012 Samsung Electronics. + * Kyungmin Park + * Tomasz Figa + * + * This program is free software,you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include + +#include + +#include "smc.h" + +static int exynos_do_idle(void) +{ + exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); + return 0; +} + +static int exynos_cpu_boot(int cpu) +{ + exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); + return 0; +} + +static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) +{ + void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu; + + __raw_writel(boot_addr, boot_reg); + return 0; +} + +static const struct firmware_ops exynos_firmware_ops = { + .do_idle = exynos_do_idle, + .set_cpu_boot_addr = exynos_set_cpu_boot_addr, + .cpu_boot = exynos_cpu_boot, +}; + +void __init exynos_firmware_init(void) +{ + if (of_have_populated_dt()) { + struct device_node *nd; + const __be32 *addr; + + nd = of_find_compatible_node(NULL, NULL, + "samsung,secure-firmware"); + if (!nd) + return; + + addr = of_get_address(nd, 0, NULL, NULL); + if (!addr) { + pr_err("%s: No address specified.\n", __func__); + return; + } + } + + pr_info("Running under secure firmware.\n"); + + register_firmware_ops(&exynos_firmware_ops); +} diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index ac27f3c..b9ed834 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -57,6 +57,7 @@ DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") .smp = smp_ops(exynos_smp_ops), .init_irq = exynos4_init_irq, .map_io = exynos4_dt_map_io, + .init_early = exynos_firmware_init, .init_machine = exynos4_dt_machine_init, .init_late = exynos_init_late, .init_time = exynos_init_time, -- cgit v1.1 From 41de89860baf8e62fd74e83338058575398ad21f Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 11 Dec 2012 13:58:43 +0900 Subject: ARM: EXYNOS: Add IO mapping for non-secure SYSRAM. On TrustZone-enabled boards the non-secure SYSRAM is used for secondary CPU bring-up, so add a mapping for it. Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 35 ++++++++++++++++++++++++++++ arch/arm/mach-exynos/include/mach/map.h | 3 +++ arch/arm/plat-samsung/include/plat/map-s5p.h | 1 + 3 files changed, 39 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 02e35ab..b2bb2b7 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -232,6 +232,33 @@ static struct map_desc exynos4_iodesc1[] __initdata = { }, }; +static struct map_desc exynos4210_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4x12_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos5250_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + static struct map_desc exynos5_iodesc[] __initdata = { { .virtual = (unsigned long)S3C_VA_SYS, @@ -360,6 +387,11 @@ static void __init exynos4_map_io(void) else iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); + if (soc_is_exynos4210()) + iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); + if (soc_is_exynos4212() || soc_is_exynos4412()) + iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); + /* initialize device information early */ exynos4_default_sdhci0(); exynos4_default_sdhci1(); @@ -392,6 +424,9 @@ static void __init exynos4_map_io(void) static void __init exynos5_map_io(void) { iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); + + if (soc_is_exynos5250()) + iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); } static void __init exynos5440_map_io(void) diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 7f99b7b..99e0a79 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -26,6 +26,9 @@ #define EXYNOS4_PA_SYSRAM0 0x02025000 #define EXYNOS4_PA_SYSRAM1 0x02020000 #define EXYNOS5_PA_SYSRAM 0x02020000 +#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000 +#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000 +#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000 #define EXYNOS4_PA_FIMC0 0x11800000 #define EXYNOS4_PA_FIMC1 0x11810000 diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h index c2d7bda..c186786 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/plat-samsung/include/plat/map-s5p.h @@ -22,6 +22,7 @@ #define S5P_VA_GPIO3 S3C_ADDR(0x02280000) #define S5P_VA_SYSRAM S3C_ADDR(0x02400000) +#define S5P_VA_SYSRAM_NS S3C_ADDR(0x02410000) #define S5P_VA_DMC0 S3C_ADDR(0x02440000) #define S5P_VA_DMC1 S3C_ADDR(0x02480000) #define S5P_VA_SROMC S3C_ADDR(0x024C0000) -- cgit v1.1 From beddf63fc8e01f06799bd6d7a2dd879885bbc9c6 Mon Sep 17 00:00:00 2001 From: Tomasz Figa Date: Tue, 11 Dec 2012 13:58:43 +0900 Subject: ARM: EXYNOS: Add secure firmware support to secondary CPU bring-up Boards using secure firmware must use different CPU boot registers and call secure firmware to boot the CPU. Signed-off-by: Kyungmin Park Signed-off-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/platsmp.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 60f7c5b..a083e05 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -145,10 +146,21 @@ static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct timeout = jiffies + (1 * HZ); while (time_before(jiffies, timeout)) { + unsigned long boot_addr; + smp_rmb(); - __raw_writel(virt_to_phys(exynos4_secondary_startup), - cpu_boot_reg(phys_cpu)); + boot_addr = virt_to_phys(exynos4_secondary_startup); + + /* + * Try to set boot address using firmware first + * and fall back to boot register if it fails. + */ + if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) + __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + + call_firmware_op(cpu_boot, phys_cpu); + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); if (pen_release == -1) @@ -204,10 +216,20 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) * system-wide flags register. The boot monitor waits * until it receives a soft interrupt, and then the * secondary CPU branches to this address. + * + * Try using firmware operation first and fall back to + * boot register if it fails. */ - for (i = 1; i < max_cpus; ++i) - __raw_writel(virt_to_phys(exynos4_secondary_startup), - cpu_boot_reg(cpu_logical_map(i))); + for (i = 1; i < max_cpus; ++i) { + unsigned long phys_cpu; + unsigned long boot_addr; + + phys_cpu = cpu_logical_map(i); + boot_addr = virt_to_phys(exynos4_secondary_startup); + + if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) + __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + } } struct smp_operations exynos_smp_ops __initdata = { -- cgit v1.1 From b8eb35fd594aa5b635e329d5c8efab8aaceb8619 Mon Sep 17 00:00:00 2001 From: Christian Daudt Date: Tue, 26 Feb 2013 21:48:49 -0800 Subject: ARM: bcm281xx: Add L2 cache enable code - Adds a module to provide calls into secure monitor mode - Uses this module to make secure monitor calls to enable L2 cache. Updates from V1: - Split DT portion into separate patch - replace #ifdef-ed L2 code with "if". - move init call to board init Signed-off-by: Christian Daudt Acked-by: Arnd Bergmann --- arch/arm/mach-bcm/Makefile | 4 +- arch/arm/mach-bcm/bcm_kona_smc.c | 118 +++++++++++++++++++++++++++++++++++ arch/arm/mach-bcm/bcm_kona_smc.h | 80 ++++++++++++++++++++++++ arch/arm/mach-bcm/bcm_kona_smc_asm.S | 41 ++++++++++++ arch/arm/mach-bcm/board_bcm.c | 23 +++++++ 5 files changed, 265 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-bcm/bcm_kona_smc.c create mode 100644 arch/arm/mach-bcm/bcm_kona_smc.h create mode 100644 arch/arm/mach-bcm/bcm_kona_smc_asm.S (limited to 'arch/arm') diff --git a/arch/arm/mach-bcm/Makefile b/arch/arm/mach-bcm/Makefile index bbf4122..6adb6aec 100644 --- a/arch/arm/mach-bcm/Makefile +++ b/arch/arm/mach-bcm/Makefile @@ -10,4 +10,6 @@ # of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. -obj-$(CONFIG_ARCH_BCM) := board_bcm.o +obj-$(CONFIG_ARCH_BCM) := board_bcm.o bcm_kona_smc.o bcm_kona_smc_asm.o +plus_sec := $(call as-instr,.arch_extension sec,+sec) +AFLAGS_bcm_kona_smc_asm.o :=-Wa,-march=armv7-a$(plus_sec) diff --git a/arch/arm/mach-bcm/bcm_kona_smc.c b/arch/arm/mach-bcm/bcm_kona_smc.c new file mode 100644 index 0000000..5f1d131 --- /dev/null +++ b/arch/arm/mach-bcm/bcm_kona_smc.c @@ -0,0 +1,118 @@ +/* + * Copyright (C) 2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include + +#include +#include + +#include "bcm_kona_smc.h" + +struct secure_bridge_data { + void __iomem *bounce; /* virtual address */ + u32 __iomem buffer_addr; /* physical address */ + int initialized; +} bridge_data; + +struct bcm_kona_smc_data { + unsigned service_id; + unsigned arg0; + unsigned arg1; + unsigned arg2; + unsigned arg3; +}; + +static const struct of_device_id bcm_kona_smc_ids[] __initconst = { + {.compatible = "bcm,kona-smc"}, + {}, +}; + +/* Map in the bounce area */ +void bcm_kona_smc_init(void) +{ + struct device_node *node; + + /* Read buffer addr and size from the device tree node */ + node = of_find_matching_node(NULL, bcm_kona_smc_ids); + BUG_ON(!node); + + /* Don't care about size or flags of the DT node */ + bridge_data.buffer_addr = + be32_to_cpu(*of_get_address(node, 0, NULL, NULL)); + BUG_ON(!bridge_data.buffer_addr); + + bridge_data.bounce = of_iomap(node, 0); + BUG_ON(!bridge_data.bounce); + + bridge_data.initialized = 1; + + pr_info("Secure API initialized!\n"); +} + +/* __bcm_kona_smc() should only run on CPU 0, with pre-emption disabled */ +static void __bcm_kona_smc(void *info) +{ + struct bcm_kona_smc_data *data = info; + u32 *args = bridge_data.bounce; + int rc = 0; + + /* Must run on CPU 0 */ + BUG_ON(smp_processor_id() != 0); + + /* Check map in the bounce area */ + BUG_ON(!bridge_data.initialized); + + /* Copy one 32 bit word into the bounce area */ + args[0] = data->arg0; + args[1] = data->arg1; + args[2] = data->arg2; + args[3] = data->arg3; + + /* Flush caches for input data passed to Secure Monitor */ + if (data->service_id != SSAPI_BRCM_START_VC_CORE) + flush_cache_all(); + + /* Trap into Secure Monitor */ + rc = bcm_kona_smc_asm(data->service_id, bridge_data.buffer_addr); + + if (rc != SEC_ROM_RET_OK) + pr_err("Secure Monitor call failed (0x%x)!\n", rc); +} + +unsigned bcm_kona_smc(unsigned service_id, unsigned arg0, unsigned arg1, + unsigned arg2, unsigned arg3) +{ + struct bcm_kona_smc_data data; + + data.service_id = service_id; + data.arg0 = arg0; + data.arg1 = arg1; + data.arg2 = arg2; + data.arg3 = arg3; + + /* + * Due to a limitation of the secure monitor, we must use the SMP + * infrastructure to forward all secure monitor calls to Core 0. + */ + if (get_cpu() != 0) + smp_call_function_single(0, __bcm_kona_smc, (void *)&data, 1); + else + __bcm_kona_smc(&data); + + put_cpu(); + + return 0; +} diff --git a/arch/arm/mach-bcm/bcm_kona_smc.h b/arch/arm/mach-bcm/bcm_kona_smc.h new file mode 100644 index 0000000..3bedbed1 --- /dev/null +++ b/arch/arm/mach-bcm/bcm_kona_smc.h @@ -0,0 +1,80 @@ +/* + * Copyright (C) 2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef BCM_KONA_SMC_H +#define BCM_KONA_SMC_H + +#include +#define FLAGS (SEC_ROM_ICACHE_ENABLE_MASK | SEC_ROM_DCACHE_ENABLE_MASK | \ + SEC_ROM_IRQ_ENABLE_MASK | SEC_ROM_FIQ_ENABLE_MASK) + +/*! + * Definitions for IRQ & FIQ Mask for ARM + */ + +#define FIQ_IRQ_MASK 0xC0 +#define FIQ_MASK 0x40 +#define IRQ_MASK 0x80 + +/*! + * Secure Mode FLAGs + */ + +/* When set, enables ICache within the secure mode */ +#define SEC_ROM_ICACHE_ENABLE_MASK 0x00000001 + +/* When set, enables DCache within the secure mode */ +#define SEC_ROM_DCACHE_ENABLE_MASK 0x00000002 + +/* When set, enables IRQ within the secure mode */ +#define SEC_ROM_IRQ_ENABLE_MASK 0x00000004 + +/* When set, enables FIQ within the secure mode */ +#define SEC_ROM_FIQ_ENABLE_MASK 0x00000008 + +/* When set, enables Unified L2 cache within the secure mode */ +#define SEC_ROM_UL2_CACHE_ENABLE_MASK 0x00000010 + +/* Broadcom Secure Service API Service IDs */ +#define SSAPI_DORMANT_ENTRY_SERV 0x01000000 +#define SSAPI_PUBLIC_OTP_SERV 0x01000001 +#define SSAPI_ENABLE_L2_CACHE 0x01000002 +#define SSAPI_DISABLE_L2_CACHE 0x01000003 +#define SSAPI_WRITE_SCU_STATUS 0x01000004 +#define SSAPI_WRITE_PWR_GATE 0x01000005 + +/* Broadcom Secure Service API Return Codes */ +#define SEC_ROM_RET_OK 0x00000001 +#define SEC_ROM_RET_FAIL 0x00000009 + +#define SSAPI_RET_FROM_INT_SERV 0x4 +#define SEC_EXIT_NORMAL 0x1 + +#define SSAPI_ROW_AES 0x0E000006 +#define SSAPI_BRCM_START_VC_CORE 0x0E000008 + +#ifndef __ASSEMBLY__ +extern void bcm_kona_smc_init(void); + +extern unsigned bcm_kona_smc(unsigned service_id, + unsigned arg0, + unsigned arg1, + unsigned arg2, + unsigned arg3); + +extern int bcm_kona_smc_asm(u32 service_id, + u32 buffer_addr); + +#endif /* __ASSEMBLY__ */ + +#endif /* BCM_KONA_SMC_H */ diff --git a/arch/arm/mach-bcm/bcm_kona_smc_asm.S b/arch/arm/mach-bcm/bcm_kona_smc_asm.S new file mode 100644 index 0000000..a160848 --- /dev/null +++ b/arch/arm/mach-bcm/bcm_kona_smc_asm.S @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include "bcm_kona_smc.h" + +/* + * int bcm_kona_smc_asm(u32 service_id, u32 buffer_addr) + */ + +ENTRY(bcm_kona_smc_asm) + stmfd sp!, {r4-r12, lr} + mov r4, r0 @ service_id + mov r5, #3 @ Keep IRQ and FIQ off in SM + /* + * Since interrupts are disabled in the open mode, we must keep + * interrupts disabled in secure mode by setting R5=0x3. If interrupts + * are enabled in open mode, we can set R5=0x0 to allow interrupts in + * secure mode. If we did this, the secure monitor would return back + * control to the open mode to handle the interrupt prior to completing + * the secure service. If this happened, R12 would not be + * SEC_EXIT_NORMAL and we would need to call SMC again after resetting + * R5 (it gets clobbered by the secure monitor) and setting R4 to + * SSAPI_RET_FROM_INT_SERV to indicate that we want the secure monitor + * to finish up the previous uncompleted secure service. + */ + mov r6, r1 @ buffer_addr + smc #0 + /* Check r12 for SEC_EXIT_NORMAL here if interrupts are enabled */ + ldmfd sp!, {r4-r12, pc} +ENDPROC(bcm_kona_smc_asm) diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c index f0f9aba..28be74e 100644 --- a/arch/arm/mach-bcm/board_bcm.c +++ b/arch/arm/mach-bcm/board_bcm.c @@ -19,16 +19,39 @@ #include #include +#include static void timer_init(void) { } +#include "bcm_kona_smc.h" + +static int __init kona_l2_cache_init(void) +{ + if (!IS_ENABLED(CONFIG_CACHE_L2X0)) + return 0; + + bcm_kona_smc(SSAPI_ENABLE_L2_CACHE, 0, 0, 0, 0); + + /* + * The aux_val and aux_mask have no effect since L2 cache is already + * enabled. Pass 0s for aux_val and 1s for aux_mask for default value. + */ + l2x0_of_init(0, ~0); + + return 0; +} + static void __init board_init(void) { of_platform_populate(NULL, of_default_bus_match_table, NULL, &platform_bus); + + bcm_kona_smc_init(); + + kona_l2_cache_init(); } static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, }; -- cgit v1.1 From 7f6c62e2695bcb1547afdeb4ad3bcdf8c610be2c Mon Sep 17 00:00:00 2001 From: Christian Daudt Date: Wed, 13 Mar 2013 15:05:37 -0700 Subject: ARM: bcm281xx: Add DT support for SMC handler - Adds devicetree binding and documentation for the smc handler Updates from V1: - Created this separate patch for the DT portion - Added SoC compatible to smc binding Signed-off-by: Christian Daudt Acked-by: Arnd Bergmann --- arch/arm/boot/dts/bcm11351.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index ad13588..be2a261 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi @@ -31,6 +31,11 @@ <0x3ff00100 0x100>; }; + smc@0x3404c000 { + compatible = "bcm,bcm11351-smc", "bcm,kona-smc"; + reg = <0x3404c000 0x400>; //1 KiB in SRAM + }; + uart@3e000000 { compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; status = "disabled"; -- cgit v1.1 From 721e0205b07589223343737a9c421d8118d87bba Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 23 Apr 2013 16:06:40 +0200 Subject: ARM: bcm: mark bcm_kona_smc_init as __init The bcm_kona_smc_init function references the bcm_kona_smc_ids variable that is marked __initconst, so the function itself has to be __init to avoid this build error: WARNING: arch/arm/mach-bcm/built-in.o(.text+0x12c): Section mismatch in reference from the function bcm_kona_smc_init() to the (unknown reference) .init.rodata:(unknown) Signed-off-by: Arnd Bergmann Cc: Christian Daudt --- arch/arm/mach-bcm/bcm_kona_smc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-bcm/bcm_kona_smc.c b/arch/arm/mach-bcm/bcm_kona_smc.c index 5f1d131..56d9d19 100644 --- a/arch/arm/mach-bcm/bcm_kona_smc.c +++ b/arch/arm/mach-bcm/bcm_kona_smc.c @@ -41,7 +41,7 @@ static const struct of_device_id bcm_kona_smc_ids[] __initconst = { }; /* Map in the bounce area */ -void bcm_kona_smc_init(void) +void __init bcm_kona_smc_init(void) { struct device_node *node; -- cgit v1.1