From a5547642a4e08c98edeaf4b62f6da0ac8ed2f6bd Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 10 Jun 2016 12:06:45 +0200 Subject: arm64: dts: r8a7795: Add missing blank lines between cpu nodes For consistency with a57_0/a57_1 cpu nodes, and all other nodes. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 04eb0bc..fad6dd8 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -53,6 +53,7 @@ next-level-cache = <&L2_CA57>; enable-method = "psci"; }; + a57_2: cpu@2 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x2>; @@ -61,6 +62,7 @@ next-level-cache = <&L2_CA57>; enable-method = "psci"; }; + a57_3: cpu@3 { compatible = "arm,cortex-a57","arm,armv8"; reg = <0x3>; -- cgit v1.1 From 162cd7845d5e9e16663079cc589046b3e588c104 Mon Sep 17 00:00:00 2001 From: Ramesh Shanmugasundaram Date: Fri, 17 Jun 2016 13:35:43 +0100 Subject: arm64: dts: r8a7795: Add CAN FD support Adds CAN FD controller node for r8a7795. Note: CAN FD controller register base address specified in R-Car Gen3 Hardware User Manual v0.5E is incorrect. The correct address is: CAN FD - 0xe66c0000 Signed-off-by: Ramesh Shanmugasundaram Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index fad6dd8..b902356 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -583,6 +583,30 @@ status = "disabled"; }; + canfd: can@e66c0000 { + compatible = "renesas,r8a7795-canfd", + "renesas,rcar-gen3-canfd"; + reg = <0 0xe66c0000 0 0x8000>; + interrupts = , + ; + clocks = <&cpg CPG_MOD 914>, + <&cpg CPG_CORE R8A7795_CLK_CANFD>, + <&can_clk>; + clock-names = "fck", "canfd", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + status = "disabled"; + + channel0 { + status = "disabled"; + }; + + channel1 { + status = "disabled"; + }; + }; + hscif0: serial@e6540000 { compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif", -- cgit v1.1 From 1561f20760ec96db4d6808b09f3a691edc22f937 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Tue, 24 May 2016 10:54:38 +0900 Subject: arm64: dts: r8a7796: Add Renesas R8A7796 SoC support Basic support for the Gen 3 R-Car M3-W SoC. Based on work for the r8a7795 and r8a7796 SoCs by Takeshi Kihara, Dirk Behme and Geert Uytterhoeven. Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 120 +++++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a7796.dtsi (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi new file mode 100644 index 0000000..178debf --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -0,0 +1,120 @@ +/* + * Device Tree Source for the r8a7796 SoC + * + * Copyright (C) 2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include + +/ { + compatible = "renesas,r8a7796"; + #address-cells = <2>; + #size-cells = <2>; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + /* 1 core only at this point */ + a57_0: cpu@0 { + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x0>; + device_type = "cpu"; + next-level-cache = <&L2_CA57>; + enable-method = "psci"; + }; + + L2_CA57: cache-controller@0 { + compatible = "cache"; + reg = <0>; + cache-unified; + cache-level = <2>; + }; + }; + + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + extalr_clk: extalr { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + /* External SCIF clock - to be overridden by boards that provide it */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@f1010000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xf1010000 0 0x1000>, + <0x0 0xf1020000 0 0x20000>, + <0x0 0xf1040000 0 0x20000>, + <0x0 0xf1060000 0 0x20000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + cpg: clock-controller@e6150000 { + compatible = "renesas,r8a7796-cpg-mssr"; + reg = <0 0xe6150000 0 0x1000>; + clocks = <&extal_clk>, <&extalr_clk>; + clock-names = "extal", "extalr"; + #clock-cells = <2>; + #power-domain-cells = <0>; + }; + + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a7796", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = ; + clocks = <&cpg CPG_MOD 310>, + <&cpg CPG_CORE R8A7796_CLK_S3D1>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + power-domains = <&cpg>; + status = "disabled"; + }; + }; +}; -- cgit v1.1 From 006e1db8f7beb4525639bb82f544e01cc41129a9 Mon Sep 17 00:00:00 2001 From: Takeshi Kihara Date: Tue, 24 May 2016 10:54:39 +0900 Subject: arm64: dts: salvator-x: add Salvator-X board on R8A7796 SoC This patch adds initial board support for R8A7796 Salvator-X. Signed-off-by: Takeshi Kihara Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/Makefile | 1 + arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 45 ++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 9ce1890..17139f7 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -1,4 +1,5 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb +dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb always := $(dtb-y) clean-files := *.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts new file mode 100644 index 0000000..9c52613 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts @@ -0,0 +1,45 @@ +/* + * Device Tree Source for the Salvator-X board + * + * Copyright (C) 2016 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +#include "r8a7796.dtsi" + +/ { + model = "Renesas Salvator-X board based on r8a7796"; + compatible = "renesas,salvator-x", "renesas,r8a7796"; + + aliases { + serial0 = &scif2; + }; + + chosen { + bootargs = "ignore_loglevel"; + stdout-path = "serial0:115200n8"; + }; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; +}; + +&extal_clk { + clock-frequency = <16666666>; +}; + +&scif2 { + status = "okay"; +}; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +}; -- cgit v1.1 From 56aebae0003f8987cf1f07238ec9e6243fe88080 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 31 May 2016 11:08:44 +0200 Subject: arm64: dts: r8a7796: Add SYSC PM Domains Add a device node for the System Controller. Hook up the Cortex-A57 CPU core and L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 178debf..85f0843 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -10,6 +10,7 @@ #include #include +#include / { compatible = "renesas,r8a7796"; @@ -30,6 +31,7 @@ compatible = "arm,cortex-a57", "arm,armv8"; reg = <0x0>; device_type = "cpu"; + power-domains = <&sysc R8A7796_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; }; @@ -37,6 +39,7 @@ L2_CA57: cache-controller@0 { compatible = "cache"; reg = <0>; + power-domains = <&sysc R8A7796_PD_CA57_SCU>; cache-unified; cache-level = <2>; }; @@ -104,6 +107,12 @@ #power-domain-cells = <0>; }; + sysc: system-controller@e6180000 { + compatible = "renesas,r8a7796-sysc"; + reg = <0 0xe6180000 0 0x0400>; + #power-domain-cells = <1>; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a7796", "renesas,rcar-gen3-scif", "renesas,scif"; -- cgit v1.1 From a9003187a984ea835b5533165d97733303c5399e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 31 May 2016 11:08:45 +0200 Subject: arm64: dts: r8a7796: Use SYSC "always-on" PM Domain Hook up all devices that are part of the CPG/MSSR Clock Domain to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 85f0843..fab61ed 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -122,7 +122,7 @@ <&cpg CPG_CORE R8A7796_CLK_S3D1>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&cpg>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; status = "disabled"; }; }; -- cgit v1.1 From c8ce8007e5c0678fe40e3e401f68ee0b9e74ee92 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 27 Jun 2016 19:50:46 +0200 Subject: arm64: dts: r8a7796: Add RWDT node Add a device node for the Watchdog Timer (WDT) controller on the Renesas R-Car M3-W (r8a7796) SoC. Signed-off-by: Geert Uytterhoeven Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index fab61ed..1edf824 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -98,6 +98,15 @@ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; }; + wdt0: watchdog@e6020000 { + compatible = "renesas,r8a7796-wdt", + "renesas,rcar-gen3-wdt"; + reg = <0 0xe6020000 0 0x0c>; + clocks = <&cpg CPG_MOD 402>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a7796-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>; -- cgit v1.1 From c805f1a7013a76ae63c002e52cc667d7c37228ea Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 27 Jun 2016 19:50:47 +0200 Subject: arm64: dts: r8a7796/salvator-x: Enable watchdog timer Enable the Watchdog Timer (WDT) controller on the Renesas Salvator-X board equipped with an R-Car M3-W (r8a7796) SoC. Signed-off-by: Geert Uytterhoeven Acked-by: Wolfram Sang Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts index 9c52613..e72be38 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts @@ -43,3 +43,8 @@ clock-frequency = <14745600>; status = "okay"; }; + +&wdt0 { + timeout-sec = <60>; + status = "okay"; +}; -- cgit v1.1