From a3f66351b3cc89011e8a34068c245b413ce696d6 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:05 +0000 Subject: [ARM] S3C: Nove from plat-s3c24xx to plat-s3fc Move the header to plat-s3c as preparation for moving parts of the s3c24xx pm support which are common into the plat-s3c support. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/pm.h | 73 --------------------------------- 1 file changed, 73 deletions(-) delete mode 100644 arch/arm/plat-s3c24xx/include/plat/pm.h (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/pm.h b/arch/arm/plat-s3c24xx/include/plat/pm.h deleted file mode 100644 index cc62366..0000000 --- a/arch/arm/plat-s3c24xx/include/plat/pm.h +++ /dev/null @@ -1,73 +0,0 @@ -/* linux/include/asm-arm/plat-s3c24xx/pm.h - * - * Copyright (c) 2004 Simtec Electronics - * Written by Ben Dooks, - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* s3c2410_pm_init - * - * called from board at initialisation time to setup the power - * management -*/ - -#ifdef CONFIG_PM - -extern __init int s3c2410_pm_init(void); - -#else - -static inline int s3c2410_pm_init(void) -{ - return 0; -} -#endif - -/* configuration for the IRQ mask over sleep */ -extern unsigned long s3c_irqwake_intmask; -extern unsigned long s3c_irqwake_eintmask; - -/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ -extern unsigned long s3c_irqwake_intallow; -extern unsigned long s3c_irqwake_eintallow; - -/* per-cpu sleep functions */ - -extern void (*pm_cpu_prep)(void); -extern void (*pm_cpu_sleep)(void); - -/* Flags for PM Control */ - -extern unsigned long s3c_pm_flags; - -/* from sleep.S */ - -extern int s3c2410_cpu_save(unsigned long *saveblk); -extern void s3c2410_cpu_suspend(void); -extern void s3c2410_cpu_resume(void); - -extern unsigned long s3c2410_sleep_save_phys; - -/* sleep save info */ - -struct sleep_save { - void __iomem *reg; - unsigned long val; -}; - -#define SAVE_ITEM(x) \ - { .reg = (x) } - -extern void s3c2410_pm_do_save(struct sleep_save *ptr, int count); -extern void s3c2410_pm_do_restore(struct sleep_save *ptr, int count); - -#ifdef CONFIG_PM -extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); -extern int s3c24xx_irq_resume(struct sys_device *dev); -#else -#define s3c24xx_irq_suspend NULL -#define s3c24xx_irq_resume NULL -#endif -- cgit v1.1 From 6419711a164ba1304fa8fbb75ae9485455e04dcd Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:06 +0000 Subject: [ARM] S3C: Move PM support functions to common location Start moving the PM code by moving all the common support functions to a common location in arch/arm/plat-s3c. With the move we rename the functions from s3cxxx_ to s3c_ to fit the new location. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/irq.c | 4 +- arch/arm/plat-s3c24xx/pm.c | 113 +++++++++------------------------------- arch/arm/plat-s3c24xx/s3c244x.c | 4 +- arch/arm/plat-s3c24xx/sleep.S | 8 +-- 4 files changed, 33 insertions(+), 96 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 0192ecd..2fa8c9f 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -616,7 +616,7 @@ int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); - s3c2410_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); + s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); save_eintmask = __raw_readl(S3C24XX_EINTMASK); return 0; @@ -632,7 +632,7 @@ int s3c24xx_irq_resume(struct sys_device *dev) for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); - s3c2410_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); + s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); __raw_writel(save_eintmask, S3C24XX_EINTMASK); return 0; diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 34ef18e..c161f9c 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -49,9 +49,6 @@ #include -/* for external use */ - -unsigned long s3c_pm_flags; #define PFX "s3c24xx-pm: " @@ -143,20 +140,6 @@ static struct sleep_save uart_save[] = { * system never wakes up from the sleep */ -extern void printascii(const char *); - -void pm_dbg(const char *fmt, ...) -{ - va_list va; - char buff[256]; - - va_start(va, fmt); - vsprintf(buff, fmt, va); - va_end(va); - - printascii(buff); -} - static void s3c2410_pm_debug_init(void) { unsigned long tmp = __raw_readl(S3C2410_CLKCON); @@ -170,10 +153,7 @@ static void s3c2410_pm_debug_init(void) udelay(10); } -#define DBG(fmt...) pm_dbg(fmt) #else -#define DBG(fmt...) printk(KERN_DEBUG fmt) - #define s3c2410_pm_debug_init() do { } while(0) static struct sleep_save uart_save[] = {}; @@ -211,7 +191,7 @@ static void s3c2410_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg) if ((ptr->flags & IORESOURCE_MEM) && strcmp(ptr->name, "System RAM") == 0) { - DBG("Found system RAM at %08lx..%08lx\n", + S3C_PMDBG("Found system RAM at %08lx..%08lx\n", ptr->start, ptr->end); arg = (fn)(ptr, arg); } @@ -232,7 +212,7 @@ static u32 *s3c2410_pm_countram(struct resource *res, u32 *val) size += CHECK_CHUNKSIZE-1; size /= CHECK_CHUNKSIZE; - DBG("Area %08lx..%08lx, %d blocks\n", res->start, res->end, size); + S3C_PMDBG("Area %08lx..%08lx, %d blocks\n", res->start, res->end, size); *val += size * sizeof(u32); return val; @@ -252,7 +232,7 @@ static void s3c2410_pm_check_prepare(void) s3c2410_pm_run_sysram(s3c2410_pm_countram, &crc_size); - DBG("s3c2410_pm_prepare_check: %u checks needed\n", crc_size); + S3C_PMDBG("s3c2410_pm_prepare_check: %u checks needed\n", crc_size); crcs = kmalloc(crc_size+4, GFP_KERNEL); if (crcs == NULL) @@ -308,7 +288,7 @@ static inline int in_region(void *ptr, int size, void *what, size_t whatsz) static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val) { - void *save_at = phys_to_virt(s3c2410_sleep_save_phys); + void *save_at = phys_to_virt(s3c_sleep_save_phys); unsigned long addr; unsigned long left; void *ptr; @@ -324,12 +304,12 @@ static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val) ptr = phys_to_virt(addr); if (in_region(ptr, left, crcs, crc_size)) { - DBG("skipping %08lx, has crc block in\n", addr); + S3C_PMDBG("skipping %08lx, has crc block in\n", addr); goto skip_check; } if (in_region(ptr, left, save_at, 32*4 )) { - DBG("skipping %08lx, has save block in\n", addr); + S3C_PMDBG("skipping %08lx, has save block in\n", addr); goto skip_check; } @@ -340,7 +320,7 @@ static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val) printk(KERN_ERR PFX "Restore CRC error at " "%08lx (%08x vs %08x)\n", addr, calc, *val); - DBG("Restore CRC error at %08lx (%08x vs %08x)\n", + S3C_PMDBG("Restore CRC error at %08lx (%08x vs %08x)\n", addr, calc, *val); } @@ -373,49 +353,6 @@ static void s3c2410_pm_check_restore(void) #define s3c2410_pm_check_store() do { } while(0) #endif -/* helper functions to save and restore register state */ - -void s3c2410_pm_do_save(struct sleep_save *ptr, int count) -{ - for (; count > 0; count--, ptr++) { - ptr->val = __raw_readl(ptr->reg); - DBG("saved %p value %08lx\n", ptr->reg, ptr->val); - } -} - -/* s3c2410_pm_do_restore - * - * restore the system from the given list of saved registers - * - * Note, we do not use DBG() in here, as the system may not have - * restore the UARTs state yet -*/ - -void s3c2410_pm_do_restore(struct sleep_save *ptr, int count) -{ - for (; count > 0; count--, ptr++) { - printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n", - ptr->reg, ptr->val, __raw_readl(ptr->reg)); - - __raw_writel(ptr->val, ptr->reg); - } -} - -/* s3c2410_pm_do_restore_core - * - * similar to s3c2410_pm_do_restore_core - * - * WARNING: Do not put any debug in here that may effect memory or use - * peripherals, as things may be changing! -*/ - -static void s3c2410_pm_do_restore_core(struct sleep_save *ptr, int count) -{ - for (; count > 0; count--, ptr++) { - __raw_writel(ptr->val, ptr->reg); - } -} - /* s3c2410_pm_show_resume_irqs * * print any IRQs asserted at resume time (ie, we woke from) @@ -430,7 +367,7 @@ static void s3c2410_pm_show_resume_irqs(int start, unsigned long which, for (i = 0; i <= 31; i++) { if ((which) & (1L<gpup, base + OFFS_UP); } - DBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", - index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); + S3C_PMDBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", + index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); } @@ -684,7 +621,7 @@ static int s3c2410_pm_enter(suspend_state_t state) s3c2410_pm_debug_init(); - DBG("s3c2410_pm_enter(%d)\n", state); + S3C_PMDBG("s3c2410_pm_enter(%d)\n", state); if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { printk(KERN_ERR PFX "error: no cpu sleep functions set\n"); @@ -709,22 +646,22 @@ static int s3c2410_pm_enter(suspend_state_t state) /* store the physical address of the register recovery block */ - s3c2410_sleep_save_phys = virt_to_phys(regs_save); + s3c_sleep_save_phys = virt_to_phys(regs_save); - DBG("s3c2410_sleep_save_phys=0x%08lx\n", s3c2410_sleep_save_phys); + S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); /* save all necessary core registers not covered by the drivers */ s3c2410_pm_save_gpios(); - s3c2410_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); - s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); - s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); + s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); + s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); + s3c_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); /* set the irq configuration for wake */ s3c2410_pm_configure_extint(); - DBG("sleep: irq wakeup masks: %08lx,%08lx\n", + S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", s3c_irqwake_intmask, s3c_irqwake_eintmask); __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); @@ -765,16 +702,16 @@ static int s3c2410_pm_enter(suspend_state_t state) /* restore the system state */ - s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); - s3c2410_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); - s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); + s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); + s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); + s3c_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); s3c2410_pm_restore_gpios(); s3c2410_pm_debug_init(); /* check what irq (if any) restored the system */ - DBG("post sleep: IRQs 0x%08x, 0x%08x\n", + S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n", __raw_readl(S3C2410_SRCPND), __raw_readl(S3C2410_EINTPEND)); @@ -784,13 +721,13 @@ static int s3c2410_pm_enter(suspend_state_t state) s3c2410_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), s3c_irqwake_eintmask); - DBG("post sleep, preparing to return\n"); + S3C_PMDBG("post sleep, preparing to return\n"); s3c2410_pm_check_restore(); /* ok, let's return from sleep */ - DBG("S3C2410 PM Resume (post-restore)\n"); + S3C_PMDBG("S3C2410 PM Resume (post-restore)\n"); return 0; } diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index c1de6bb..1364317d 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c @@ -145,13 +145,13 @@ static struct sleep_save s3c244x_sleep[] = { static int s3c244x_suspend(struct sys_device *dev, pm_message_t state) { - s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); + s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); return 0; } static int s3c244x_resume(struct sys_device *dev) { - s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); + s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); return 0; } diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 76594b2..7c1955f 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -84,7 +84,7 @@ resume_with_mmu: .ltorg @@ the next bits sit in the .data segment, even though they - @@ happen to be code... the s3c2410_sleep_save_phys needs to be + @@ happen to be code... the s3c_sleep_save_phys needs to be @@ accessed by the resume code before it can restore the MMU. @@ This means that the variable has to be close enough for the @@ code to read it... since the .text segment needs to be RO, @@ -92,8 +92,8 @@ resume_with_mmu: .data - .global s3c2410_sleep_save_phys -s3c2410_sleep_save_phys: + .global s3c_sleep_save_phys +s3c_sleep_save_phys: .word 0 @@ -145,7 +145,7 @@ ENTRY(s3c2410_cpu_resume) mcr p15, 0, r1, c8, c7, 0 @@ invalidate I & D TLBs mcr p15, 0, r1, c7, c7, 0 @@ invalidate I & D caches - ldr r0, s3c2410_sleep_save_phys @ address of restore block + ldr r0, s3c_sleep_save_phys @ address of restore block ldmia r0, { r4 - r13 } mcr p15, 0, r4, c13, c0, 0 @ PID -- cgit v1.1 From 549c7e33aeb9bfe441ecf68639d2227bb90978e7 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:07 +0000 Subject: [ARM] S3C: Split the resume memory check code from pm.c Split the optional memory check code out of the pm.c file as it is quite a big #ifdef block and as-such can be moved out and simply compiled when the configuration is set. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/pm.c | 210 ++------------------------------------------- 1 file changed, 7 insertions(+), 203 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index c161f9c..e2ae12d 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -31,8 +31,6 @@ #include #include #include -#include -#include #include #include @@ -159,200 +157,6 @@ static void s3c2410_pm_debug_init(void) static struct sleep_save uart_save[] = {}; #endif -#if defined(CONFIG_S3C2410_PM_CHECK) && CONFIG_S3C2410_PM_CHECK_CHUNKSIZE != 0 - -/* suspend checking code... - * - * this next area does a set of crc checks over all the installed - * memory, so the system can verify if the resume was ok. - * - * CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC, - * increasing it will mean that the area corrupted will be less easy to spot, - * and reducing the size will cause the CRC save area to grow -*/ - -#define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024) - -static u32 crc_size; /* size needed for the crc block */ -static u32 *crcs; /* allocated over suspend/resume */ - -typedef u32 *(run_fn_t)(struct resource *ptr, u32 *arg); - -/* s3c2410_pm_run_res - * - * go thorugh the given resource list, and look for system ram -*/ - -static void s3c2410_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg) -{ - while (ptr != NULL) { - if (ptr->child != NULL) - s3c2410_pm_run_res(ptr->child, fn, arg); - - if ((ptr->flags & IORESOURCE_MEM) && - strcmp(ptr->name, "System RAM") == 0) { - S3C_PMDBG("Found system RAM at %08lx..%08lx\n", - ptr->start, ptr->end); - arg = (fn)(ptr, arg); - } - - ptr = ptr->sibling; - } -} - -static void s3c2410_pm_run_sysram(run_fn_t fn, u32 *arg) -{ - s3c2410_pm_run_res(&iomem_resource, fn, arg); -} - -static u32 *s3c2410_pm_countram(struct resource *res, u32 *val) -{ - u32 size = (u32)(res->end - res->start)+1; - - size += CHECK_CHUNKSIZE-1; - size /= CHECK_CHUNKSIZE; - - S3C_PMDBG("Area %08lx..%08lx, %d blocks\n", res->start, res->end, size); - - *val += size * sizeof(u32); - return val; -} - -/* s3c2410_pm_prepare_check - * - * prepare the necessary information for creating the CRCs. This - * must be done before the final save, as it will require memory - * allocating, and thus touching bits of the kernel we do not - * know about. -*/ - -static void s3c2410_pm_check_prepare(void) -{ - crc_size = 0; - - s3c2410_pm_run_sysram(s3c2410_pm_countram, &crc_size); - - S3C_PMDBG("s3c2410_pm_prepare_check: %u checks needed\n", crc_size); - - crcs = kmalloc(crc_size+4, GFP_KERNEL); - if (crcs == NULL) - printk(KERN_ERR "Cannot allocated CRC save area\n"); -} - -static u32 *s3c2410_pm_makecheck(struct resource *res, u32 *val) -{ - unsigned long addr, left; - - for (addr = res->start; addr < res->end; - addr += CHECK_CHUNKSIZE) { - left = res->end - addr; - - if (left > CHECK_CHUNKSIZE) - left = CHECK_CHUNKSIZE; - - *val = crc32_le(~0, phys_to_virt(addr), left); - val++; - } - - return val; -} - -/* s3c2410_pm_check_store - * - * compute the CRC values for the memory blocks before the final - * sleep. -*/ - -static void s3c2410_pm_check_store(void) -{ - if (crcs != NULL) - s3c2410_pm_run_sysram(s3c2410_pm_makecheck, crcs); -} - -/* in_region - * - * return TRUE if the area defined by ptr..ptr+size contatins the - * what..what+whatsz -*/ - -static inline int in_region(void *ptr, int size, void *what, size_t whatsz) -{ - if ((what+whatsz) < ptr) - return 0; - - if (what > (ptr+size)) - return 0; - - return 1; -} - -static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val) -{ - void *save_at = phys_to_virt(s3c_sleep_save_phys); - unsigned long addr; - unsigned long left; - void *ptr; - u32 calc; - - for (addr = res->start; addr < res->end; - addr += CHECK_CHUNKSIZE) { - left = res->end - addr; - - if (left > CHECK_CHUNKSIZE) - left = CHECK_CHUNKSIZE; - - ptr = phys_to_virt(addr); - - if (in_region(ptr, left, crcs, crc_size)) { - S3C_PMDBG("skipping %08lx, has crc block in\n", addr); - goto skip_check; - } - - if (in_region(ptr, left, save_at, 32*4 )) { - S3C_PMDBG("skipping %08lx, has save block in\n", addr); - goto skip_check; - } - - /* calculate and check the checksum */ - - calc = crc32_le(~0, ptr, left); - if (calc != *val) { - printk(KERN_ERR PFX "Restore CRC error at " - "%08lx (%08x vs %08x)\n", addr, calc, *val); - - S3C_PMDBG("Restore CRC error at %08lx (%08x vs %08x)\n", - addr, calc, *val); - } - - skip_check: - val++; - } - - return val; -} - -/* s3c2410_pm_check_restore - * - * check the CRCs after the restore event and free the memory used - * to hold them -*/ - -static void s3c2410_pm_check_restore(void) -{ - if (crcs != NULL) { - s3c2410_pm_run_sysram(s3c2410_pm_runcheck, crcs); - kfree(crcs); - crcs = NULL; - } -} - -#else - -#define s3c2410_pm_check_prepare() do { } while(0) -#define s3c2410_pm_check_restore() do { } while(0) -#define s3c2410_pm_check_store() do { } while(0) -#endif - /* s3c2410_pm_show_resume_irqs * * print any IRQs asserted at resume time (ie, we woke from) @@ -372,13 +176,13 @@ static void s3c2410_pm_show_resume_irqs(int start, unsigned long which, } } -/* s3c2410_pm_check_resume_pin +/* s3c_pm_check_resume_pin * * check to see if the pin is configured correctly for sleep mode, and * make any necessary adjustments if it is not */ -static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) +static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) { unsigned long irqstate; unsigned long pinstate; @@ -417,11 +221,11 @@ static void s3c2410_pm_configure_extint(void) */ for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) { - s3c2410_pm_check_resume_pin(pin, pin - S3C2410_GPF0); + s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF0); } for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) { - s3c2410_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); + s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); } } @@ -642,7 +446,7 @@ static int s3c2410_pm_enter(suspend_state_t state) /* prepare check area if configured */ - s3c2410_pm_check_prepare(); + s3c_pm_check_prepare(); /* store the physical address of the register recovery block */ @@ -681,7 +485,7 @@ static int s3c2410_pm_enter(suspend_state_t state) flush_cache_all(); - s3c2410_pm_check_store(); + s3c_pm_check_store(); /* send the cpu to sleep... */ @@ -723,7 +527,7 @@ static int s3c2410_pm_enter(suspend_state_t state) S3C_PMDBG("post sleep, preparing to return\n"); - s3c2410_pm_check_restore(); + s3c_pm_check_restore(); /* ok, let's return from sleep */ -- cgit v1.1 From 2261e0e6e3991d4c5f33e9fedadfc465eedc05a7 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:08 +0000 Subject: [ARM] S3C: Move plat-s3c24xx pm.c support into plat-s3c Move parts of the core and debug suspend code into the plat-s3c for use with the new s3c64xx code. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/pm-core.h | 59 +++++++ arch/arm/plat-s3c24xx/pm.c | 224 ++------------------------- 2 files changed, 73 insertions(+), 210 deletions(-) create mode 100644 arch/arm/plat-s3c24xx/include/plat/pm-core.h (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/plat-s3c24xx/include/plat/pm-core.h new file mode 100644 index 0000000..c758821 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/pm-core.h @@ -0,0 +1,59 @@ +/* linux/arch/arm/plat-s3c24xx/include/plat/pll.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +static inline void s3c_pm_debug_init_uart(void) +{ + unsigned long tmp = __raw_readl(S3C2410_CLKCON); + + /* re-start uart clocks */ + tmp |= S3C2410_CLKCON_UART0; + tmp |= S3C2410_CLKCON_UART1; + tmp |= S3C2410_CLKCON_UART2; + + __raw_writel(tmp, S3C2410_CLKCON); + udelay(10); +} + +static inline void s3c_pm_arch_prepare_irqs(void) +{ + __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); + __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); + + /* ack any outstanding external interrupts before we go to sleep */ + + __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); + __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); + __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); + +} + +static inline void s3c_pm_arch_stop_clocks(void) +{ + __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ +} + +static void s3c_pm_show_resume_irqs(int start, unsigned long which, + unsigned long mask); + +static inline void s3c_pm_arch_show_resume_irqs(void) +{ + S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n", + __raw_readl(S3C2410_SRCPND), + __raw_readl(S3C2410_EINTPEND)); + + s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), + s3c_irqwake_intmask); + + s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), + s3c_irqwake_eintmask); +} diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index e2ae12d..062a293 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -34,9 +34,6 @@ #include #include -#include -#include - #include #include #include @@ -47,7 +44,6 @@ #include - #define PFX "s3c24xx-pm: " static struct sleep_save core_save[] = { @@ -115,66 +111,6 @@ static struct sleep_save misc_save[] = { SAVE_ITEM(S3C2410_DCLKCON), }; -#ifdef CONFIG_S3C2410_PM_DEBUG - -#define SAVE_UART(va) \ - SAVE_ITEM((va) + S3C2410_ULCON), \ - SAVE_ITEM((va) + S3C2410_UCON), \ - SAVE_ITEM((va) + S3C2410_UFCON), \ - SAVE_ITEM((va) + S3C2410_UMCON), \ - SAVE_ITEM((va) + S3C2410_UBRDIV) - -static struct sleep_save uart_save[] = { - SAVE_UART(S3C24XX_VA_UART0), - SAVE_UART(S3C24XX_VA_UART1), -#ifndef CONFIG_CPU_S3C2400 - SAVE_UART(S3C24XX_VA_UART2), -#endif -}; - -/* debug - * - * we send the debug to printascii() to allow it to be seen if the - * system never wakes up from the sleep -*/ - -static void s3c2410_pm_debug_init(void) -{ - unsigned long tmp = __raw_readl(S3C2410_CLKCON); - - /* re-start uart clocks */ - tmp |= S3C2410_CLKCON_UART0; - tmp |= S3C2410_CLKCON_UART1; - tmp |= S3C2410_CLKCON_UART2; - - __raw_writel(tmp, S3C2410_CLKCON); - udelay(10); -} - -#else -#define s3c2410_pm_debug_init() do { } while(0) - -static struct sleep_save uart_save[] = {}; -#endif - -/* s3c2410_pm_show_resume_irqs - * - * print any IRQs asserted at resume time (ie, we woke from) -*/ - -static void s3c2410_pm_show_resume_irqs(int start, unsigned long which, - unsigned long mask) -{ - int i; - - which &= ~mask; - - for (i = 0; i <= 31; i++) { - if ((which) & (1L< Date: Fri, 12 Dec 2008 00:24:10 +0000 Subject: [ARM] S3C24XX: Split PM code from arch/arm/plat-s3c24xx/irq.c Split the PM code out of arch/arm/plat-s3c24xx/irq.c to remove some of the #ifdefs being used. Also fix a couple of places where the absecnce of a function was redefined to the same thing. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/Makefile | 1 + arch/arm/plat-s3c24xx/include/plat/irq.h | 8 +++ arch/arm/plat-s3c24xx/irq-pm.c | 116 ++++++++++++++++++++++++++++++ arch/arm/plat-s3c24xx/irq.c | 118 ------------------------------- 4 files changed, 125 insertions(+), 118 deletions(-) create mode 100644 arch/arm/plat-s3c24xx/irq-pm.c (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 1e0767b..636cb127 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile @@ -27,6 +27,7 @@ obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_PM) += irq-pm.o obj-$(CONFIG_PM) += sleep.o obj-$(CONFIG_HAVE_PWM) += pwm.o obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h index 45746a9..97b6884 100644 --- a/arch/arm/plat-s3c24xx/include/plat/irq.h +++ b/arch/arm/plat-s3c24xx/include/plat/irq.h @@ -10,6 +10,12 @@ * published by the Free Software Foundation. */ +#include + +#include +#include +#include + #define irqdbf(x...) #define irqdbf2(x...) @@ -102,7 +108,9 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) #ifdef CONFIG_PM extern int s3c_irq_wake(unsigned int irqno, unsigned int state); +extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); #else +#define s3c_irqext_wake NULL #define s3c_irq_wake NULL #endif diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c new file mode 100644 index 0000000..86c6880 --- /dev/null +++ b/arch/arm/plat-s3c24xx/irq-pm.c @@ -0,0 +1,116 @@ +/* linux/arch/arm/plat-s3c24xx/irq-om.c + * + * Copyright (c) 2003,2004 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C24XX - IRQ PM code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include +#include + +/* state for IRQs over sleep */ + +/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources + * + * set bit to 1 in allow bitfield to enable the wakeup settings on it +*/ + +unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; +unsigned long s3c_irqwake_intmask = 0xffffffffL; +unsigned long s3c_irqwake_eintallow = 0x0000fff0L; +unsigned long s3c_irqwake_eintmask = 0xffffffffL; + +int +s3c_irq_wake(unsigned int irqno, unsigned int state) +{ + unsigned long irqbit = 1 << (irqno - IRQ_EINT0); + + if (!(s3c_irqwake_intallow & irqbit)) + return -ENOENT; + + printk(KERN_INFO "wake %s for irq %d\n", + state ? "enabled" : "disabled", irqno); + + if (!state) + s3c_irqwake_intmask |= irqbit; + else + s3c_irqwake_intmask &= ~irqbit; + + return 0; +} + +int s3c_irqext_wake(unsigned int irqno, unsigned int state) +{ + unsigned long bit = 1L << (irqno - EXTINT_OFF); + + if (!(s3c_irqwake_eintallow & bit)) + return -ENOENT; + + printk(KERN_INFO "wake %s for irq %d\n", + state ? "enabled" : "disabled", irqno); + + if (!state) + s3c_irqwake_eintmask |= bit; + else + s3c_irqwake_eintmask &= ~bit; + + return 0; +} + +static struct sleep_save irq_save[] = { + SAVE_ITEM(S3C2410_INTMSK), + SAVE_ITEM(S3C2410_INTSUBMSK), +}; + +/* the extint values move between the s3c2410/s3c2440 and the s3c2412 + * so we use an array to hold them, and to calculate the address of + * the register at run-time +*/ + +static unsigned long save_extint[3]; +static unsigned long save_eintflt[4]; +static unsigned long save_eintmask; + +int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(save_extint); i++) + save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); + + for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) + save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); + + s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); + save_eintmask = __raw_readl(S3C24XX_EINTMASK); + + return 0; +} + +int s3c24xx_irq_resume(struct sys_device *dev) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(save_extint); i++) + __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); + + for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) + __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); + + s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); + __raw_writel(save_eintmask, S3C24XX_EINTMASK); + + return 0; +} diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 2fa8c9f..33fde66 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -55,81 +55,16 @@ #include #include #include -#include -#include #include - #include #include -#include -#include #include #include #include -/* wakeup irq control */ - -#ifdef CONFIG_PM - -/* state for IRQs over sleep */ - -/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources - * - * set bit to 1 in allow bitfield to enable the wakeup settings on it -*/ - -unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; -unsigned long s3c_irqwake_intmask = 0xffffffffL; -unsigned long s3c_irqwake_eintallow = 0x0000fff0L; -unsigned long s3c_irqwake_eintmask = 0xffffffffL; - -int -s3c_irq_wake(unsigned int irqno, unsigned int state) -{ - unsigned long irqbit = 1 << (irqno - IRQ_EINT0); - - if (!(s3c_irqwake_intallow & irqbit)) - return -ENOENT; - - printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", irqno); - - if (!state) - s3c_irqwake_intmask |= irqbit; - else - s3c_irqwake_intmask &= ~irqbit; - - return 0; -} - -static int -s3c_irqext_wake(unsigned int irqno, unsigned int state) -{ - unsigned long bit = 1L << (irqno - EXTINT_OFF); - - if (!(s3c_irqwake_eintallow & bit)) - return -ENOENT; - - printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", irqno); - - if (!state) - s3c_irqwake_eintmask |= bit; - else - s3c_irqwake_eintmask &= ~bit; - - return 0; -} - -#else -#define s3c_irqext_wake NULL -#define s3c_irq_wake NULL -#endif - - static void s3c_irq_mask(unsigned int irqno) { @@ -590,59 +525,6 @@ s3c_irq_demux_extint4t7(unsigned int irq, } } -#ifdef CONFIG_PM - -static struct sleep_save irq_save[] = { - SAVE_ITEM(S3C2410_INTMSK), - SAVE_ITEM(S3C2410_INTSUBMSK), -}; - -/* the extint values move between the s3c2410/s3c2440 and the s3c2412 - * so we use an array to hold them, and to calculate the address of - * the register at run-time -*/ - -static unsigned long save_extint[3]; -static unsigned long save_eintflt[4]; -static unsigned long save_eintmask; - -int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(save_extint); i++) - save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); - - for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) - save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); - - s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); - save_eintmask = __raw_readl(S3C24XX_EINTMASK); - - return 0; -} - -int s3c24xx_irq_resume(struct sys_device *dev) -{ - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(save_extint); i++) - __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); - - for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) - __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); - - s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); - __raw_writel(save_eintmask, S3C24XX_EINTMASK); - - return 0; -} - -#else -#define s3c24xx_irq_suspend NULL -#define s3c24xx_irq_resume NULL -#endif - /* s3c24xx_init_irq * * Initialise S3C2410 IRQ system -- cgit v1.1 From 7299a40918e15d5f9b4bc7fcb02163c335d92e43 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:11 +0000 Subject: [ARM] S3C24XX: Remove changelog from arch/arm/plat-s3c24xx/irq.c Remove the changelog, this file is in version control. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/irq.c | 34 +--------------------------------- 1 file changed, 1 insertion(+), 33 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 33fde66..9587377 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c @@ -1,6 +1,6 @@ /* linux/arch/arm/plat-s3c24xx/irq.c * - * Copyright (c) 2003,2004 Simtec Electronics + * Copyright (c) 2003,2004 Simtec Electronics * Ben Dooks * * This program is free software; you can redistribute it and/or modify @@ -16,38 +16,6 @@ * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Changelog: - * - * 22-Jul-2004 Ben Dooks - * Fixed compile warnings - * - * 22-Jul-2004 Roc Wu - * Fixed s3c_extirq_type - * - * 21-Jul-2004 Arnaud Patard (Rtp) - * Addition of ADC/TC demux - * - * 04-Oct-2004 Klaus Fetscher - * Fix for set_irq_type() on low EINT numbers - * - * 05-Oct-2004 Ben Dooks - * Tidy up KF's patch and sort out new release - * - * 05-Oct-2004 Ben Dooks - * Add support for power management controls - * - * 04-Nov-2004 Ben Dooks - * Fix standard IRQ wake for EINT0..4 and RTC - * - * 22-Feb-2005 Ben Dooks - * Fixed edge-triggering on ADC IRQ - * - * 28-Jun-2005 Ben Dooks - * Mark IRQ_LCD valid - * - * 25-Jul-2005 Ben Dooks - * Split the S3C2440 IRQ code to separate file */ #include -- cgit v1.1 From 56b34426888d35b3b6367c216bbfb17b82b4f0ac Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:12 +0000 Subject: [ARM] S3C: Make IRQ_EINT sleep control common Move the IRQ_EINT sleep control to be available to all s3c impelmentations. Since s3c_irqext_wake is not large, place it in arch/arm/plat-s3c/pm.c as adding it to a new file would be a waste of compile time. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/irq.h | 2 -- arch/arm/plat-s3c24xx/irq-pm.c | 23 +---------------------- 2 files changed, 1 insertion(+), 24 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/irq.h b/arch/arm/plat-s3c24xx/include/plat/irq.h index 97b6884..69e1be8 100644 --- a/arch/arm/plat-s3c24xx/include/plat/irq.h +++ b/arch/arm/plat-s3c24xx/include/plat/irq.h @@ -108,9 +108,7 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) #ifdef CONFIG_PM extern int s3c_irq_wake(unsigned int irqno, unsigned int state); -extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); #else -#define s3c_irqext_wake NULL #define s3c_irq_wake NULL #endif diff --git a/arch/arm/plat-s3c24xx/irq-pm.c b/arch/arm/plat-s3c24xx/irq-pm.c index 86c6880..b7acf1a 100644 --- a/arch/arm/plat-s3c24xx/irq-pm.c +++ b/arch/arm/plat-s3c24xx/irq-pm.c @@ -28,12 +28,9 @@ */ unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; -unsigned long s3c_irqwake_intmask = 0xffffffffL; unsigned long s3c_irqwake_eintallow = 0x0000fff0L; -unsigned long s3c_irqwake_eintmask = 0xffffffffL; -int -s3c_irq_wake(unsigned int irqno, unsigned int state) +int s3c_irq_wake(unsigned int irqno, unsigned int state) { unsigned long irqbit = 1 << (irqno - IRQ_EINT0); @@ -51,24 +48,6 @@ s3c_irq_wake(unsigned int irqno, unsigned int state) return 0; } -int s3c_irqext_wake(unsigned int irqno, unsigned int state) -{ - unsigned long bit = 1L << (irqno - EXTINT_OFF); - - if (!(s3c_irqwake_eintallow & bit)) - return -ENOENT; - - printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", irqno); - - if (!state) - s3c_irqwake_eintmask |= bit; - else - s3c_irqwake_eintmask &= ~bit; - - return 0; -} - static struct sleep_save irq_save[] = { SAVE_ITEM(S3C2410_INTMSK), SAVE_ITEM(S3C2410_INTSUBMSK), -- cgit v1.1 From 4e59c25dcbc1f033d043f1009a7f6aaa1f2aef26 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:18 +0000 Subject: [ARM] S3C: Rename s3c2410_pm_init to s3c_pm_init. Since we have moved a large proportion of the PM code to the common support area, remove the cpu specific name from the initialisation function. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/common-smdk.c | 2 +- arch/arm/plat-s3c24xx/pm-simtec.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index 3d48370..1a8347c 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -201,5 +201,5 @@ void __init smdk_machine_init(void) platform_add_devices(smdk_devs, ARRAY_SIZE(smdk_devs)); - s3c2410_pm_init(); + s3c_pm_init(); } diff --git a/arch/arm/plat-s3c24xx/pm-simtec.c b/arch/arm/plat-s3c24xx/pm-simtec.c index 21dfa74..da0d321 100644 --- a/arch/arm/plat-s3c24xx/pm-simtec.c +++ b/arch/arm/plat-s3c24xx/pm-simtec.c @@ -61,7 +61,7 @@ static __init int pm_simtec_init(void) __raw_writel(gstatus4, S3C2410_GSTATUS4); - return s3c2410_pm_init(); + return s3c_pm_init(); } arch_initcall(pm_simtec_init); -- cgit v1.1 From ef30e14420df546bc6576b00f9caf3379b6699d1 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:19 +0000 Subject: [ARM] S3C: Rename sleep.S functions to be non-cpu specific Rename s3c2410_cpu_resume to s3c_cpu_resume and s3c2410_cpu_save to s3c_cpu_save to remove the CPU specific naming of these functions which are now in the generic PM code. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/sleep.S | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index 7c1955f..ecb830b 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -41,7 +41,7 @@ .text - /* s3c2410_cpu_save + /* s3c_cpu_save * * save enough of the CPU state to allow us to re-start * pm.c code. as we store items like the sp/lr, we will @@ -59,7 +59,7 @@ * 1 => resumed from sleep */ -ENTRY(s3c2410_cpu_save) +ENTRY(s3c_cpu_save) stmfd sp!, { r4 - r12, lr } @@ store co-processor registers @@ -99,12 +99,12 @@ s3c_sleep_save_phys: /* sleep magic, to allow the bootloader to check for an valid * image to resume to. Must be the first word before the - * s3c2410_cpu_resume entry. + * s3c_cpu_resume entry. */ .word 0x2bedf00d - /* s3c2410_cpu_resume + /* s3c_cpu_resume * * resume code entry for bootloader to call * @@ -113,7 +113,7 @@ s3c_sleep_save_phys: * must not write to the code segment (code is read-only) */ -ENTRY(s3c2410_cpu_resume) +ENTRY(s3c_cpu_resume) mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE msr cpsr_c, r0 -- cgit v1.1 From d2b07fe2a3e35d8e58cceb63ab58831d706da939 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:20 +0000 Subject: [ARM] S3C: Update UART save over PM suspend/resume Change the way the UART state is saved over suspend to allow the s3c64xx code to modify the settings on resume to avoid any illegal state changes to the UART clocks. This will also allow us to save the UDIVSLOT register on newer SoCs. Move to using a structure for the UART use the extant Kconfig configuration specifying the number of UARTs. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/map.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h index fef8ea8..eed8f78 100644 --- a/arch/arm/plat-s3c24xx/include/plat/map.h +++ b/arch/arm/plat-s3c24xx/include/plat/map.h @@ -31,6 +31,8 @@ #define S3C24XX_SZ_UART SZ_1M #define S3C_UART_OFFSET (0x4000) +#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET))) + /* Timers */ #define S3C24XX_VA_TIMER S3C_VA_TIMER #define S3C2410_PA_TIMER (0x51000000) -- cgit v1.1 From fff94cd9f5527bbba13aa5ea5719d16531ca8e65 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 10 Mar 2009 11:48:07 +0000 Subject: [ARM] S3C: Tidy sleep code path to fix call flow As noted by Russell King, the sleep code path is not elegant and makes use of leaving items on the stack between calls. Change the code that does the following: if (s3c_cpu_save(regs_save) == 0) { flush_cache_all(); S3C_PMDBG("preparing to sleep\n"); pm_cpu_sleep(); } to simply call s3c_cpu_save, and let that do the necessary calls to quiesce and sleep the system. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/sleep.S | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S index ecb830b..e73e3b6e 100644 --- a/arch/arm/plat-s3c24xx/sleep.S +++ b/arch/arm/plat-s3c24xx/sleep.S @@ -43,20 +43,8 @@ /* s3c_cpu_save * - * save enough of the CPU state to allow us to re-start - * pm.c code. as we store items like the sp/lr, we will - * end up returning from this function when the cpu resumes - * so the return value is set to mark this. - * - * This arangement means we avoid having to flush the cache - * from this code. - * * entry: - * r0 = pointer to save block - * - * exit: - * r0 = 0 => we stored everything - * 1 => resumed from sleep + * r0 = save address (virtual addr of s3c_sleep_save_phys) */ ENTRY(s3c_cpu_save) @@ -71,14 +59,19 @@ ENTRY(s3c_cpu_save) stmia r0, { r4 - r13 } - mov r0, #0 - ldmfd sp, { r4 - r12, pc } + @@ write our state back to RAM + bl s3c_pm_cb_flushcache + @@ jump to final code to send system to sleep + ldr r0, =pm_cpu_sleep + @@ldr pc, [ r0 ] + ldr r0, [ r0 ] + mov pc, r0 + @@ return to the caller, after having the MMU @@ turned on, this restores the last bits from the @@ stack resume_with_mmu: - mov r0, #1 ldmfd sp!, { r4 - r12, pc } .ltorg -- cgit v1.1