From 8d007488731981e921346a46997dfe9f08cb8201 Mon Sep 17 00:00:00 2001 From: Simon Guinot Date: Sun, 24 Mar 2013 15:45:30 +0100 Subject: ARM: Orion: add dbg_show function to gpio-orion driver This patch adds a dedicated dbg_show function to the gpio-mvebu driver. In addition to the generic gpiolib informations, this function displays informations related with the specific Marvell registers (blink enable, data in polarity, interrupt masks and cause). Signed-off-by: Simon Guinot Signed-off-by: Jason Cooper --- arch/arm/plat-orion/gpio.c | 59 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c index c29ee7e..e39c2ba 100644 --- a/arch/arm/plat-orion/gpio.c +++ b/arch/arm/plat-orion/gpio.c @@ -439,6 +439,64 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) } } +#ifdef CONFIG_DEBUG_FS +#include + +static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) +{ + struct orion_gpio_chip *ochip = + container_of(chip, struct orion_gpio_chip, chip); + u32 out, io_conf, blink, in_pol, data_in, cause, edg_msk, lvl_msk; + int i; + + out = readl_relaxed(GPIO_OUT(ochip)); + io_conf = readl_relaxed(GPIO_IO_CONF(ochip)); + blink = readl_relaxed(GPIO_BLINK_EN(ochip)); + in_pol = readl_relaxed(GPIO_IN_POL(ochip)); + data_in = readl_relaxed(GPIO_DATA_IN(ochip)); + cause = readl_relaxed(GPIO_EDGE_CAUSE(ochip)); + edg_msk = readl_relaxed(GPIO_EDGE_MASK(ochip)); + lvl_msk = readl_relaxed(GPIO_LEVEL_MASK(ochip)); + + for (i = 0; i < chip->ngpio; i++) { + const char *label; + u32 msk; + bool is_out; + + label = gpiochip_is_requested(chip, i); + if (!label) + continue; + + msk = 1 << i; + is_out = !(io_conf & msk); + + seq_printf(s, " gpio-%-3d (%-20.20s)", chip->base + i, label); + + if (is_out) { + seq_printf(s, " out %s %s\n", + out & msk ? "hi" : "lo", + blink & msk ? "(blink )" : ""); + continue; + } + + seq_printf(s, " in %s (act %s) - IRQ", + (data_in ^ in_pol) & msk ? "hi" : "lo", + in_pol & msk ? "lo" : "hi"); + if (!((edg_msk | lvl_msk) & msk)) { + seq_printf(s, " disabled\n"); + continue; + } + if (edg_msk & msk) + seq_printf(s, " edge "); + if (lvl_msk & msk) + seq_printf(s, " level"); + seq_printf(s, " (%s)\n", cause & msk ? "pending" : "clear "); + } +} +#else +#define orion_gpio_dbg_show NULL +#endif + void __init orion_gpio_init(struct device_node *np, int gpio_base, int ngpio, void __iomem *base, int mask_offset, @@ -471,6 +529,7 @@ void __init orion_gpio_init(struct device_node *np, #ifdef CONFIG_OF ochip->chip.of_node = np; #endif + ochip->chip.dbg_show = orion_gpio_dbg_show; spin_lock_init(&ochip->lock); ochip->base = (void __iomem *)base; -- cgit v1.1 From 87e1bed4067e33a4636bffc03689ffb045d586d6 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 21 Mar 2013 17:59:15 +0100 Subject: arm: mach-mvebu: convert to use mvebu-mbus driver The changes needed to migrate the mach-mvebu (Armada 370 and Armada XP) to the mvebu-mbus driver are fairly minimal, since not many devices currently supported on those SoCs use address decoding windows. The only one being the BootROM window, used to bring up secondary CPUs. However, this BootROM window needed for SMP brings an important requirement: the mvebu-mbus driver must be initialized at the ->early_init() time, otherwise the BootROM window cannot be setup early enough to be ready before the secondary CPUs are started. Signed-off-by: Thomas Petazzoni Acked-by: Arnd Bergmann Signed-off-by: Jason Cooper --- arch/arm/plat-orion/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index ad97400..6cfc89f 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -3,7 +3,6 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_MVEBU) += addr-map.o obj-$(CONFIG_ARCH_KIRKWOOD) += addr-map.o obj-$(CONFIG_ARCH_DOVE) += addr-map.o obj-$(CONFIG_ARCH_ORION5X) += addr-map.o -- cgit v1.1 From 5cc0673a6723db1585d82f056937205ddeb84eb4 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 21 Mar 2013 17:59:16 +0100 Subject: arm: mach-kirkwood: convert to use mvebu-mbus driver This commit migrates the mach-kirkwood platforms to use the mvebu-mbus driver and therefore removes the Kirkwood-specific addr-map code. The kirkwood_init_early() function is now responsible for initializing the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the kirkwood_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Kirkwood has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni Signed-off-by: Andrew Lunn Acked-by: Arnd Bergmann Signed-off-by: Jason Cooper --- arch/arm/plat-orion/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index 6cfc89f..58db16d 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -3,7 +3,6 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_KIRKWOOD) += addr-map.o obj-$(CONFIG_ARCH_DOVE) += addr-map.o obj-$(CONFIG_ARCH_ORION5X) += addr-map.o obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o -- cgit v1.1 From 7d55490277cf9e725f73e0055344b3e3a846926b Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 21 Mar 2013 17:59:17 +0100 Subject: arm: mach-dove: convert to use mvebu-mbus driver This commit migrates the mach-dove platforms to use the mvebu-mbus driver and therefore removes the Dove-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the dove_setup_cpu_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni Acked-by: Arnd Bergmann Signed-off-by: Jason Cooper --- arch/arm/plat-orion/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index 58db16d..9fd843e 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -3,7 +3,6 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_DOVE) += addr-map.o obj-$(CONFIG_ARCH_ORION5X) += addr-map.o obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o -- cgit v1.1 From 5d1190ea69cd158835518d4132b3d98774073092 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 21 Mar 2013 17:59:18 +0100 Subject: arm: mach-orion5x: convert to use mvebu-mbus driver This commit migrates the mach-orion5x platforms to use the mvebu-mbus driver and therefore removes the Orion5x-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). We also convert a number of orion5x_setup_xyz_win() calls to the appropriate mvebu_mbus_add_window() calls, as each board was doing its own setup for the NOR window or other devices. Ultimately, those devices will be probed from the DT. The common address decoding windows are now registered in the orion5x_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni Acked-by: Arnd Bergmann Signed-off-by: Jason Cooper --- arch/arm/plat-orion/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index 9fd843e..09711cd 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -3,7 +3,6 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_ORION5X) += addr-map.o obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o -- cgit v1.1 From 95b80e0a9ab3c1c8b41af5f2863801708f8f7288 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 21 Mar 2013 17:59:19 +0100 Subject: arm: mach-mv78xx0: convert to use the mvebu-mbus driver This commit convers the mach-mv78xx0 sub-architecture to use the mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the ->init_early() function, and modify the PCIe code so that it uses the new functions provided by mvebu-mbus to create the needed PCIe windows. Signed-off-by: Thomas Petazzoni Acked-by: Arnd Bergmann Signed-off-by: Jason Cooper --- arch/arm/plat-orion/Makefile | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index 09711cd..2eca54b 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -3,8 +3,6 @@ # ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o - orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o obj-$(CONFIG_PLAT_ORION_LEGACY) += $(orion-gpio-y) -- cgit v1.1 From 7ad2a78342a6465827226ac00fca6a384cd23f82 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Thu, 21 Mar 2013 17:59:20 +0100 Subject: arm: plat-orion: remove addr-map code Now that all Marvell EBU platforms have been converted to use the mvebu-mbus driver, we can remove the common plat-orion/addr-map.c code that isn't compiled anymore. Signed-off-by: Thomas Petazzoni Acked-by: Arnd Bergmann Signed-off-by: Jason Cooper --- arch/arm/plat-orion/addr-map.c | 178 ----------------------------------------- 1 file changed, 178 deletions(-) delete mode 100644 arch/arm/plat-orion/addr-map.c (limited to 'arch/arm/plat-orion') diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c deleted file mode 100644 index 807ac8e..0000000 --- a/arch/arm/plat-orion/addr-map.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * arch/arm/plat-orion/addr-map.c - * - * Address map functions for Marvell Orion based SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include - -struct mbus_dram_target_info orion_mbus_dram_info; - -const struct mbus_dram_target_info *mv_mbus_dram_info(void) -{ - return &orion_mbus_dram_info; -} -EXPORT_SYMBOL_GPL(mv_mbus_dram_info); - -/* - * DDR target is the same on all Orion platforms. - */ -#define TARGET_DDR 0 - -/* - * Helpers to get DDR bank info - */ -#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) -#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) - -/* - * CPU Address Decode Windows registers - */ -#define WIN_CTRL_OFF 0x0000 -#define WIN_BASE_OFF 0x0004 -#define WIN_REMAP_LO_OFF 0x0008 -#define WIN_REMAP_HI_OFF 0x000c - -#define ATTR_HW_COHERENCY (0x1 << 4) - -/* - * Default implementation - */ -static void __init __iomem * -orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win) -{ - return cfg->bridge_virt_base + (win << 4); -} - -/* - * Default implementation - */ -static int __init orion_cpu_win_can_remap(const struct orion_addr_map_cfg *cfg, - const int win) -{ - if (win < cfg->remappable_wins) - return 1; - - return 0; -} - -void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg, - const int win, const u32 base, - const u32 size, const u8 target, - const u8 attr, const int remap) -{ - void __iomem *addr = cfg->win_cfg_base(cfg, win); - u32 ctrl, base_high, remap_addr; - - if (win >= cfg->num_wins) { - printk(KERN_ERR "setup_cpu_win: trying to allocate window " - "%d when only %d allowed\n", win, cfg->num_wins); - } - - base_high = base & 0xffff0000; - ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1; - - writel(base_high, addr + WIN_BASE_OFF); - writel(ctrl, addr + WIN_CTRL_OFF); - if (cfg->cpu_win_can_remap(cfg, win)) { - if (remap < 0) - remap_addr = base; - else - remap_addr = remap; - writel(remap_addr & 0xffff0000, addr + WIN_REMAP_LO_OFF); - writel(0, addr + WIN_REMAP_HI_OFF); - } -} - -/* - * Configure a number of windows. - */ -static void __init orion_setup_cpu_wins(const struct orion_addr_map_cfg * cfg, - const struct orion_addr_map_info *info) -{ - while (info->win != -1) { - orion_setup_cpu_win(cfg, info->win, info->base, info->size, - info->target, info->attr, info->remap); - info++; - } -} - -static void __init orion_disable_wins(const struct orion_addr_map_cfg * cfg) -{ - void __iomem *addr; - int i; - - for (i = 0; i < cfg->num_wins; i++) { - addr = cfg->win_cfg_base(cfg, i); - - writel(0, addr + WIN_BASE_OFF); - writel(0, addr + WIN_CTRL_OFF); - if (cfg->cpu_win_can_remap(cfg, i)) { - writel(0, addr + WIN_REMAP_LO_OFF); - writel(0, addr + WIN_REMAP_HI_OFF); - } - } -} - -/* - * Disable, clear and configure windows. - */ -void __init orion_config_wins(struct orion_addr_map_cfg * cfg, - const struct orion_addr_map_info *info) -{ - if (!cfg->cpu_win_can_remap) - cfg->cpu_win_can_remap = orion_cpu_win_can_remap; - - if (!cfg->win_cfg_base) - cfg->win_cfg_base = orion_win_cfg_base; - - orion_disable_wins(cfg); - - if (info) - orion_setup_cpu_wins(cfg, info); -} - -/* - * Setup MBUS dram target info. - */ -void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, - const void __iomem *ddr_window_cpu_base) -{ - int i; - int cs; - - orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; - - for (i = 0, cs = 0; i < 4; i++) { - u32 base = readl(ddr_window_cpu_base + DDR_BASE_CS_OFF(i)); - u32 size = readl(ddr_window_cpu_base + DDR_SIZE_CS_OFF(i)); - - /* - * We only take care of entries for which the chip - * select is enabled, and that don't have high base - * address bits set (devices can only access the first - * 32 bits of the memory). - */ - if ((size & 1) && !(base & 0xF)) { - struct mbus_dram_window *w; - - w = &orion_mbus_dram_info.cs[cs++]; - w->cs_index = i; - w->mbus_attr = 0xf & ~(1 << i); - if (cfg->hw_io_coherency) - w->mbus_attr |= ATTR_HW_COHERENCY; - w->base = base & 0xffff0000; - w->size = (size | 0x0000ffff) + 1; - } - } - orion_mbus_dram_info.num_cs = cs; -} -- cgit v1.1