From b4e395b2cb5ce871f23a176fed74316a7de64a97 Mon Sep 17 00:00:00 2001 From: Prashant Gaikwad Date: Tue, 5 Jun 2012 09:44:40 +0530 Subject: ARM: tegra: Remove flow controller programming This particular code had no effect on WFI execution. It only asserts/de-asserts signal to tegra "legacy" CPU idle stats monitor, which we are no longer using (cpufreq is based on kernel s/w idle stats instead). Signed-off-by: Prashant Gaikwad Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/cpuidle.c | 6 +++--- arch/arm/mach-tegra/sleep.S | 29 ----------------------------- 2 files changed, 3 insertions(+), 32 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index d83a8c0..566e2f8 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -27,9 +27,9 @@ #include #include -#include +#include -extern void tegra_cpu_wfi(void); +#include static int tegra_idle_enter_lp3(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index); @@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev, enter = ktime_get(); - tegra_cpu_wfi(); + cpu_do_idle(); exit = ktime_sub(ktime_get(), enter); us = ktime_to_us(exit); diff --git a/arch/arm/mach-tegra/sleep.S b/arch/arm/mach-tegra/sleep.S index 5b20197..d29b156 100644 --- a/arch/arm/mach-tegra/sleep.S +++ b/arch/arm/mach-tegra/sleep.S @@ -62,32 +62,3 @@ movw \reg, #:lower16:\val movt \reg, #:upper16:\val .endm - -/* - * tegra_cpu_wfi - * - * puts current CPU in clock-gated wfi using the flow controller - * - * corrupts r0-r3 - * must be called with MMU on - */ - -ENTRY(tegra_cpu_wfi) - cpu_id r0 - cpu_to_halt_reg r1, r0 - cpu_to_csr_reg r2, r0 - mov32 r0, TEGRA_FLOW_CTRL_VIRT - mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG - str r3, [r0, r2] @ clear event & interrupt status - mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME - str r3, [r0, r1] @ put flow controller in wait irq mode - dsb - wfi - mov r3, #0 - str r3, [r0, r1] @ clear flow controller halt status - mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG - str r3, [r0, r2] @ clear event & interrupt status - dsb - mov pc, lr -ENDPROC(tegra_cpu_wfi) - -- cgit v1.1 From 0336553e4a8c1fefc11aa5656cebf2ce80657322 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 21 May 2012 14:51:19 -0600 Subject: ASoC: tegra: simplify Kconfig dependencies The Tegra ASoC machine drivers only depend on Tegra architecture support to compile, not specific board support. Remove Kconfig dependencies on any particular board. This is required since Kconfig options for boards are going away given the migration to device tree. Signed-off-by: Stephen Warren Acked-by: Mark Brown --- arch/arm/mach-tegra/Kconfig | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 6a113a9..7c40739 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -63,7 +63,6 @@ comment "Tegra board type" config MACH_HARMONY bool "Harmony board" depends on ARCH_TEGRA_2x_SOC - select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for nVidia Harmony development platform @@ -71,7 +70,6 @@ config MACH_KAEN bool "Kaen board" depends on ARCH_TEGRA_2x_SOC select MACH_SEABOARD - select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for the Kaen version of Seaboard @@ -84,7 +82,6 @@ config MACH_PAZ00 config MACH_SEABOARD bool "Seaboard board" depends on ARCH_TEGRA_2x_SOC - select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for nVidia Seaboard development platform. It will also be included for some of the derivative boards that -- cgit v1.1 From 6a5278d0715c5dfd42151bb6d7444db3f2ceed52 Mon Sep 17 00:00:00 2001 From: Prashant Gaikwad Date: Tue, 5 Jun 2012 09:59:35 +0530 Subject: ARM: tegra: add clk_prepare/clk_unprepare Use clk_prepare/clk_unprepare as required by the generic clk framework. Tested on Ventana and Cardhu. Signed-off-by: Prashant Gaikwad Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/cpu-tegra.c | 6 +++--- arch/arm/mach-tegra/dma.c | 2 +- arch/arm/mach-tegra/pcie.c | 6 +++--- arch/arm/mach-tegra/powergate.c | 4 ++-- arch/arm/mach-tegra/timer.c | 4 ++-- arch/arm/mach-tegra/usb_phy.c | 16 ++++++++-------- 6 files changed, 19 insertions(+), 19 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/cpu-tegra.c b/arch/arm/mach-tegra/cpu-tegra.c index 7a065f0..ceb52db 100644 --- a/arch/arm/mach-tegra/cpu-tegra.c +++ b/arch/arm/mach-tegra/cpu-tegra.c @@ -189,8 +189,8 @@ static int tegra_cpu_init(struct cpufreq_policy *policy) return PTR_ERR(emc_clk); } - clk_enable(emc_clk); - clk_enable(cpu_clk); + clk_prepare_enable(emc_clk); + clk_prepare_enable(cpu_clk); cpufreq_frequency_table_cpuinfo(policy, freq_table); cpufreq_frequency_table_get_attr(freq_table, policy->cpu); @@ -212,7 +212,7 @@ static int tegra_cpu_init(struct cpufreq_policy *policy) static int tegra_cpu_exit(struct cpufreq_policy *policy) { cpufreq_frequency_table_cpuinfo(policy, freq_table); - clk_disable(emc_clk); + clk_disable_unprepare(emc_clk); clk_put(emc_clk); clk_put(cpu_clk); return 0; diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index abea4f6..2698d7d 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -720,7 +720,7 @@ int __init tegra_dma_init(void) ret = PTR_ERR(c); goto fail; } - ret = clk_enable(c); + ret = clk_prepare_enable(c); if (ret != 0) { pr_err("Unable to enable clock for APB DMA\n"); goto fail; diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 0e09137..d3ad515 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -723,9 +723,9 @@ static int tegra_pcie_power_regate(void) tegra_pcie_xclk_clamp(false); - clk_enable(tegra_pcie.afi_clk); - clk_enable(tegra_pcie.pex_clk); - return clk_enable(tegra_pcie.pll_e); + clk_prepare_enable(tegra_pcie.afi_clk); + clk_prepare_enable(tegra_pcie.pex_clk); + return clk_prepare_enable(tegra_pcie.pll_e); } static int tegra_pcie_clocks_get(void) diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index f5b12fb..15d5065 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -146,7 +146,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk) if (ret) goto err_power; - ret = clk_enable(clk); + ret = clk_prepare_enable(clk); if (ret) goto err_clk; @@ -162,7 +162,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk) return 0; err_clamp: - clk_disable(clk); + clk_disable_unprepare(clk); err_clk: tegra_powergate_power_off(id); err_power: diff --git a/arch/arm/mach-tegra/timer.c b/arch/arm/mach-tegra/timer.c index 315672c..57b5bdc 100644 --- a/arch/arm/mach-tegra/timer.c +++ b/arch/arm/mach-tegra/timer.c @@ -189,7 +189,7 @@ static void __init tegra_init_timer(void) " Assuming 12Mhz input clock.\n"); rate = 12000000; } else { - clk_enable(clk); + clk_prepare_enable(clk); rate = clk_get_rate(clk); } @@ -201,7 +201,7 @@ static void __init tegra_init_timer(void) if (IS_ERR(clk)) pr_warn("Unable to get rtc-tegra clock\n"); else - clk_enable(clk); + clk_prepare_enable(clk); switch (rate) { case 12000000: diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 54e353c..022b33a 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -247,7 +247,7 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy) unsigned long val, flags; void __iomem *base = phy->pad_regs; - clk_enable(phy->pad_clk); + clk_prepare_enable(phy->pad_clk); spin_lock_irqsave(&utmip_pad_lock, flags); @@ -259,7 +259,7 @@ static void utmip_pad_power_on(struct tegra_usb_phy *phy) spin_unlock_irqrestore(&utmip_pad_lock, flags); - clk_disable(phy->pad_clk); + clk_disable_unprepare(phy->pad_clk); } static int utmip_pad_power_off(struct tegra_usb_phy *phy) @@ -272,7 +272,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy) return -EINVAL; } - clk_enable(phy->pad_clk); + clk_prepare_enable(phy->pad_clk); spin_lock_irqsave(&utmip_pad_lock, flags); @@ -284,7 +284,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy) spin_unlock_irqrestore(&utmip_pad_lock, flags); - clk_disable(phy->pad_clk); + clk_disable_unprepare(phy->pad_clk); return 0; } @@ -580,7 +580,7 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy) msleep(5); gpio_direction_output(config->reset_gpio, 1); - clk_enable(phy->clk); + clk_prepare_enable(phy->clk); msleep(1); val = readl(base + USB_SUSP_CTRL); @@ -689,7 +689,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance, err = PTR_ERR(phy->pll_u); goto err0; } - clk_enable(phy->pll_u); + clk_prepare_enable(phy->pll_u); parent_rate = clk_get_rate(clk_get_parent(phy->pll_u)); for (i = 0; i < ARRAY_SIZE(tegra_freq_table); i++) { @@ -735,7 +735,7 @@ struct tegra_usb_phy *tegra_usb_phy_open(struct device *dev, int instance, return phy; err1: - clk_disable(phy->pll_u); + clk_disable_unprepare(phy->pll_u); clk_put(phy->pll_u); err0: kfree(phy); @@ -810,7 +810,7 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy) clk_put(phy->clk); else utmip_pad_close(phy); - clk_disable(phy->pll_u); + clk_disable_unprepare(phy->pll_u); clk_put(phy->pll_u); kfree(phy); } -- cgit v1.1 From 702b0e4f2f2782962aab7d9a0a40ad68770bb1f6 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 11 Jun 2012 16:25:07 -0600 Subject: ARM: dt: tegra: rename board files to match SoC Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This change modifies the Tegra board files to be named the same way for consistency. Once a related change is made in U-Boot, this will cause both U-Boot and the kernel to use the same names for the .dts files and SoC identifiers, thus allowing U-Boot's recently added "soc" and "board" environment variables to be used to construct the name of Tegra .dtb files, and hence allow board-generic U-Boot bootcmd scripts to be written. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Makefile.boot | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 9a82094..8040345 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot @@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 -dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb -dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb -dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb -dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb -dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb -dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb +dtb-$(CONFIG_MACH_HARMONY) += tegra20-harmony.dtb +dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb +dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb +dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb +dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb +dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb -- cgit v1.1 From 95ef9958849381931a79ecec53e677e52c406c5a Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Wed, 13 Jun 2012 15:55:47 +0200 Subject: ARM: tegra: build powergate unconditionally powergate functions are needed for tegra30 as well (see common.c), so build it always. Fixes: arch/arm/mach-tegra/built-in.o: In function `tegra30_init_early': apbio.c:(.init.text+0x78): undefined reference to `tegra_powergate_init' (using "allnoconfig" with tegra30 enabled) Signed-off-by: Wolfram Sang Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 2eb4445..35253fd 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -8,9 +8,9 @@ obj-y += timer.o obj-y += fuse.o obj-y += pmc.o obj-y += flowctrl.o +obj-y += powergate.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_CPU_IDLE) += sleep.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o -- cgit v1.1 From 9132b0ed57320996b16eafbf651a04e02ad29092 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 21 May 2012 14:44:26 -0600 Subject: ARM: tegra: make .dts compilation depend on Tegra2 support Update Makefile.boot to compile *.dts when the appropriate Tegra SoC support is enabled, rather than requiring Kconfig to list each board individually. Remove CONFIG_MACH_VENTANA now that it has no use. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Kconfig | 7 ------- arch/arm/mach-tegra/Makefile.boot | 10 +++++----- 2 files changed, 5 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 7c40739..5b9b116 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -108,13 +108,6 @@ config MACH_WARIO help Support for the Wario version of Seaboard -config MACH_VENTANA - bool "Ventana board" - depends on ARCH_TEGRA_2x_SOC - select MACH_TEGRA_DT - help - Support for the nVidia Ventana development platform - choice prompt "Default low-level debug console UART" default TEGRA_DEBUG_UART_NONE diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 8040345..a369f96 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot @@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 -dtb-$(CONFIG_MACH_HARMONY) += tegra20-harmony.dtb -dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb -dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb -dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb -dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb -- cgit v1.1 From 2c95b7e06f63b264500fbcd5b4718c1a7258aa76 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 21 May 2012 15:07:19 -0600 Subject: ARM: tegra: remove CONFIG_MACH_TEGRA_DT * Make ARCH_TEGRA select USE_OF; DT is the way forward. * Build board-dt-tegra*.c when the relevant Tegra SoC support is enabled, rather than requiring a specific config option for this. * The board-specific config options already build board-*-pinmux.o, and when booting from device tree these files are no longer needed, so we can remove some Makefile commands related to those files. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Kconfig | 7 ------- arch/arm/mach-tegra/Makefile | 10 +++------- 2 files changed, 3 insertions(+), 14 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 5b9b116..621466a 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -87,13 +87,6 @@ config MACH_SEABOARD also be included for some of the derivative boards that have large similarities with the seaboard design. -config MACH_TEGRA_DT - bool "Generic Tegra20 board (FDT support)" - depends on ARCH_TEGRA_2x_SOC - select USE_OF - help - Support for generic NVIDIA Tegra20 boards using Flattened Device Tree - config MACH_TRIMSLICE bool "TrimSlice board" depends on ARCH_TEGRA_2x_SOC diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 2eb4445..60a0213 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_IDLE) += sleep.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_SMP) += reset.o @@ -23,6 +22,9 @@ obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-$(CONFIG_TEGRA_PCI) += pcie.o obj-$(CONFIG_USB_SUPPORT) += usb_phy.o +obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-dt-tegra20.o +obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o + obj-$(CONFIG_MACH_HARMONY) += board-harmony.o obj-$(CONFIG_MACH_HARMONY) += board-harmony-pinmux.o obj-$(CONFIG_MACH_HARMONY) += board-harmony-pcie.o @@ -34,11 +36,5 @@ obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o -obj-$(CONFIG_MACH_TEGRA_DT) += board-dt-tegra20.o -obj-$(CONFIG_MACH_TEGRA_DT) += board-harmony-pinmux.o -obj-$(CONFIG_MACH_TEGRA_DT) += board-seaboard-pinmux.o -obj-$(CONFIG_MACH_TEGRA_DT) += board-paz00-pinmux.o -obj-$(CONFIG_MACH_TEGRA_DT) += board-trimslice-pinmux.o - obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o -- cgit v1.1 From 98a1405e20ecf261abbc091eabb229d8adfbf62c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 21 May 2012 14:40:14 -0600 Subject: ARM: tegra: remove Seaboard board files The Seaboard device tree supports all the features that the Seaboard board files support. Hence, there's no need to keep the board files around any more; all users should convert to device tree. MACH_KAEN and MACH_WARIO are also removed. While tegra-seaboard.dts doesn't support those explicitly, it would be trivial to create device trees for those boards if anyone cares. The Seaboard device tree is now compiled if Tegra2 support is enabled, rather than when Seaboard support is enabled. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Kconfig | 22 -- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/board-seaboard-pinmux.c | 197 ------------------ arch/arm/mach-tegra/board-seaboard.c | 306 ---------------------------- arch/arm/mach-tegra/board-seaboard.h | 47 ----- 5 files changed, 575 deletions(-) delete mode 100644 arch/arm/mach-tegra/board-seaboard-pinmux.c delete mode 100644 arch/arm/mach-tegra/board-seaboard.c delete mode 100644 arch/arm/mach-tegra/board-seaboard.h (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 621466a..9077aaa 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -66,27 +66,12 @@ config MACH_HARMONY help Support for nVidia Harmony development platform -config MACH_KAEN - bool "Kaen board" - depends on ARCH_TEGRA_2x_SOC - select MACH_SEABOARD - help - Support for the Kaen version of Seaboard - config MACH_PAZ00 bool "Paz00 board" depends on ARCH_TEGRA_2x_SOC help Support for the Toshiba AC100/Dynabook AZ netbook -config MACH_SEABOARD - bool "Seaboard board" - depends on ARCH_TEGRA_2x_SOC - help - Support for nVidia Seaboard development platform. It will - also be included for some of the derivative boards that - have large similarities with the seaboard design. - config MACH_TRIMSLICE bool "TrimSlice board" depends on ARCH_TEGRA_2x_SOC @@ -94,13 +79,6 @@ config MACH_TRIMSLICE help Support for CompuLab TrimSlice platform -config MACH_WARIO - bool "Wario board" - depends on ARCH_TEGRA_2x_SOC - select MACH_SEABOARD - help - Support for the Wario version of Seaboard - choice prompt "Default low-level debug console UART" default TEGRA_DEBUG_UART_NONE diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 60a0213..1f6f237 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -33,8 +33,5 @@ obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o obj-$(CONFIG_MACH_PAZ00) += board-paz00.o obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o -obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o -obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o - obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c deleted file mode 100644 index 11fc8a5..0000000 --- a/arch/arm/mach-tegra/board-seaboard-pinmux.c +++ /dev/null @@ -1,197 +0,0 @@ -/* - * Copyright (C) 2010-2012 NVIDIA Corporation - * Copyright (C) 2011 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include - -#include "board-seaboard.h" -#include "board-pinmux.h" - -static unsigned long seaboard_pincfg_drive_sdio1[] = { - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, 0), - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SCHMITT, 0), - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_LOW_POWER_MODE, 3), - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, 31), - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, 31), - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, 3), - TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, 3), -}; - -static struct pinctrl_map common_map[] = { - TEGRA_MAP_MUXCONF("ata", "ide", none, driven), - TEGRA_MAP_MUXCONF("atb", "sdio4", none, driven), - TEGRA_MAP_MUXCONF("atc", "nand", none, driven), - TEGRA_MAP_MUXCONF("atd", "gmi", none, driven), - TEGRA_MAP_MUXCONF("ate", "gmi", none, tristate), - TEGRA_MAP_MUXCONF("cdev1", "plla_out", none, driven), - TEGRA_MAP_MUXCONF("cdev2", "pllp_out4", none, driven), - TEGRA_MAP_MUXCONF("crtp", "crt", up, tristate), - TEGRA_MAP_MUXCONF("csus", "vi_sensor_clk", none, tristate), - TEGRA_MAP_MUXCONF("dap1", "dap1", none, driven), - TEGRA_MAP_MUXCONF("dap2", "dap2", none, driven), - TEGRA_MAP_MUXCONF("dap3", "dap3", none, tristate), - TEGRA_MAP_MUXCONF("dap4", "dap4", none, driven), - TEGRA_MAP_MUXCONF("dta", "vi", down, driven), - TEGRA_MAP_MUXCONF("dtb", "vi", down, driven), - TEGRA_MAP_MUXCONF("dtc", "vi", down, driven), - TEGRA_MAP_MUXCONF("dtd", "vi", down, driven), - TEGRA_MAP_MUXCONF("dte", "vi", down, tristate), - TEGRA_MAP_MUXCONF("dtf", "i2c3", none, driven), - TEGRA_MAP_MUXCONF("gma", "sdio4", none, driven), - TEGRA_MAP_MUXCONF("gmb", "gmi", up, tristate), - TEGRA_MAP_MUXCONF("gmc", "uartd", none, driven), - TEGRA_MAP_MUXCONF("gme", "sdio4", none, driven), - TEGRA_MAP_MUXCONF("gpu", "pwm", none, driven), - TEGRA_MAP_MUXCONF("gpu7", "rtck", none, driven), - TEGRA_MAP_MUXCONF("gpv", "pcie", none, tristate), - TEGRA_MAP_MUXCONF("hdint", "hdmi", na, tristate), - TEGRA_MAP_MUXCONF("i2cp", "i2cp", none, driven), - TEGRA_MAP_MUXCONF("irrx", "uartb", none, driven), - TEGRA_MAP_MUXCONF("irtx", "uartb", none, driven), - TEGRA_MAP_MUXCONF("kbca", "kbc", up, driven), - TEGRA_MAP_MUXCONF("kbcb", "kbc", up, driven), - TEGRA_MAP_MUXCONF("kbcc", "kbc", up, driven), - TEGRA_MAP_MUXCONF("kbcd", "kbc", up, driven), - TEGRA_MAP_MUXCONF("kbce", "kbc", up, driven), - TEGRA_MAP_MUXCONF("kbcf", "kbc", up, driven), - TEGRA_MAP_MUXCONF("lcsn", "rsvd4", na, tristate), - TEGRA_MAP_MUXCONF("ld0", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld1", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld10", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld11", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld12", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld13", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld14", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld15", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld16", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld17", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld2", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld3", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld4", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld5", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld6", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld7", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld8", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ld9", "displaya", na, driven), - TEGRA_MAP_MUXCONF("ldc", "rsvd4", na, tristate), - TEGRA_MAP_MUXCONF("ldi", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lhp0", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lhp1", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lhp2", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lhs", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lm0", "rsvd4", na, driven), - TEGRA_MAP_MUXCONF("lm1", "crt", na, tristate), - TEGRA_MAP_MUXCONF("lpp", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lpw1", "rsvd4", na, tristate), - TEGRA_MAP_MUXCONF("lsc0", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lsdi", "rsvd4", na, tristate), - TEGRA_MAP_MUXCONF("lspi", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lvp0", "rsvd4", na, tristate), - TEGRA_MAP_MUXCONF("lvp1", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lvs", "displaya", na, driven), - TEGRA_MAP_MUXCONF("owc", "rsvd2", none, tristate), - TEGRA_MAP_MUXCONF("pmc", "pwr_on", na, driven), - TEGRA_MAP_MUXCONF("pta", "hdmi", none, driven), - TEGRA_MAP_MUXCONF("rm", "i2c1", none, driven), - TEGRA_MAP_MUXCONF("sdb", "sdio3", na, driven), - TEGRA_MAP_MUXCONF("sdc", "sdio3", none, driven), - TEGRA_MAP_MUXCONF("sdd", "sdio3", none, driven), - TEGRA_MAP_MUXCONF("sdio1", "sdio1", up, driven), - TEGRA_MAP_MUXCONF("slxa", "pcie", up, tristate), - TEGRA_MAP_MUXCONF("slxd", "spdif", none, driven), - TEGRA_MAP_MUXCONF("slxk", "pcie", none, driven), - TEGRA_MAP_MUXCONF("spdi", "rsvd2", none, driven), - TEGRA_MAP_MUXCONF("spdo", "rsvd2", none, driven), - TEGRA_MAP_MUXCONF("spib", "gmi", none, tristate), - TEGRA_MAP_MUXCONF("spid", "spi1", none, tristate), - TEGRA_MAP_MUXCONF("spie", "spi1", none, tristate), - TEGRA_MAP_MUXCONF("spif", "spi1", down, tristate), - TEGRA_MAP_MUXCONF("spih", "spi2_alt", up, tristate), - TEGRA_MAP_MUXCONF("uaa", "ulpi", up, driven), - TEGRA_MAP_MUXCONF("uab", "ulpi", up, driven), - TEGRA_MAP_MUXCONF("uac", "rsvd2", none, driven), - TEGRA_MAP_MUXCONF("uad", "irda", none, driven), - TEGRA_MAP_MUXCONF("uca", "uartc", none, driven), - TEGRA_MAP_MUXCONF("ucb", "uartc", none, driven), - TEGRA_MAP_MUXCONF("uda", "ulpi", none, driven), - TEGRA_MAP_CONF("ck32", none, na), - TEGRA_MAP_CONF("ddrc", none, na), - TEGRA_MAP_CONF("pmca", none, na), - TEGRA_MAP_CONF("pmcb", none, na), - TEGRA_MAP_CONF("pmcc", none, na), - TEGRA_MAP_CONF("pmcd", none, na), - TEGRA_MAP_CONF("pmce", none, na), - TEGRA_MAP_CONF("xm2c", none, na), - TEGRA_MAP_CONF("xm2d", none, na), - TEGRA_MAP_CONF("ls", up, na), - TEGRA_MAP_CONF("lc", up, na), - TEGRA_MAP_CONF("ld17_0", down, na), - TEGRA_MAP_CONF("ld19_18", down, na), - TEGRA_MAP_CONF("ld21_20", down, na), - TEGRA_MAP_CONF("ld23_22", down, na), -}; - -static struct pinctrl_map seaboard_map[] = { - TEGRA_MAP_MUXCONF("ddc", "rsvd2", none, tristate), - TEGRA_MAP_MUXCONF("gmd", "sflash", none, driven), - TEGRA_MAP_MUXCONF("lpw0", "hdmi", na, driven), - TEGRA_MAP_MUXCONF("lpw2", "hdmi", na, driven), - TEGRA_MAP_MUXCONF("lsc1", "hdmi", na, tristate), - TEGRA_MAP_MUXCONF("lsck", "hdmi", na, tristate), - TEGRA_MAP_MUXCONF("lsda", "hdmi", na, tristate), - TEGRA_MAP_MUXCONF("slxc", "spdif", none, tristate), - TEGRA_MAP_MUXCONF("spia", "gmi", up, tristate), - TEGRA_MAP_MUXCONF("spic", "gmi", up, driven), - TEGRA_MAP_MUXCONF("spig", "spi2_alt", up, tristate), - PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(PINMUX_DEV, "drive_sdio1", seaboard_pincfg_drive_sdio1), -}; - -static struct pinctrl_map ventana_map[] = { - TEGRA_MAP_MUXCONF("ddc", "rsvd2", none, driven), - TEGRA_MAP_MUXCONF("gmd", "sflash", none, tristate), - TEGRA_MAP_MUXCONF("lpw0", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lpw2", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lsc1", "displaya", na, driven), - TEGRA_MAP_MUXCONF("lsck", "displaya", na, tristate), - TEGRA_MAP_MUXCONF("lsda", "displaya", na, tristate), - TEGRA_MAP_MUXCONF("slxc", "sdio3", none, driven), - TEGRA_MAP_MUXCONF("spia", "gmi", none, tristate), - TEGRA_MAP_MUXCONF("spic", "gmi", none, tristate), - TEGRA_MAP_MUXCONF("spig", "spi2_alt", none, tristate), -}; - -static struct tegra_board_pinmux_conf common_conf = { - .maps = common_map, - .map_count = ARRAY_SIZE(common_map), -}; - -static struct tegra_board_pinmux_conf seaboard_conf = { - .maps = seaboard_map, - .map_count = ARRAY_SIZE(seaboard_map), -}; - -static struct tegra_board_pinmux_conf ventana_conf = { - .maps = ventana_map, - .map_count = ARRAY_SIZE(ventana_map), -}; - -void seaboard_pinmux_init(void) -{ - tegra_board_pinmux_init(&common_conf, &seaboard_conf); -} - -void ventana_pinmux_init(void) -{ - tegra_board_pinmux_init(&common_conf, &ventana_conf); -} diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c deleted file mode 100644 index 71e9f3f..0000000 --- a/arch/arm/mach-tegra/board-seaboard.c +++ /dev/null @@ -1,306 +0,0 @@ -/* - * Copyright (c) 2010, 2011 NVIDIA Corporation. - * Copyright (C) 2010, 2011 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include "board.h" -#include "board-seaboard.h" -#include "clock.h" -#include "devices.h" -#include "gpio-names.h" - -static struct plat_serial8250_port debug_uart_platform_data[] = { - { - /* Memory and IRQ filled in before registration */ - .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE, - .type = PORT_TEGRA, - .handle_break = tegra_serial_handle_break, - .iotype = UPIO_MEM, - .regshift = 2, - .uartclk = 216000000, - }, { - .flags = 0, - } -}; - -static struct platform_device debug_uart = { - .name = "serial8250", - .id = PLAT8250_DEV_PLATFORM, - .dev = { - .platform_data = debug_uart_platform_data, - }, -}; - -static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = { - /* name parent rate enabled */ - { "uartb", "pll_p", 216000000, true}, - { "uartd", "pll_p", 216000000, true}, - { "pll_a", "pll_p_out1", 56448000, true }, - { "pll_a_out0", "pll_a", 11289600, true }, - { "cdev1", NULL, 0, true }, - { "i2s1", "pll_a_out0", 11289600, false}, - { "usbd", "clk_m", 12000000, true}, - { "usb3", "clk_m", 12000000, true}, - { NULL, NULL, 0, 0}, -}; - -static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { - { - .code = SW_LID, - .gpio = TEGRA_GPIO_LIDSWITCH, - .active_low = 0, - .desc = "Lid", - .type = EV_SW, - .wakeup = 1, - .debounce_interval = 1, - }, - { - .code = KEY_POWER, - .gpio = TEGRA_GPIO_POWERKEY, - .active_low = 1, - .desc = "Power", - .type = EV_KEY, - .wakeup = 1, - }, -}; - -static struct gpio_keys_platform_data seaboard_gpio_keys = { - .buttons = seaboard_gpio_keys_buttons, - .nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons), -}; - -static struct platform_device seaboard_gpio_keys_device = { - .name = "gpio-keys", - .id = -1, - .dev = { - .platform_data = &seaboard_gpio_keys, - } -}; - -static struct tegra_sdhci_platform_data sdhci_pdata1 = { - .cd_gpio = -1, - .wp_gpio = -1, - .power_gpio = -1, -}; - -static struct tegra_sdhci_platform_data sdhci_pdata3 = { - .cd_gpio = TEGRA_GPIO_SD2_CD, - .wp_gpio = TEGRA_GPIO_SD2_WP, - .power_gpio = TEGRA_GPIO_SD2_POWER, -}; - -static struct tegra_sdhci_platform_data sdhci_pdata4 = { - .cd_gpio = -1, - .wp_gpio = -1, - .power_gpio = -1, - .is_8bit = 1, -}; - -static struct tegra_wm8903_platform_data seaboard_audio_pdata = { - .gpio_spkr_en = TEGRA_GPIO_SPKR_EN, - .gpio_hp_det = TEGRA_GPIO_HP_DET, - .gpio_hp_mute = -1, - .gpio_int_mic_en = -1, - .gpio_ext_mic_en = -1, -}; - -static struct platform_device seaboard_audio_device = { - .name = "tegra-snd-wm8903", - .id = 0, - .dev = { - .platform_data = &seaboard_audio_pdata, - }, -}; - -static struct platform_device *seaboard_devices[] __initdata = { - &debug_uart, - &tegra_pmu_device, - &tegra_sdhci_device4, - &tegra_sdhci_device3, - &tegra_sdhci_device1, - &seaboard_gpio_keys_device, - &tegra_i2s_device1, - &tegra_das_device, - &seaboard_audio_device, -}; - -static struct i2c_board_info __initdata isl29018_device = { - I2C_BOARD_INFO("isl29018", 0x44), -}; - -static struct i2c_board_info __initdata adt7461_device = { - I2C_BOARD_INFO("adt7461", 0x4c), -}; - -static struct wm8903_platform_data wm8903_pdata = { - .irq_active_low = 0, - .micdet_cfg = 0, - .micdet_delay = 100, - .gpio_base = SEABOARD_GPIO_WM8903(0), - .gpio_cfg = { - 0, - 0, - WM8903_GPIO_CONFIG_ZERO, - 0, - 0, - }, -}; - -static struct i2c_board_info __initdata wm8903_device = { - I2C_BOARD_INFO("wm8903", 0x1a), - .platform_data = &wm8903_pdata, -}; - -static int seaboard_ehci_init(void) -{ - struct tegra_ehci_platform_data *pdata; - - pdata = tegra_ehci1_device.dev.platform_data; - pdata->vbus_gpio = TEGRA_GPIO_USB1; - - platform_device_register(&tegra_ehci1_device); - platform_device_register(&tegra_ehci3_device); - - return 0; -} - -static void __init seaboard_i2c_init(void) -{ - isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ); - i2c_register_board_info(0, &isl29018_device, 1); - - wm8903_device.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ); - i2c_register_board_info(0, &wm8903_device, 1); - - i2c_register_board_info(3, &adt7461_device, 1); - - platform_device_register(&tegra_i2c_device1); - platform_device_register(&tegra_i2c_device2); - platform_device_register(&tegra_i2c_device3); - platform_device_register(&tegra_i2c_device4); -} - -static void __init seaboard_common_init(void) -{ - seaboard_pinmux_init(); - - tegra_clk_init_from_table(seaboard_clk_init_table); - - tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; - tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3; - tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; - - platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices)); - - seaboard_ehci_init(); -} - -static void __init tegra_seaboard_init(void) -{ - /* Seaboard uses UARTD for the debug port. */ - debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE); - debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE; - debug_uart_platform_data[0].irq = INT_UARTD; - - seaboard_common_init(); - - seaboard_i2c_init(); -} - -static void __init tegra_kaen_init(void) -{ - /* Kaen uses UARTB for the debug port. */ - debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE); - debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; - debug_uart_platform_data[0].irq = INT_UARTB; - - seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE; - - seaboard_common_init(); - - seaboard_i2c_init(); -} - -static void __init tegra_wario_init(void) -{ - /* Wario uses UARTB for the debug port. */ - debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE); - debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE; - debug_uart_platform_data[0].irq = INT_UARTB; - - seaboard_common_init(); - - seaboard_i2c_init(); -} - - -MACHINE_START(SEABOARD, "seaboard") - .atag_offset = 0x100, - .map_io = tegra_map_common_io, - .init_early = tegra20_init_early, - .init_irq = tegra_init_irq, - .handle_irq = gic_handle_irq, - .timer = &tegra_timer, - .init_machine = tegra_seaboard_init, - .init_late = tegra_init_late, - .restart = tegra_assert_system_reset, -MACHINE_END - -MACHINE_START(KAEN, "kaen") - .atag_offset = 0x100, - .map_io = tegra_map_common_io, - .init_early = tegra20_init_early, - .init_irq = tegra_init_irq, - .handle_irq = gic_handle_irq, - .timer = &tegra_timer, - .init_machine = tegra_kaen_init, - .init_late = tegra_init_late, - .restart = tegra_assert_system_reset, -MACHINE_END - -MACHINE_START(WARIO, "wario") - .atag_offset = 0x100, - .map_io = tegra_map_common_io, - .init_early = tegra20_init_early, - .init_irq = tegra_init_irq, - .handle_irq = gic_handle_irq, - .timer = &tegra_timer, - .init_machine = tegra_wario_init, - .init_late = tegra_init_late, - .restart = tegra_assert_system_reset, -MACHINE_END diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h deleted file mode 100644 index 4c45d4c..0000000 --- a/arch/arm/mach-tegra/board-seaboard.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * arch/arm/mach-tegra/board-seaboard.h - * - * Copyright (C) 2010 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef _MACH_TEGRA_BOARD_SEABOARD_H -#define _MACH_TEGRA_BOARD_SEABOARD_H - -#include - -#define SEABOARD_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_)) -#define SEABOARD_GPIO_WM8903(_x_) (SEABOARD_GPIO_TPS6586X(4) + (_x_)) - -#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5 -#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1 -#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6 -#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7 -#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0 -#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2 -#define TEGRA_GPIO_BACKLIGHT TEGRA_GPIO_PD4 -#define TEGRA_GPIO_LVDS_SHUTDOWN TEGRA_GPIO_PB2 -#define TEGRA_GPIO_BACKLIGHT_PWM TEGRA_GPIO_PU5 -#define TEGRA_GPIO_BACKLIGHT_VDD TEGRA_GPIO_PW0 -#define TEGRA_GPIO_EN_VDD_PNL TEGRA_GPIO_PC6 -#define TEGRA_GPIO_MAGNETOMETER TEGRA_GPIO_PN5 -#define TEGRA_GPIO_ISL29018_IRQ TEGRA_GPIO_PZ2 -#define TEGRA_GPIO_AC_ONLINE TEGRA_GPIO_PV3 -#define TEGRA_GPIO_WWAN_PWR SEABOARD_GPIO_TPS6586X(2) -#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3 -#define TEGRA_GPIO_SPKR_EN SEABOARD_GPIO_WM8903(2) -#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PX1 -#define TEGRA_GPIO_KAEN_HP_MUTE TEGRA_GPIO_PA5 - -void seaboard_pinmux_init(void); - -#endif -- cgit v1.1 From c554dee35c3e6b0c19db5fb75193d4cd99736c6b Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 2 May 2012 13:43:26 -0600 Subject: ARM: tegra: trimslice: enable PCIe when booting from device tree There currently aren't bindings for the Tegra PCIe controller. Work on this is in progress, but not yet complete. Manually initialize PCIe when booting from device tree, in order to bring DT support to the same feature level as board files, which will in turn allow board files to be deprecated. PCIe hosts the wired Ethernet controller on TrimSlice. To support this, add infra-structure to board-dt-tegra20.c for board- specific initialization code. Once device tree support for the relevant features is in place, this code will be removed. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt-tegra20.c | 36 +++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index eb7249d..9537f20 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -98,6 +98,40 @@ static void __init tegra_dt_init(void) tegra20_auxdata_lookup, NULL); } +#ifdef CONFIG_MACH_TRIMSLICE +static void __init trimslice_init(void) +{ + int ret; + + ret = tegra_pcie_init(true, true); + if (ret) + pr_err("tegra_pci_init() failed: %d\n", ret); +} +#endif + +static struct { + char *machine; + void (*init)(void); +} board_init_funcs[] = { +#ifdef CONFIG_MACH_TRIMSLICE + { "compulab,trimslice", trimslice_init }, +#endif +}; + +static void __init tegra_dt_init_late(void) +{ + int i; + + tegra_init_late(); + + for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) { + if (of_machine_is_compatible(board_init_funcs[i].machine)) { + board_init_funcs[i].init(); + break; + } + } +} + static const char *tegra20_dt_board_compat[] = { "nvidia,tegra20", NULL @@ -110,7 +144,7 @@ DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") .handle_irq = gic_handle_irq, .timer = &tegra_timer, .init_machine = tegra_dt_init, - .init_late = tegra_init_late, + .init_late = tegra_dt_init_late, .restart = tegra_assert_system_reset, .dt_compat = tegra20_dt_board_compat, MACHINE_END -- cgit v1.1 From a12c0efc7a3f433377add0fa1fd0ed4836cc595e Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 2 May 2012 15:47:12 -0600 Subject: ARM: tegra: harmony: init regulators, PCIe when booting from DT There currently aren't bindings for the Tegra PCIe controller. Work on this is in progress, but not yet complete. Manually initialize PCIe when booting from device tree, in order to bring DT support to the same feature level as board files, which will in turn allow board files to be deprecated. PCIe on Harmony requires various regulators to be registered and enabled before initializing the PCIe controller. Note that since the I2C controllers are instantiated from DT, we must use i2c_new_device() to register the PMU rather than i2c_register_board_info(). Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt-tegra20.c | 20 ++++++++++++++++++++ arch/arm/mach-tegra/board-harmony-pcie.c | 15 ++++++++++----- arch/arm/mach-tegra/board-harmony-power.c | 25 ++++++++++++++++++++++++- arch/arm/mach-tegra/board.h | 7 +++++++ 4 files changed, 61 insertions(+), 6 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 9537f20..7771386 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -109,6 +109,23 @@ static void __init trimslice_init(void) } #endif +#ifdef CONFIG_MACH_HARMONY +static void __init harmony_init(void) +{ + int ret; + + ret = harmony_regulator_init(); + if (ret) { + pr_err("harmony_regulator_init() failed: %d\n", ret); + return; + } + + ret = harmony_pcie_init(); + if (ret) + pr_err("harmony_pcie_init() failed: %d\n", ret); +} +#endif + static struct { char *machine; void (*init)(void); @@ -116,6 +133,9 @@ static struct { #ifdef CONFIG_MACH_TRIMSLICE { "compulab,trimslice", trimslice_init }, #endif +#ifdef CONFIG_MACH_HARMONY + { "nvidia,harmony", harmony_init }, +#endif }; static void __init tegra_dt_init_late(void) diff --git a/arch/arm/mach-tegra/board-harmony-pcie.c b/arch/arm/mach-tegra/board-harmony-pcie.c index 33c4fed..e8c3fda 100644 --- a/arch/arm/mach-tegra/board-harmony-pcie.c +++ b/arch/arm/mach-tegra/board-harmony-pcie.c @@ -27,14 +27,11 @@ #ifdef CONFIG_TEGRA_PCI -static int __init harmony_pcie_init(void) +int __init harmony_pcie_init(void) { struct regulator *regulator = NULL; int err; - if (!machine_is_harmony()) - return 0; - err = gpio_request(TEGRA_GPIO_EN_VDD_1V05_GPIO, "EN_VDD_1V05"); if (err) return err; @@ -62,7 +59,15 @@ err_reg: return err; } +static int __init harmony_pcie_initcall(void) +{ + if (!machine_is_harmony()) + return 0; + + return harmony_pcie_init(); +} + /* PCI should be initialized after I2C, mfd and regulators */ -subsys_initcall_sync(harmony_pcie_init); +subsys_initcall_sync(harmony_pcie_initcall); #endif diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c index 82f32300..44dcb2e 100644 --- a/arch/arm/mach-tegra/board-harmony-power.c +++ b/arch/arm/mach-tegra/board-harmony-power.c @@ -20,6 +20,10 @@ #include #include #include +#include +#include + +#include #include @@ -110,7 +114,26 @@ static struct i2c_board_info __initdata harmony_regulators[] = { int __init harmony_regulator_init(void) { - i2c_register_board_info(3, harmony_regulators, 1); + if (machine_is_harmony()) { + i2c_register_board_info(3, harmony_regulators, 1); + } else { /* Harmony, booted using device tree */ + struct device_node *np; + struct i2c_adapter *adapter; + + np = of_find_node_by_path("/i2c@7000d000"); + if (np == NULL) { + pr_err("Could not find device_node for DVC I2C\n"); + return -ENODEV; + } + + adapter = of_find_i2c_adapter_by_node(np); + if (!adapter) { + pr_err("Could not find i2c_adapter for DVC I2C\n"); + return -ENODEV; + } + + i2c_new_device(adapter, harmony_regulators); + } return 0; } diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h index 6501496..097e0e1 100644 --- a/arch/arm/mach-tegra/board.h +++ b/arch/arm/mach-tegra/board.h @@ -46,5 +46,12 @@ int __init tegra_powergate_debugfs_init(void); static inline int tegra_powergate_debugfs_init(void) { return 0; } #endif +int __init harmony_regulator_init(void); +#ifdef CONFIG_TEGRA_PCI +int __init harmony_pcie_init(void); +#else +static inline int harmony_pcie_init(void) { return 0; } +#endif + extern struct sys_timer tegra_timer; #endif -- cgit v1.1 From b64a02c6fa184405ac2de0ea048be2f342144a08 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 2 May 2012 16:05:44 -0600 Subject: ARM: tegra: paz00: enable WiFi rfkill when booting from device tree There currently aren't bindings for a WiFi rfkill button, and defining a good binding is non-trivial. Manually register this "device" when booting from device tree, in order to bring DT support to the same feature level as board files, which will in turn allow board files to be deprecated. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt-tegra20.c | 10 ++++++++++ arch/arm/mach-tegra/board-paz00.c | 7 ++++++- arch/arm/mach-tegra/board.h | 2 ++ 3 files changed, 18 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 7771386..8b4e6e1 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -126,6 +126,13 @@ static void __init harmony_init(void) } #endif +#ifdef CONFIG_MACH_PAZ00 +static void __init paz00_init(void) +{ + tegra_paz00_wifikill_init(); +} +#endif + static struct { char *machine; void (*init)(void); @@ -136,6 +143,9 @@ static struct { #ifdef CONFIG_MACH_HARMONY { "nvidia,harmony", harmony_init }, #endif +#ifdef CONFIG_MACH_PAZ00 + { "compal,paz00", paz00_init }, +#endif }; static void __init tegra_dt_init_late(void) diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c index bbc1907..4b64af5 100644 --- a/arch/arm/mach-tegra/board-paz00.c +++ b/arch/arm/mach-tegra/board-paz00.c @@ -148,7 +148,6 @@ static struct platform_device *paz00_devices[] __initdata = { &debug_uart, &tegra_sdhci_device4, &tegra_sdhci_device1, - &wifi_rfkill_device, &leds_gpio, &gpio_keys_device, }; @@ -201,6 +200,11 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = { .is_8bit = 1, }; +void __init tegra_paz00_wifikill_init(void) +{ + platform_device_register(&wifi_rfkill_device); +} + static void __init tegra_paz00_init(void) { tegra_clk_init_from_table(paz00_clk_init_table); @@ -211,6 +215,7 @@ static void __init tegra_paz00_init(void) tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices)); + tegra_paz00_wifikill_init(); paz00_i2c_init(); paz00_usb_init(); diff --git a/arch/arm/mach-tegra/board.h b/arch/arm/mach-tegra/board.h index 097e0e1..f88e514 100644 --- a/arch/arm/mach-tegra/board.h +++ b/arch/arm/mach-tegra/board.h @@ -53,5 +53,7 @@ int __init harmony_pcie_init(void); static inline int harmony_pcie_init(void) { return 0; } #endif +void __init tegra_paz00_wifikill_init(void); + extern struct sys_timer tegra_timer; #endif -- cgit v1.1 From 0b5168f92d587c328a4ac060a9f3d1a029ddc3b4 Mon Sep 17 00:00:00 2001 From: Prashant Gaikwad Date: Mon, 25 Jun 2012 13:25:08 +0530 Subject: ARM: tegra: Remove second instance of uart clk In Tegra30 clock file two clk objects were created for same UART clock. Remove the duplicates and add clock aliases instead. Update the Tegra20 clock file to make the names consistent. Signed-off-by: Prashant Gaikwad Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra2_clocks.c | 20 ++++++++++---------- arch/arm/mach-tegra/tegra30_clocks.c | 20 ++++++++++---------- 2 files changed, 20 insertions(+), 20 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index b59315c..034d952 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2189,11 +2189,11 @@ static struct clk tegra_list_clks[] = { PERIPH_CLK("i2c2_i2c", "tegra-i2c.1", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), PERIPH_CLK("i2c3_i2c", "tegra-i2c.2", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), PERIPH_CLK("dvc_i2c", "tegra-i2c.3", "i2c", 0, 0, 72000000, mux_pllp_out3, 0), - PERIPH_CLK("uarta", "uart.0", NULL, 6, 0x178, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uartb", "uart.1", NULL, 7, 0x17c, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uartc", "uart.2", NULL, 55, 0x1a0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uartd", "uart.3", NULL, 65, 0x1c0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), - PERIPH_CLK("uarte", "uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uarta", "tegra-uart.0", NULL, 6, 0x178, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartb", "tegra-uart.1", NULL, 7, 0x17c, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartc", "tegra-uart.2", NULL, 55, 0x1a0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uartd", "tegra-uart.3", NULL, 65, 0x1c0, 600000000, mux_pllp_pllc_pllm_clkm, MUX), + PERIPH_CLK("uarte", "tegra-uart.4", NULL, 66, 0x1c4, 600000000, mux_pllp_pllc_pllm_clkm, MUX), PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | PERIPH_MANUAL_RESET), /* scales with voltage and process_id */ PERIPH_CLK("2d", "2d", NULL, 21, 0x15c, 300000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ PERIPH_CLK("vi", "tegra_camera", "vi", 20, 0x148, 150000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71), /* scales with voltage and process_id */ @@ -2245,11 +2245,11 @@ static struct clk tegra_list_clks[] = { * table under two names. */ static struct clk_duplicate tegra_clk_duplicates[] = { - CLK_DUPLICATE("uarta", "tegra_uart.0", NULL), - CLK_DUPLICATE("uartb", "tegra_uart.1", NULL), - CLK_DUPLICATE("uartc", "tegra_uart.2", NULL), - CLK_DUPLICATE("uartd", "tegra_uart.3", NULL), - CLK_DUPLICATE("uarte", "tegra_uart.4", NULL), + CLK_DUPLICATE("uarta", "serial8250.0", NULL), + CLK_DUPLICATE("uartb", "serial8250.1", NULL), + CLK_DUPLICATE("uartc", "serial8250.2", NULL), + CLK_DUPLICATE("uartd", "serial8250.3", NULL), + CLK_DUPLICATE("uarte", "serial8250.4", NULL), CLK_DUPLICATE("usbd", "utmip-pad", NULL), CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), CLK_DUPLICATE("usbd", "tegra-otg", NULL), diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index e33fe4b..e1a7489 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -2924,16 +2924,11 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), PERIPH_CLK("i2c4", "tegra-i2c.3", NULL, 103, 0x3c4, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), PERIPH_CLK("i2c5", "tegra-i2c.4", NULL, 47, 0x128, 26000000, mux_pllp_clkm, MUX | DIV_U16 | PERIPH_ON_APB), - PERIPH_CLK("uarta", "tegra_uart.0", NULL, 6, 0x178, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartb", "tegra_uart.1", NULL, 7, 0x17c, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartc", "tegra_uart.2", NULL, 55, 0x1a0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartd", "tegra_uart.3", NULL, 65, 0x1c0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uarte", "tegra_uart.4", NULL, 66, 0x1c4, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uarta_dbg", "serial8250.0", "uarta", 6, 0x178, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartb_dbg", "serial8250.0", "uartb", 7, 0x17c, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartc_dbg", "serial8250.0", "uartc", 55, 0x1a0, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uartd_dbg", "serial8250.0", "uartd", 65, 0x1c0, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), - PERIPH_CLK("uarte_dbg", "serial8250.0", "uarte", 66, 0x1c4, 800000000, mux_pllp_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uarta", "tegra-uart.0", NULL, 6, 0x178, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartb", "tegra-uart.1", NULL, 7, 0x17c, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartc", "tegra-uart.2", NULL, 55, 0x1a0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uartd", "tegra-uart.3", NULL, 65, 0x1c0, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), + PERIPH_CLK("uarte", "tegra-uart.4", NULL, 66, 0x1c4, 800000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71 | DIV_U71_UART | PERIPH_ON_APB), PERIPH_CLK_EX("vi", "tegra_camera", "vi", 20, 0x148, 425000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT, &tegra_vi_clk_ops), PERIPH_CLK("3d", "3d", NULL, 24, 0x158, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET), PERIPH_CLK("3d2", "3d2", NULL, 98, 0x3b0, 520000000, mux_pllm_pllc_pllp_plla, MUX | DIV_U71 | DIV_U71_INT | DIV_U71_IDLE | PERIPH_MANUAL_RESET), @@ -2983,6 +2978,11 @@ struct clk tegra_list_clks[] = { * table under two names. */ struct clk_duplicate tegra_clk_duplicates[] = { + CLK_DUPLICATE("uarta", "serial8250.0", NULL), + CLK_DUPLICATE("uartb", "serial8250.1", NULL), + CLK_DUPLICATE("uartc", "serial8250.2", NULL), + CLK_DUPLICATE("uartd", "serial8250.3", NULL), + CLK_DUPLICATE("uarte", "serial8250.4", NULL), CLK_DUPLICATE("usbd", "utmip-pad", NULL), CLK_DUPLICATE("usbd", "tegra-ehci.0", NULL), CLK_DUPLICATE("usbd", "tegra-otg", NULL), -- cgit v1.1 From 72d967eda2fd69a6cac01498585bc019ade4f8ff Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Tue, 26 Jun 2012 12:48:32 +0530 Subject: ARM: tegra: dma: rename driver name for clock to "tegra-apbdma" Rename the driver name of the clock entry of Tegra APBDMA to tegra-apbdma from of tegra-dma. This name is more aligned towards the movement of dmaengine based new DMA driver. Signed-off-by: Laxman Dewangan Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/dma.c | 2 +- arch/arm/mach-tegra/tegra2_clocks.c | 2 +- arch/arm/mach-tegra/tegra30_clocks.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index 2698d7d..29c5114 100644 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -714,7 +714,7 @@ int __init tegra_dma_init(void) bitmap_fill(channel_usage, NV_DMA_MAX_CHANNELS); - c = clk_get_sys("tegra-dma", NULL); + c = clk_get_sys("tegra-apbdma", NULL); if (IS_ERR(c)) { pr_err("Unable to get clock for APB DMA\n"); ret = PTR_ERR(c); diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 034d952..b79cb93 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2149,7 +2149,7 @@ static struct clk tegra_clk_emc = { } static struct clk tegra_list_clks[] = { - PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), + PERIPH_CLK("apbdma", "tegra-apbdma", NULL, 34, 0, 108000000, mux_pclk, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("i2s1", "tegra20-i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index e1a7489..2ba948e 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -2871,7 +2871,7 @@ static struct clk tegra30_clk_twd = { }, \ } struct clk tegra_list_clks[] = { - PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 26000000, mux_clk_m, 0), + PERIPH_CLK("apbdma", "tegra-apbdma", NULL, 34, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("kbc", "tegra-kbc", NULL, 36, 0, 32768, mux_clk_32k, PERIPH_NO_RESET | PERIPH_ON_APB), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), -- cgit v1.1 From bd976e0307fbb3c715df944ded6b70a9fa8d6bb1 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Tue, 26 Jun 2012 12:48:31 +0530 Subject: ARM: tegra: add device tree AUXDATA for APBDMA Add DT AUXDATA for Tegra's APBDMA controller driver. Signed-off-by: Laxman Dewangan Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt-tegra20.c | 1 + arch/arm/mach-tegra/board-dt-tegra30.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 8b4e6e1..1b43c33 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -64,6 +64,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { &tegra_ehci2_pdata), OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", &tegra_ehci3_pdata), + OF_DEV_AUXDATA("nvidia,tegra20-apbdma", 0x6000a000, "tegra-apbdma", NULL), {} }; diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 4f76fa7..4a40986 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -52,6 +52,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL), OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), {} }; -- cgit v1.1 From 2553dcc6e603e3833990bd3a29bee98d1dbdf251 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 28 Jun 2012 16:29:19 -0600 Subject: ARM: tegra: use of_default_bus_match_table of_default_bus_match_table is a table of default bus types supported by of_platform_populate(). Since Tegra has no need to support any specific custom list of bus types, modify the DT board files to use this default list. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/board-dt-tegra20.c | 7 +------ arch/arm/mach-tegra/board-dt-tegra30.c | 7 +------ 2 files changed, 2 insertions(+), 12 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index 1b43c33..d0de9c1 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -82,11 +82,6 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { { NULL, NULL, 0, 0}, }; -static struct of_device_id tegra_dt_match_table[] __initdata = { - { .compatible = "simple-bus", }, - {} -}; - static void __init tegra_dt_init(void) { tegra_clk_init_from_table(tegra_dt_clk_init_table); @@ -95,7 +90,7 @@ static void __init tegra_dt_init(void) * Finished with the static registrations now; fill in the missing * devices */ - of_platform_populate(NULL, tegra_dt_match_table, + of_platform_populate(NULL, of_default_bus_match_table, tegra20_auxdata_lookup, NULL); } diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 4a40986..ee48214 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -36,11 +36,6 @@ #include "board.h" #include "clock.h" -static struct of_device_id tegra_dt_match_table[] __initdata = { - { .compatible = "simple-bus", }, - {} -}; - struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL), @@ -75,7 +70,7 @@ static void __init tegra30_dt_init(void) { tegra_clk_init_from_table(tegra_dt_clk_init_table); - of_platform_populate(NULL, tegra_dt_match_table, + of_platform_populate(NULL, of_default_bus_match_table, tegra30_auxdata_lookup, NULL); } -- cgit v1.1 From 140fd977dc46bc750258f082cdf1cfea79dc1d14 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Wed, 21 Dec 2011 08:04:13 +0100 Subject: pwm: tegra: Add device tree support Add auxdata to instantiate the PWFM controller from a device tree, include the corresponding nodes in the dtsi files for Tegra 20 and Tegra 30 and add binding documentation. Acked-by: Stephen Warren Signed-off-by: Thierry Reding --- arch/arm/mach-tegra/board-dt-tegra20.c | 1 + arch/arm/mach-tegra/board-dt-tegra30.c | 3 +++ 2 files changed, 4 insertions(+) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c index eb7249d..962f1a1 100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@ -64,6 +64,7 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { &tegra_ehci2_pdata), OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", &tegra_ehci3_pdata), + OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), {} }; diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 4f76fa7..ffc6cae 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c @@ -33,6 +33,8 @@ #include #include +#include + #include "board.h" #include "clock.h" @@ -52,6 +54,7 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL), OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL), OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), + OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), {} }; -- cgit v1.1 From bb1dccfc63f7a007c6347c75ba597d866749d9d2 Mon Sep 17 00:00:00 2001 From: Simon Que Date: Fri, 16 Dec 2011 20:11:22 +0100 Subject: ARM: tegra: Fix PWM clock programming PWM clock source registers in Tegra 2 have different clock source selection bit fields than other registers. PWM clock source bits in CLK_SOURCE_PWM_0 register are located at bit field bit[30:28] while others are at bit field bit[31:30] in their respective clock source register. This patch updates the clock programming to correctly reflect that, by adding a flag to indicate the alternate bit field format and checking for it when selecting a clock source (parent clock). Signed-off-by: Bill Huang Signed-off-by: Simon Que Signed-off-by: Thierry Reding Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra2_clocks.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index b79cb93..2016ba0 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -69,6 +69,8 @@ #define PERIPH_CLK_SOURCE_MASK (3<<30) #define PERIPH_CLK_SOURCE_SHIFT 30 +#define PERIPH_CLK_SOURCE_PWM_MASK (7<<28) +#define PERIPH_CLK_SOURCE_PWM_SHIFT 28 #define PERIPH_CLK_SOURCE_ENABLE (1<<28) #define PERIPH_CLK_SOURCE_DIVU71_MASK 0xFF #define PERIPH_CLK_SOURCE_DIVU16_MASK 0xFFFF @@ -908,9 +910,20 @@ static void tegra2_periph_clk_init(struct clk *c) u32 val = clk_readl(c->reg); const struct clk_mux_sel *mux = NULL; const struct clk_mux_sel *sel; + u32 shift; + u32 mask; + + if (c->flags & MUX_PWM) { + shift = PERIPH_CLK_SOURCE_PWM_SHIFT; + mask = PERIPH_CLK_SOURCE_PWM_MASK; + } else { + shift = PERIPH_CLK_SOURCE_SHIFT; + mask = PERIPH_CLK_SOURCE_MASK; + } + if (c->flags & MUX) { for (sel = c->inputs; sel->input != NULL; sel++) { - if (val >> PERIPH_CLK_SOURCE_SHIFT == sel->value) + if ((val & mask) >> shift == sel->value) mux = sel; } BUG_ON(!mux); @@ -1023,12 +1036,23 @@ static int tegra2_periph_clk_set_parent(struct clk *c, struct clk *p) { u32 val; const struct clk_mux_sel *sel; + u32 mask, shift; + pr_debug("%s: %s %s\n", __func__, c->name, p->name); + + if (c->flags & MUX_PWM) { + shift = PERIPH_CLK_SOURCE_PWM_SHIFT; + mask = PERIPH_CLK_SOURCE_PWM_MASK; + } else { + shift = PERIPH_CLK_SOURCE_SHIFT; + mask = PERIPH_CLK_SOURCE_MASK; + } + for (sel = c->inputs; sel->input != NULL; sel++) { if (sel->input == p) { val = clk_readl(c->reg); - val &= ~PERIPH_CLK_SOURCE_MASK; - val |= (sel->value) << PERIPH_CLK_SOURCE_SHIFT; + val &= ~mask; + val |= (sel->value) << shift; if (c->refcnt) clk_enable(p); @@ -2156,7 +2180,7 @@ static struct clk tegra_list_clks[] = { PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71), - PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71), + PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71 | MUX_PWM), PERIPH_CLK("spi", "spi", NULL, 43, 0x114, 40000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), PERIPH_CLK("xio", "xio", NULL, 45, 0x120, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), -- cgit v1.1 From 094479915618c526a1409dd6704bcb4ff2c5c1c2 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 16 Dec 2011 21:01:57 +0100 Subject: ARM: tegra: Provide clock for only one PWM controller A subsequent patch will add a generic PWM API driver for the Tegra PWFM controller, supporting all four PWM devices with a single PWM chip. The device will be named tegra-pwm and only one clock needs to be provided. Signed-off-by: Thierry Reding Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra2_clocks.c | 6 +----- arch/arm/mach-tegra/tegra30_clocks.c | 6 +----- 2 files changed, 2 insertions(+), 10 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 2016ba0..a703844 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2180,7 +2180,7 @@ static struct clk tegra_list_clks[] = { PERIPH_CLK("i2s2", "tegra20-i2s.1", NULL, 18, 0x104, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("spdif_out", "spdif_out", NULL, 10, 0x108, 100000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("spdif_in", "spdif_in", NULL, 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71), - PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71 | MUX_PWM), + PERIPH_CLK("pwm", "tegra-pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_audio_clkm_clk32, MUX | DIV_U71 | MUX_PWM), PERIPH_CLK("spi", "spi", NULL, 43, 0x114, 40000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), PERIPH_CLK("xio", "xio", NULL, 45, 0x120, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), PERIPH_CLK("twc", "twc", NULL, 16, 0x12c, 150000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U71), @@ -2279,10 +2279,6 @@ static struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("usbd", "tegra-otg", NULL), CLK_DUPLICATE("hdmi", "tegradc.0", "hdmi"), CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), - CLK_DUPLICATE("pwm", "tegra_pwm.0", NULL), - CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL), - CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL), - CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL), CLK_DUPLICATE("host1x", "tegra_grhost", "host1x"), CLK_DUPLICATE("2d", "tegra_grhost", "gr2d"), CLK_DUPLICATE("3d", "tegra_grhost", "gr3d"), diff --git a/arch/arm/mach-tegra/tegra30_clocks.c b/arch/arm/mach-tegra/tegra30_clocks.c index 2ba948e..6674f10 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.c +++ b/arch/arm/mach-tegra/tegra30_clocks.c @@ -2886,7 +2886,7 @@ struct clk tegra_list_clks[] = { PERIPH_CLK("i2s4", "tegra30-i2s.4", NULL, 102, 0x3c0, 26000000, mux_pllaout0_audio4_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("spdif_out", "tegra30-spdif", "spdif_out", 10, 0x108, 100000000, mux_pllaout0_audio_2x_pllp_clkm, MUX | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("spdif_in", "tegra30-spdif", "spdif_in", 10, 0x10c, 100000000, mux_pllp_pllc_pllm, MUX | DIV_U71 | PERIPH_ON_APB), - PERIPH_CLK("pwm", "pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_clk32_clkm, MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB), + PERIPH_CLK("pwm", "tegra-pwm", NULL, 17, 0x110, 432000000, mux_pllp_pllc_clk32_clkm, MUX | MUX_PWM | DIV_U71 | PERIPH_ON_APB), PERIPH_CLK("d_audio", "tegra30-ahub", "d_audio", 106, 0x3d0, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam0", "tegra30-dam.0", NULL, 108, 0x3d8, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), PERIPH_CLK("dam1", "tegra30-dam.1", NULL, 109, 0x3dc, 48000000, mux_plla_pllc_pllp_clkm, MUX | DIV_U71), @@ -2990,10 +2990,6 @@ struct clk_duplicate tegra_clk_duplicates[] = { CLK_DUPLICATE("hdmi", "tegradc.1", "hdmi"), CLK_DUPLICATE("dsib", "tegradc.0", "dsib"), CLK_DUPLICATE("dsia", "tegradc.1", "dsia"), - CLK_DUPLICATE("pwm", "tegra_pwm.0", NULL), - CLK_DUPLICATE("pwm", "tegra_pwm.1", NULL), - CLK_DUPLICATE("pwm", "tegra_pwm.2", NULL), - CLK_DUPLICATE("pwm", "tegra_pwm.3", NULL), CLK_DUPLICATE("bsev", "tegra-avp", "bsev"), CLK_DUPLICATE("bsev", "nvavp", "bsev"), CLK_DUPLICATE("vde", "tegra-aes", "vde"), -- cgit v1.1 From b861c275ea5cfeab32241c3c92a203579d5699ff Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Wed, 20 Jun 2012 18:06:34 +0530 Subject: ARM: tegra: apbio access using dma for tegra20 only The Tegra20 HW issue with accessing APBIO registers (such as fuse registers) directly from the CPU concurrently with APB DMA accesses has been fixed in Tegra30 and later chips. Access these registers directly from the CPU on Tegra30 and later, and apply the workaround only for Tegra20. Signed-off-by: Laxman Dewangan Tested-by: Chaitanya Bandi Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Makefile | 3 ++- arch/arm/mach-tegra/apbio.c | 59 ++++++++++++++++++++++++++++++++++++++++---- arch/arm/mach-tegra/apbio.h | 19 +------------- arch/arm/mach-tegra/common.c | 3 +++ 4 files changed, 60 insertions(+), 24 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 2eb4445..e9f48ec 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -8,6 +8,7 @@ obj-y += timer.o obj-y += fuse.o obj-y += pmc.o obj-y += flowctrl.o +obj-y += apbio.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_CPU_IDLE) += sleep.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o @@ -18,7 +19,7 @@ obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30_clocks.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_SMP) += reset.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o apbio.o +obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o obj-$(CONFIG_TEGRA_PCI) += pcie.o obj-$(CONFIG_USB_SUPPORT) += usb_phy.o diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c index e75451e..74ac0db 100644 --- a/arch/arm/mach-tegra/apbio.c +++ b/arch/arm/mach-tegra/apbio.c @@ -15,6 +15,10 @@ #include #include +#include +#include + +#ifdef CONFIG_TEGRA_SYSTEM_DMA #include #include #include @@ -22,7 +26,6 @@ #include #include -#include #include "apbio.h" @@ -33,6 +36,9 @@ static u32 *tegra_apb_bb; static dma_addr_t tegra_apb_bb_phys; static DECLARE_COMPLETION(tegra_apb_wait); +static u32 tegra_apb_readl_direct(unsigned long offset); +static void tegra_apb_writel_direct(u32 value, unsigned long offset); + bool tegra_apb_init(void) { struct tegra_dma_channel *ch; @@ -72,13 +78,13 @@ static void apb_dma_complete(struct tegra_dma_req *req) complete(&tegra_apb_wait); } -u32 tegra_apb_readl(unsigned long offset) +static u32 tegra_apb_readl_using_dma(unsigned long offset) { struct tegra_dma_req req; int ret; if (!tegra_apb_dma && !tegra_apb_init()) - return readl(IO_TO_VIRT(offset)); + return tegra_apb_readl_direct(offset); mutex_lock(&tegra_apb_dma_lock); req.complete = apb_dma_complete; @@ -108,13 +114,13 @@ u32 tegra_apb_readl(unsigned long offset) return *((u32 *)tegra_apb_bb); } -void tegra_apb_writel(u32 value, unsigned long offset) +static void tegra_apb_writel_using_dma(u32 value, unsigned long offset) { struct tegra_dma_req req; int ret; if (!tegra_apb_dma && !tegra_apb_init()) { - writel(value, IO_TO_VIRT(offset)); + tegra_apb_writel_direct(value, offset); return; } @@ -143,3 +149,46 @@ void tegra_apb_writel(u32 value, unsigned long offset) mutex_unlock(&tegra_apb_dma_lock); } +#else +#define tegra_apb_readl_using_dma tegra_apb_readl_direct +#define tegra_apb_writel_using_dma tegra_apb_writel_direct +#endif + +typedef u32 (*apbio_read_fptr)(unsigned long offset); +typedef void (*apbio_write_fptr)(u32 value, unsigned long offset); + +static apbio_read_fptr apbio_read; +static apbio_write_fptr apbio_write; + +static u32 tegra_apb_readl_direct(unsigned long offset) +{ + return readl(IO_TO_VIRT(offset)); +} + +static void tegra_apb_writel_direct(u32 value, unsigned long offset) +{ + writel(value, IO_TO_VIRT(offset)); +} + +void tegra_apb_io_init(void) +{ + /* Need to use dma only when it is Tegra20 based platform */ + if (of_machine_is_compatible("nvidia,tegra20") || + !of_have_populated_dt()) { + apbio_read = tegra_apb_readl_using_dma; + apbio_write = tegra_apb_writel_using_dma; + } else { + apbio_read = tegra_apb_readl_direct; + apbio_write = tegra_apb_writel_direct; + } +} + +u32 tegra_apb_readl(unsigned long offset) +{ + return apbio_read(offset); +} + +void tegra_apb_writel(u32 value, unsigned long offset) +{ + apbio_write(value, offset); +} diff --git a/arch/arm/mach-tegra/apbio.h b/arch/arm/mach-tegra/apbio.h index 8b49e8c..f05d71c 100644 --- a/arch/arm/mach-tegra/apbio.h +++ b/arch/arm/mach-tegra/apbio.h @@ -16,24 +16,7 @@ #ifndef __MACH_TEGRA_APBIO_H #define __MACH_TEGRA_APBIO_H -#ifdef CONFIG_TEGRA_SYSTEM_DMA - +void tegra_apb_io_init(void); u32 tegra_apb_readl(unsigned long offset); void tegra_apb_writel(u32 value, unsigned long offset); - -#else -#include -#include - -static inline u32 tegra_apb_readl(unsigned long offset) -{ - return readl(IO_TO_VIRT(offset)); -} - -static inline void tegra_apb_writel(u32 value, unsigned long offset) -{ - writel(value, IO_TO_VIRT(offset)); -} -#endif - #endif diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 204a5c8..96fef6b 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -33,6 +33,7 @@ #include "clock.h" #include "fuse.h" #include "pmc.h" +#include "apbio.h" /* * Storage for debug-macro.S's state. @@ -127,6 +128,7 @@ static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) #ifdef CONFIG_ARCH_TEGRA_2x_SOC void __init tegra20_init_early(void) { + tegra_apb_io_init(); tegra_init_fuse(); tegra2_init_clocks(); tegra_clk_init_from_table(tegra20_clk_init_table); @@ -138,6 +140,7 @@ void __init tegra20_init_early(void) #ifdef CONFIG_ARCH_TEGRA_3x_SOC void __init tegra30_init_early(void) { + tegra_apb_io_init(); tegra_init_fuse(); tegra30_init_clocks(); tegra_clk_init_from_table(tegra30_clk_init_table); -- cgit v1.1 From 5b39fc0bf17028a6b18e57d33f0dcf71f28a8223 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Fri, 29 Jun 2012 17:00:07 +0530 Subject: ARM: tegra: apbio: use dmaengine based dma driver Use the dmaengine based Tegra APB DMA driver for apbio access in place of legacy Tegra APB DMA. The new driver is selected if legacy driver is not selected and new DMA driver is enabled through config file. Signed-off-by: Laxman Dewangan [swarren: s/pr_err/pr_debug/ in tegra_apb_dma_init; this condition is expected to fire repeatedly before the DMA driver is available] Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/apbio.c | 139 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 135 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/apbio.c b/arch/arm/mach-tegra/apbio.c index 74ac0db..dc0fe38 100644 --- a/arch/arm/mach-tegra/apbio.c +++ b/arch/arm/mach-tegra/apbio.c @@ -17,8 +17,7 @@ #include #include #include - -#ifdef CONFIG_TEGRA_SYSTEM_DMA +#include #include #include #include @@ -29,9 +28,8 @@ #include "apbio.h" +#if defined(CONFIG_TEGRA_SYSTEM_DMA) || defined(CONFIG_TEGRA20_APB_DMA) static DEFINE_MUTEX(tegra_apb_dma_lock); - -static struct tegra_dma_channel *tegra_apb_dma; static u32 *tegra_apb_bb; static dma_addr_t tegra_apb_bb_phys; static DECLARE_COMPLETION(tegra_apb_wait); @@ -39,6 +37,9 @@ static DECLARE_COMPLETION(tegra_apb_wait); static u32 tegra_apb_readl_direct(unsigned long offset); static void tegra_apb_writel_direct(u32 value, unsigned long offset); +#if defined(CONFIG_TEGRA_SYSTEM_DMA) +static struct tegra_dma_channel *tegra_apb_dma; + bool tegra_apb_init(void) { struct tegra_dma_channel *ch; @@ -149,6 +150,136 @@ static void tegra_apb_writel_using_dma(u32 value, unsigned long offset) mutex_unlock(&tegra_apb_dma_lock); } + +#else +static struct dma_chan *tegra_apb_dma_chan; +static struct dma_slave_config dma_sconfig; + +bool tegra_apb_dma_init(void) +{ + dma_cap_mask_t mask; + + mutex_lock(&tegra_apb_dma_lock); + + /* Check to see if we raced to setup */ + if (tegra_apb_dma_chan) + goto skip_init; + + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + tegra_apb_dma_chan = dma_request_channel(mask, NULL, NULL); + if (!tegra_apb_dma_chan) { + /* + * This is common until the device is probed, so don't + * shout about it. + */ + pr_debug("%s: can not allocate dma channel\n", __func__); + goto err_dma_alloc; + } + + tegra_apb_bb = dma_alloc_coherent(NULL, sizeof(u32), + &tegra_apb_bb_phys, GFP_KERNEL); + if (!tegra_apb_bb) { + pr_err("%s: can not allocate bounce buffer\n", __func__); + goto err_buff_alloc; + } + + dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + dma_sconfig.slave_id = TEGRA_DMA_REQ_SEL_CNTR; + dma_sconfig.src_maxburst = 1; + dma_sconfig.dst_maxburst = 1; + +skip_init: + mutex_unlock(&tegra_apb_dma_lock); + return true; + +err_buff_alloc: + dma_release_channel(tegra_apb_dma_chan); + tegra_apb_dma_chan = NULL; + +err_dma_alloc: + mutex_unlock(&tegra_apb_dma_lock); + return false; +} + +static void apb_dma_complete(void *args) +{ + complete(&tegra_apb_wait); +} + +static int do_dma_transfer(unsigned long apb_add, + enum dma_transfer_direction dir) +{ + struct dma_async_tx_descriptor *dma_desc; + int ret; + + if (dir == DMA_DEV_TO_MEM) + dma_sconfig.src_addr = apb_add; + else + dma_sconfig.dst_addr = apb_add; + + ret = dmaengine_slave_config(tegra_apb_dma_chan, &dma_sconfig); + if (ret) + return ret; + + dma_desc = dmaengine_prep_slave_single(tegra_apb_dma_chan, + tegra_apb_bb_phys, sizeof(u32), dir, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!dma_desc) + return -EINVAL; + + dma_desc->callback = apb_dma_complete; + dma_desc->callback_param = NULL; + + INIT_COMPLETION(tegra_apb_wait); + + dmaengine_submit(dma_desc); + dma_async_issue_pending(tegra_apb_dma_chan); + ret = wait_for_completion_timeout(&tegra_apb_wait, + msecs_to_jiffies(50)); + + if (WARN(ret == 0, "apb read dma timed out")) { + dmaengine_terminate_all(tegra_apb_dma_chan); + return -EFAULT; + } + return 0; +} + +static u32 tegra_apb_readl_using_dma(unsigned long offset) +{ + int ret; + + if (!tegra_apb_dma_chan && !tegra_apb_dma_init()) + return tegra_apb_readl_direct(offset); + + mutex_lock(&tegra_apb_dma_lock); + ret = do_dma_transfer(offset, DMA_DEV_TO_MEM); + if (ret < 0) { + pr_err("error in reading offset 0x%08lx using dma\n", offset); + *(u32 *)tegra_apb_bb = 0; + } + mutex_unlock(&tegra_apb_dma_lock); + return *((u32 *)tegra_apb_bb); +} + +static void tegra_apb_writel_using_dma(u32 value, unsigned long offset) +{ + int ret; + + if (!tegra_apb_dma_chan && !tegra_apb_dma_init()) { + tegra_apb_writel_direct(value, offset); + return; + } + + mutex_lock(&tegra_apb_dma_lock); + *((u32 *)tegra_apb_bb) = value; + ret = do_dma_transfer(offset, DMA_MEM_TO_DEV); + if (ret < 0) + pr_err("error in writing offset 0x%08lx using dma\n", offset); + mutex_unlock(&tegra_apb_dma_lock); +} +#endif #else #define tegra_apb_readl_using_dma tegra_apb_readl_direct #define tegra_apb_writel_using_dma tegra_apb_writel_direct -- cgit v1.1 From c80efbae6a53d9702630fc5f96662f96a45ca56a Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 20 Apr 2012 16:57:38 -0600 Subject: ARM: dt: tegra: add Whistler device tree file Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/Makefile.boot | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 8040345..435f00c 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot @@ -7,4 +7,5 @@ dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb +dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb -- cgit v1.1 From 3d55c29fb24286f350f04021bef2dd799e25dd20 Mon Sep 17 00:00:00 2001 From: Laxman Dewangan Date: Tue, 24 Jul 2012 10:36:23 -0600 Subject: ARM: tegra: harmony: add regulator supply name and its input supply Name the regulator as per board schematics and adds its supply name info in regulator data. Add the always on fixed regulator to refer the battery supply. Use this fixed regulator for input supply of some of PMIC regulator This patch was originally part of a 2-patch series. Patch 2 got applied to the regulator tree as 7c7fac3 "regulator: tps6586x: add support for input supply" without this patch. This broke regulator support on Harmony. Signed-off-by: Laxman Dewangan [swarren: added dependency info to commit description] Signed-off-by: Stephen Warren Signed-off-by: Arnd Bergmann --- arch/arm/mach-tegra/board-harmony-power.c | 33 +++++++++++++++++++------------ 1 file changed, 20 insertions(+), 13 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c index 44dcb2e..8fd387b 100644 --- a/arch/arm/mach-tegra/board-harmony-power.c +++ b/arch/arm/mach-tegra/board-harmony-power.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -34,7 +35,9 @@ static struct regulator_consumer_supply tps658621_ldo0_supply[] = { }; static struct regulator_init_data ldo0_data = { + .supply_regulator = "vdd_sm2", .constraints = { + .name = "vdd_ldo0", .min_uV = 3300 * 1000, .max_uV = 3300 * 1000, .valid_modes_mask = (REGULATOR_MODE_NORMAL | @@ -48,9 +51,11 @@ static struct regulator_init_data ldo0_data = { .consumer_supplies = tps658621_ldo0_supply, }; -#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \ +#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv) \ static struct regulator_init_data _id##_data = { \ + .supply_regulator = _supply, \ .constraints = { \ + .name = _name, \ .min_uV = (_minmv)*1000, \ .max_uV = (_maxmv)*1000, \ .valid_modes_mask = (REGULATOR_MODE_NORMAL | \ @@ -61,18 +66,18 @@ static struct regulator_init_data ldo0_data = { }, \ } -HARMONY_REGULATOR_INIT(sm0, 725, 1500); -HARMONY_REGULATOR_INIT(sm1, 725, 1500); -HARMONY_REGULATOR_INIT(sm2, 3000, 4550); -HARMONY_REGULATOR_INIT(ldo1, 725, 1500); -HARMONY_REGULATOR_INIT(ldo2, 725, 1500); -HARMONY_REGULATOR_INIT(ldo3, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo4, 1700, 2475); -HARMONY_REGULATOR_INIT(ldo5, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo6, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo7, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo8, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo9, 1250, 3300); +HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500); +HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500); +HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550); +HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500); +HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500); +HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475); +HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300); +HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300); #define TPS_REG(_id, _data) \ { \ @@ -115,6 +120,8 @@ static struct i2c_board_info __initdata harmony_regulators[] = { int __init harmony_regulator_init(void) { if (machine_is_harmony()) { + regulator_register_always_on(0, "vdd_sys", + NULL, 0, 5000000); i2c_register_board_info(3, harmony_regulators, 1); } else { /* Harmony, booted using device tree */ struct device_node *np; -- cgit v1.1 From 798bd59ce94c8218332996e650ded48ded039fe1 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 3 Aug 2012 17:45:21 -0600 Subject: ARM: tegra: more regulator fixes for Harmony Commit 3d55c29 "ARM: tegra: harmony: add regulator supply name and its input supply" was supposed to fix all the problems with regulators on Harmony. However, it appears that I only tested it when booting using board files, not when booting using device tree. This change fixes two problems with regulators when booting using device tree: 1) That patch only created the vdd_sys regulator when booting using a board file. Since this is the root of the whole regulator tree, this caused no regulators to successfully initialize when booting using device tree. The registration of vdd_sys is moved to fix this. 2) When booting use DT, the regulator core sets has_full_constraints, which in turn causes the core to turn off any regulators not marked as always on. Some of the affected regulators are required for basic system operation. To solve this, add always on constraints to all relevant regulators. This doesn't affect booting using a board file since nothing sets has_full_constraints in that case. Signed-off-by: Stephen Warren Signed-off-by: Arnd Bergmann --- arch/arm/mach-tegra/board-harmony-power.c | 32 ++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c index 8fd387b..b7344be 100644 --- a/arch/arm/mach-tegra/board-harmony-power.c +++ b/arch/arm/mach-tegra/board-harmony-power.c @@ -51,7 +51,7 @@ static struct regulator_init_data ldo0_data = { .consumer_supplies = tps658621_ldo0_supply, }; -#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv) \ +#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv, _on)\ static struct regulator_init_data _id##_data = { \ .supply_regulator = _supply, \ .constraints = { \ @@ -63,21 +63,22 @@ static struct regulator_init_data ldo0_data = { .valid_ops_mask = (REGULATOR_CHANGE_MODE | \ REGULATOR_CHANGE_STATUS | \ REGULATOR_CHANGE_VOLTAGE), \ + .always_on = _on, \ }, \ } -HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500); -HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500); -HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550); -HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500); -HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500); -HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300); -HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475); -HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300); -HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300); -HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300); -HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300); -HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300); +HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500, 1); +HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500, 1); +HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550, 1); +HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500, 1); +HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500, 0); +HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300, 1); +HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475, 1); +HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300, 1); +HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300, 0); +HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300, 0); +HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300, 0); +HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300, 1); #define TPS_REG(_id, _data) \ { \ @@ -119,9 +120,10 @@ static struct i2c_board_info __initdata harmony_regulators[] = { int __init harmony_regulator_init(void) { + regulator_register_always_on(0, "vdd_sys", + NULL, 0, 5000000); + if (machine_is_harmony()) { - regulator_register_always_on(0, "vdd_sys", - NULL, 0, 5000000); i2c_register_board_info(3, harmony_regulators, 1); } else { /* Harmony, booted using device tree */ struct device_node *np; -- cgit v1.1