From 36bccb11a4ac7cc9d190c3062945f1c911a62801 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 19 Mar 2014 12:44:41 +0000 Subject: ARM: l2c: remove platforms/SoCs setting early BRESP Since we now automatically enable early BRESP in core L2C-310 code when we detect a Cortex-A9, we don't need platforms/SoCs to set this bit explicitly. Instead, they should seek to preserve the value of bit 30 in the auxiliary control register. Acked-by: Tony Lindgren Acked-by: Stephen Warren Signed-off-by: Russell King --- arch/arm/mach-tegra/tegra.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-tegra') diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 6191603..ecbb541 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -89,9 +89,9 @@ static void __init tegra_init_cache(void) cache_type = readl(p + L2X0_CACHE_TYPE); aux_ctrl = (cache_type & 0x700) << (17-8); - aux_ctrl |= 0x7C400001; + aux_ctrl |= 0x3c400001; - ret = l2x0_of_init(aux_ctrl, 0x8200c3fe); + ret = l2x0_of_init(aux_ctrl, 0xc200c3fe); if (!ret) l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs); #endif -- cgit v1.1