From aea812e1ac80a491d39396e2a2d15bb725933c84 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 25 Apr 2012 12:10:19 -0600 Subject: ARM: tegra: add pll_x freq table entry for 750MHz Some SKUs limit the maximum CPU frequency to 750MHz; see tegra2_pllx_clk_init(). The pll_x frequency table needs an entry for this frequency, or there will be continual log spam from the cpufreq driver attempting to set this rate, yet there being no table entry for it. Signed-off-by: Stephen Warren --- arch/arm/mach-tegra/tegra2_clocks.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/mach-tegra/tegra2_clocks.c') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 592a4ee..2cae5cb 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -1764,6 +1764,12 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = { { 19200000, 760000000, 950, 24, 1, 8}, { 26000000, 760000000, 760, 26, 1, 12}, + /* 750 MHz */ + { 12000000, 750000000, 750, 12, 1, 12}, + { 13000000, 750000000, 750, 13, 1, 12}, + { 19200000, 750000000, 625, 16, 1, 8}, + { 26000000, 750000000, 750, 26, 1, 12}, + /* 608 MHz */ { 12000000, 608000000, 608, 12, 1, 12}, { 13000000, 608000000, 608, 13, 1, 12}, -- cgit v1.1