From 1ca00347c579f15b0eea1a6d4bab84e2cf56e745 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 5 Jan 2011 14:32:20 -0700 Subject: ARM: tegra: APB DMA: Enable clock and remove reset. Signed-off-by: Stephen Warren Signed-off-by: Colin Cross --- arch/arm/mach-tegra/tegra2_clocks.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/mach-tegra/tegra2_clocks.c') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 7a2926a..49b3eda 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -1759,6 +1759,11 @@ static struct clk_mux_sel mux_clk_32k[] = { { 0, 0}, }; +static struct clk_mux_sel mux_pclk[] = { + { .input = &tegra_clk_pclk, .value = 0}, + { 0, 0}, +}; + #define PERIPH_CLK(_name, _dev, _con, _clk_num, _reg, _max, _inputs, _flags) \ { \ .name = _name, \ @@ -1775,6 +1780,7 @@ static struct clk_mux_sel mux_clk_32k[] = { } struct clk tegra_periph_clks[] = { + PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71), -- cgit v1.1