From 14133add42928d6759f35f5d94938adf2cda2bb6 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Wed, 8 Sep 2010 19:41:58 -0700 Subject: ARM: tegra: clock: Don't BUG on changing an enabled PLL When updating the CPU PLL frequency, keeping the PLL enabled avoids ramping the PLL all the way down and back up again. Remove the BUG_ON in tegra2_pll_clk_set_rate to allow the rate to change while the PLL is enabled. Acked-by: Olof Johansson Signed-off-by: Colin Cross --- arch/arm/mach-tegra/tegra2_clocks.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-tegra/tegra2_clocks.c') diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 6442abe..600a5a4 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -620,7 +620,6 @@ static int tegra2_pll_clk_set_rate(struct clk *c, unsigned long rate) const struct clk_pll_table *sel; pr_debug("%s: %s %lu\n", __func__, c->name, rate); - BUG_ON(c->refcnt != 0); input_rate = c->parent->rate; for (sel = c->pll_table; sel->input_rate != 0; sel++) { -- cgit v1.1