From 0e944e276c7ebcb880d20f6e9255f596c85fc767 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Sun, 20 May 2012 01:01:35 +0900 Subject: ARM: S3C24XX: add support for second irq set of S3C2416 The S3C2416 has a separate second interrupt register-set to support additional irqs. This patch adds the necessary constants and registers the irq handlers for it. Signed-off-by: Heiko Stuebner Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/s3c2416.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-s3c24xx/s3c2416.c') diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c index 7743fad..ed5a95ec 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c24xx/s3c2416.c @@ -106,6 +106,7 @@ int __init s3c2416_init(void) register_syscore_ops(&s3c2416_pm_syscore_ops); #endif register_syscore_ops(&s3c24xx_irq_syscore_ops); + register_syscore_ops(&s3c2416_irq_syscore_ops); return device_register(&s3c2416_dev); } -- cgit v1.1