From 42ea573f872365b0797ddbcee2e1f1f48913f507 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Ha=C5=82asa?= Date: Tue, 16 Mar 2010 22:11:59 +0100 Subject: IXP4xx: Fix LL debugging on little-endian CPU. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit IXP4xx only needs +3 offset for UART registers when running in big-endian mode. Signed-off-by: Krzysztof Hałasa --- arch/arm/mach-ixp4xx/include/mach/debug-macro.S | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-ixp4xx') diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S index 893873e..3fc66d6 100644 --- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S @@ -16,8 +16,10 @@ moveq \rx, #0xc8000000 movne \rx, #0xff000000 orrne \rx, \rx, #0x00b00000 +#ifdef __ARMEB__ add \rx,\rx,#3 @ Uart regs are at off set of 3 if @ byte writes used - Big Endian. +#endif .endm #define UART_SHIFT 2 -- cgit v1.1