From da497f6fbaa190d34907ecc9dd85cfc62ba9f5a2 Mon Sep 17 00:00:00 2001 From: Lior Amsalem Date: Tue, 9 Apr 2013 00:52:11 +0200 Subject: ARM: mvebu: Align the internal registers virtual base to support LPAE In order to be able to support the LPAE, the internal registers virtual base must be aligned to 2MB. In LPAE section size is 2MB, in earlyprintk we map the internal registers and it must be section aligned. Signed-off-by: Lior Amsalem Signed-off-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- arch/arm/include/debug/mvebu.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/include') diff --git a/arch/arm/include/debug/mvebu.S b/arch/arm/include/debug/mvebu.S index 865c6d0..df191af 100644 --- a/arch/arm/include/debug/mvebu.S +++ b/arch/arm/include/debug/mvebu.S @@ -12,7 +12,7 @@ */ #define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 -#define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 +#define ARMADA_370_XP_REGS_VIRT_BASE 0xfec00000 .macro addruart, rp, rv, tmp ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE -- cgit v1.1