From fa943bed68c85e1ebac4b9dd6398ad6fd0f53567 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 20 Apr 2012 08:02:03 +0100 Subject: ARM: 7394/1: VIC: respect list of valid sources The current IRQ domain implementation in the VIC allocates 32 interrupts for each VIC instance no matter whether the controller actually use all the IRQs or not. Alter this so we only allocate a domain up until the last IRQ marked valid. Cc: Will Deacon Cc: Grant Likely Cc: Rob Herring Acked-by: Jamie Iles Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/common/vic.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'arch/arm/common') diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index 7e288f9..c558a3e 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -168,6 +168,7 @@ late_initcall(vic_pm_init); * vic_register() - Register a VIC. * @base: The base address of the VIC. * @irq: The base IRQ for the VIC. + * @valid_sources: bitmask of valid interrupts * @resume_sources: bitmask of interrupts allowed for resume sources. * @node: The device tree node associated with the VIC. * @@ -178,7 +179,8 @@ late_initcall(vic_pm_init); * This also configures the IRQ domain for the VIC. */ static void __init vic_register(void __iomem *base, unsigned int irq, - u32 resume_sources, struct device_node *node) + u32 valid_sources, u32 resume_sources, + struct device_node *node) { struct vic_device *v; @@ -192,8 +194,8 @@ static void __init vic_register(void __iomem *base, unsigned int irq, v->resume_sources = resume_sources; v->irq = irq; vic_id++; - v->domain = irq_domain_add_legacy(node, 32, irq, 0, - &irq_domain_simple_ops, v); + v->domain = irq_domain_add_legacy(node, fls(valid_sources), irq, 0, + &vic_irqdomain_ops, v); } static void vic_ack_irq(struct irq_data *d) @@ -339,7 +341,7 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, } vic_set_irq_sources(base, irq_start, vic_sources); - vic_register(base, irq_start, 0, node); + vic_register(base, irq_start, vic_sources, 0, node); } void __init __vic_init(void __iomem *base, unsigned int irq_start, @@ -381,7 +383,7 @@ void __init __vic_init(void __iomem *base, unsigned int irq_start, vic_set_irq_sources(base, irq_start, vic_sources); - vic_register(base, irq_start, resume_sources, node); + vic_register(base, irq_start, vic_sources, resume_sources, node); } /** -- cgit v1.1 From ce94df9c099d2a828610576f31dddfa552243edc Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 20 Apr 2012 08:02:36 +0100 Subject: ARM: 7395/1: VIC: use the domain mapping function to assign handlers This removes the internal functions for assigning IRQ handlers to each interrupt in favor of using the internal map iterator in the irq domain code. Cc: Will Deacon Cc: Grant Likely Cc: Rob Herring Acked-by: Jamie Iles Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/common/vic.c | 44 ++++++++++++++++++++++++-------------------- 1 file changed, 24 insertions(+), 20 deletions(-) (limited to 'arch/arm/common') diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index c558a3e..e0d5388 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c @@ -39,6 +39,7 @@ * struct vic_device - VIC PM device * @irq: The IRQ number for the base of the VIC. * @base: The register base for the VIC. + * @valid_sources: A bitmask of valid interrupts * @resume_sources: A bitmask of interrupts for resume. * @resume_irqs: The IRQs enabled for resume. * @int_select: Save for VIC_INT_SELECT. @@ -50,6 +51,7 @@ struct vic_device { void __iomem *base; int irq; + u32 valid_sources; u32 resume_sources; u32 resume_irqs; u32 int_select; @@ -164,6 +166,27 @@ static int __init vic_pm_init(void) late_initcall(vic_pm_init); #endif /* CONFIG_PM */ +static struct irq_chip vic_chip; + +static int vic_irqdomain_map(struct irq_domain *d, unsigned int irq, + irq_hw_number_t hwirq) +{ + struct vic_device *v = d->host_data; + + /* Skip invalid IRQs, only register handlers for the real ones */ + if (!(v->valid_sources & (1 << hwirq))) + return -ENOTSUPP; + irq_set_chip_and_handler(irq, &vic_chip, handle_level_irq); + irq_set_chip_data(irq, v->base); + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); + return 0; +} + +static struct irq_domain_ops vic_irqdomain_ops = { + .map = vic_irqdomain_map, + .xlate = irq_domain_xlate_onetwocell, +}; + /** * vic_register() - Register a VIC. * @base: The base address of the VIC. @@ -191,6 +214,7 @@ static void __init vic_register(void __iomem *base, unsigned int irq, v = &vic_devices[vic_id]; v->base = base; + v->valid_sources = valid_sources; v->resume_sources = resume_sources; v->irq = irq; vic_id++; @@ -289,23 +313,6 @@ static void __init vic_clear_interrupts(void __iomem *base) } } -static void __init vic_set_irq_sources(void __iomem *base, - unsigned int irq_start, u32 vic_sources) -{ - unsigned int i; - - for (i = 0; i < 32; i++) { - if (vic_sources & (1 << i)) { - unsigned int irq = irq_start + i; - - irq_set_chip_and_handler(irq, &vic_chip, - handle_level_irq); - irq_set_chip_data(irq, base); - set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); - } - } -} - /* * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. * The original cell has 32 interrupts, while the modified one has 64, @@ -340,7 +347,6 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start, writel(32, base + VIC_PL190_DEF_VECT_ADDR); } - vic_set_irq_sources(base, irq_start, vic_sources); vic_register(base, irq_start, vic_sources, 0, node); } @@ -381,8 +387,6 @@ void __init __vic_init(void __iomem *base, unsigned int irq_start, vic_init2(base); - vic_set_irq_sources(base, irq_start, vic_sources); - vic_register(base, irq_start, vic_sources, resume_sources, node); } -- cgit v1.1