From 11a3c868f923b1c0b7a5c532881883b7db077ec3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 2 Jan 2013 14:53:22 -0700 Subject: ARM: tegra: paz00: enable HDMI port Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-paz00.dts | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) (limited to 'arch/arm/boot/dts/tegra20-paz00.dts') diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index a965fe9..2e94d34 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -10,6 +10,18 @@ reg = <0x00000000 0x20000000>; }; + host1x { + hdmi { + status = "okay"; + + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -252,9 +264,9 @@ }; }; - i2c@7000c400 { + hdmi_ddc: i2c@7000c400 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; }; nvec { @@ -369,13 +381,13 @@ regulator-max-microvolt = <1800000>; }; - ldo7 { + hdmi_vdd_reg: ldo7 { regulator-name = "+3.3vs_ldo7,avdd_hdmi"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; - ldo8 { + hdmi_pll_reg: ldo8 { regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; -- cgit v1.1 From ab343e91aa00d6cc1047e8209d610c384ee824b9 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 22 Jan 2013 22:46:07 +0100 Subject: ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Lucas Stach Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-paz00.dts | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arm/boot/dts/tegra20-paz00.dts') diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 2e94d34..e4034b6 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -244,12 +244,10 @@ serial@70006000 { status = "okay"; - clock-frequency = <216000000>; }; serial@70006200 { status = "okay"; - clock-frequency = <216000000>; }; i2c@7000c000 { -- cgit v1.1