From 063de897c411af65cb113cb5fb9a0022f913460e Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 8 Jul 2014 18:21:14 +0200 Subject: ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks Define the available clock for mprddr and take both mpddr_clk and ddrck in the ram controller driver. Signed-off-by: Alexandre Belloni Signed-off-by: Maxime Ripard Acked-by: Nicolas Ferre --- arch/arm/boot/dts/sama5d3.dtsi | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/sama5d3.dtsi') diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index e0b15a6..04c35ce 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -402,8 +402,10 @@ }; ramc0: ramc@ffffea00 { - compatible = "atmel,at91sam9g45-ddramc"; + compatible = "atmel,sama5d3-ddramc"; reg = <0xffffea00 0x200>; + clocks = <&ddrck>, <&mpddr_clk>; + clock-names = "ddrck", "mpddr"; }; dbgu: serial@ffffee00 { @@ -1170,6 +1172,11 @@ #clock-cells = <0>; reg = <48>; }; + + mpddr_clk: mpddr_clk { + #clock-cells = <0>; + reg = <49>; + }; }; }; -- cgit v1.1 From 16aa7f1f173f3ca105296cf2709cb039c99ffe4a Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 3 Jul 2014 14:08:47 +0200 Subject: ARM: at91/dt: sama5d3: Add shutdown controller The SAMA5D3 has a shutdown controller identical to the sam9x5 SoC family. Declare it in the DT. Signed-off-by: Maxime Ripard Acked-by: Nicolas Ferre Acked-by: Alexandre Belloni --- arch/arm/boot/dts/sama5d3.dtsi | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/boot/dts/sama5d3.dtsi') diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index 04c35ce..97952ef 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -1185,6 +1185,11 @@ reg = <0xfffffe00 0x10>; }; + shutdown-controller@fffffe10 { + compatible = "atmel,at91sam9x5-shdwc"; + reg = <0xfffffe10 0x10>; + }; + pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; -- cgit v1.1