From e14d7e5320ebae9bffe4fbd585dfdd9d6de2550f Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 11 Jan 2018 16:04:03 -0800 Subject: ARM: dts: Update ti-sysc data for existing users Let's update the existing users with features and clock data as specified in the binding. This is currently the smartreflex for most part, and also few omap4 modules with no child device driver like mcasp, abe iss and gfx. Note that we had few mistakes that did not get noticed as we're still probing the SmartReflex driver with legacy platform data and using "ti,hwmods" legacy property for ti-sysc driver. So let's fix the omap4 and dra7 smartreflex registers as there is no no revision register. And on omap4, the mcasp module has a revision register according to the TRM. And for omap34xx we need a different configuration compared to 36xx. And the smartreflex on 3517 we've always kept disabled so let's remove any references to it. Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap34xx.dtsi | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'arch/arm/boot/dts/omap34xx.dtsi') diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi index ac4f879..f572a47 100644 --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -8,6 +8,7 @@ * kind, whether express or implied. */ +#include #include #include "omap3.dtsi" @@ -61,6 +62,44 @@ compatible = "ti,omap34xx-bandgap"; #thermal-sensor-cells = <0>; }; + + target-module@480cb000 { + compatible = "ti,sysc-omap3430-sr", "ti,sysc"; + ti,hwmods = "smartreflex_core"; + reg = <0x480cb024 0x4>; + reg-names = "sysc"; + ti,sysc-mask = ; + clocks = <&sr2_fck>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x480cb000 0x001000>; + + smartreflex_core: smartreflex@0 { + compatible = "ti,omap3-smartreflex-core"; + reg = <0 0x400>; + interrupts = <19>; + }; + }; + + target-module@480c9000 { + compatible = "ti,sysc-omap3430-sr", "ti,sysc"; + ti,hwmods = "smartreflex_mpu_iva"; + reg = <0x480c9024 0x4>; + reg-names = "sysc"; + ti,sysc-mask = ; + clocks = <&sr1_fck>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x480c9000 0x001000>; + + smartreflex_mpu_iva: smartreflex@480c9000 { + compatible = "ti,omap3-smartreflex-mpu-iva"; + reg = <0 0x400>; + interrupts = <18>; + }; + }; }; thermal_zones: thermal-zones { -- cgit v1.1