From 327e154289772870476b3787f125fc9618f81c7a Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Wed, 30 Apr 2014 14:56:34 +0200 Subject: ARM: dts: kirkwood: consolidate common pinctrl settings All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0, and GBE1. Move it to the common pinctrl node that we now have. Signed-off-by: Sebastian Hesselbarth Acked-by: Andrew Lunn Link: https://lkml.kernel.org/r/1398862602-29595-8-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood-6281.dtsi | 22 ---------------------- 1 file changed, 22 deletions(-) (limited to 'arch/arm/boot/dts/kirkwood-6281.dtsi') diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi index 3674a9b..7dc7d67 100644 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi @@ -38,12 +38,6 @@ pinctrl: pin-controller@10000 { compatible = "marvell,88f6281-pinctrl"; - pmx_nand: pmx-nand { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", - "mpp4", "mpp5", "mpp18", - "mpp19"; - marvell,function = "nand"; - }; pmx_sata0: pmx-sata0 { marvell,pins = "mpp5", "mpp21", "mpp23"; marvell,function = "sata0"; @@ -52,22 +46,6 @@ marvell,pins = "mpp4", "mpp20", "mpp22"; marvell,function = "sata1"; }; - pmx_spi: pmx-spi { - marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; - marvell,function = "spi"; - }; - pmx_twsi0: pmx-twsi0 { - marvell,pins = "mpp8", "mpp9"; - marvell,function = "twsi0"; - }; - pmx_uart0: pmx-uart0 { - marvell,pins = "mpp10", "mpp11"; - marvell,function = "uart0"; - }; - pmx_uart1: pmx-uart1 { - marvell,pins = "mpp13", "mpp14"; - marvell,function = "uart1"; - }; pmx_sdio: pmx-sdio { marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16", "mpp17"; -- cgit v1.1