From cb2ad5e5339c5122166265cea579cc6a356d46de Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Wed, 27 Apr 2016 16:59:50 +0300 Subject: ARC: [axs10x] Specify reserved memory for frame buffer Allocation of a frame buffer memory in a special memory region allows bypassing of so-called IO Coherency aperture which is typically set as a range 0x8z-0xAz. I.e. all data traffic to PGU bypasses IO Coherency block and saves its bandwidth for other peripherals. Even though for AXS101 (which sorts ARC770 CPU) IOC is not an option for a sake of keeping one DT description for the base-board (axs10x_mb.dtsi) we're still defining reserved memory location in the very end of DDR. Signed-off-by: Alexey Brodkin Acked-by: Vineet Gupta Cc: devicetree@vger.kernel.org --- arch/arc/boot/dts/axc003_idu.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/arc/boot/dts/axc003_idu.dtsi') diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi index 06a9f29..df9ddb6 100644 --- a/arch/arc/boot/dts/axc003_idu.dtsi +++ b/arch/arc/boot/dts/axc003_idu.dtsi @@ -123,4 +123,18 @@ device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512MiB */ }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + /* + * Move frame buffer out of IOC aperture (0x8z-0xAz). + */ + frame_buffer: frame_buffer@be000000 { + compatible = "shared-dma-pool"; + reg = <0xbe000000 0x2000000>; + no-map; + }; + }; }; -- cgit v1.1