From 445c0f29c1d0b771afc3b888bf375d73bb661e73 Mon Sep 17 00:00:00 2001 From: Jon Mason Date: Mon, 2 Nov 2015 13:34:52 -0500 Subject: dt-bindings: Add new SoCs to bcm4708 DT bindings Add the 4708, 4709, and 53012 SoCs to the the documentation for the Broadcom Northstar device tree bindings. Signed-off-by: Jon Mason Acked-by: Hauke Mehrtens Acked-by: Scott Branden Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt index 6b0f49f..8608a77 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.txt @@ -5,4 +5,11 @@ Boards with the BCM4708 SoC shall have the following properties: Required root node property: +bcm4708 compatible = "brcm,bcm4708"; + +bcm4709 +compatible = "brcm,bcm4709"; + +bcm53012 +compatible = "brcm,bcm53012"; -- cgit v1.1 From 02eca1737633728bdafb7ed43be7a2935e52a5d6 Mon Sep 17 00:00:00 2001 From: Erin Lo Date: Tue, 20 Oct 2015 14:34:30 +0800 Subject: Document: DT: Add bindings for mediatek MT2701 SoC Platform This adds a DT binding documentation for the MT2701 SoC from Mediatek. Signed-off-by: Erin Lo Acked-by: Rob Herring Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek.txt | 4 ++++ .../bindings/interrupt-controller/mediatek,sysirq.txt | 1 + Documentation/devicetree/bindings/serial/mtk-uart.txt | 14 +++++++------- .../devicetree/bindings/timer/mediatek,mtk-timer.txt | 1 + Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 6 +++++- 5 files changed, 18 insertions(+), 8 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index 618a9199..54f43bc 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -6,6 +6,7 @@ following property: Required root node property: compatible: Must contain one of + "mediatek,mt2701" "mediatek,mt6580" "mediatek,mt6589" "mediatek,mt6592" @@ -17,6 +18,9 @@ compatible: Must contain one of Supported boards: +- Evaluation board for MT2701: + Required root node properties: + - compatible = "mediatek,mt2701-evb", "mediatek,mt2701"; - Evaluation board for MT6580: Required root node properties: - compatible = "mediatek,mt6580-evbp1", "mediatek,mt6580"; diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt index afef6a8..b8e1674 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt @@ -14,6 +14,7 @@ Required properties: "mediatek,mt6582-sysirq" "mediatek,mt6580-sysirq" "mediatek,mt6577-sysirq" + "mediatek,mt2701-sysirq" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Use the same format as specified by GIC in Documentation/devicetree/bindings/arm/gic.txt diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt index 2d47add..a833a01 100644 --- a/Documentation/devicetree/bindings/serial/mtk-uart.txt +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -2,15 +2,15 @@ Required properties: - compatible should contain: - * "mediatek,mt8135-uart" for MT8135 compatible UARTS + * "mediatek,mt2701-uart" for MT2701 compatible UARTS + * "mediatek,mt6580-uart" for MT6580 compatible UARTS + * "mediatek,mt6582-uart" for MT6582 compatible UARTS + * "mediatek,mt6589-uart" for MT6589 compatible UARTS + * "mediatek,mt6795-uart" for MT6795 compatible UARTS * "mediatek,mt8127-uart" for MT8127 compatible UARTS + * "mediatek,mt8135-uart" for MT8135 compatible UARTS * "mediatek,mt8173-uart" for MT8173 compatible UARTS - * "mediatek,mt6795-uart" for MT6795 compatible UARTS - * "mediatek,mt6589-uart" for MT6589 compatible UARTS - * "mediatek,mt6582-uart" for MT6582 compatible UARTS - * "mediatek,mt6580-uart" for MT6580 compatible UARTS - * "mediatek,mt6577-uart" for all compatible UARTS (MT8173, MT6795, - MT6589, MT6582, MT6580, MT6577) + * "mediatek,mt6577-uart" for MT6577 and all of the above - reg: The base address of the UART register bank. diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt index 64083bc..8ff54eb 100644 --- a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt +++ b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt @@ -3,6 +3,7 @@ Mediatek MT6577, MT6572 and MT6589 Timers Required properties: - compatible should contain: + * "mediatek,mt2701-timer" for MT2701 compatible timers * "mediatek,mt6580-timer" for MT6580 compatible timers * "mediatek,mt6589-timer" for MT6589 compatible timers * "mediatek,mt8127-timer" for MT8127 compatible timers diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt index af9eb5b..6a00939 100644 --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt @@ -2,7 +2,11 @@ Mediatek SoCs Watchdog timer Required properties: -- compatible : should be "mediatek,mt6589-wdt" +- compatible should contain: + * "mediatek,mt2701-wdt" for MT2701 compatible watchdog timers + * "mediatek,mt6589-wdt" for all compatible watchdog timers (MT2701, + MT6589) + - reg : Specifies base physical address and size of the registers. Example: -- cgit v1.1 From 967313e2ec9cb9184e1d6af393c766e87f8eb1fc Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 20 Nov 2015 12:42:44 +0100 Subject: ARM: mediatek: DT: Move reset controller constants into common location By popular vote, the DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the mediatek reset constants in there, too, to avoid confusion. Signed-off-by: Philipp Zabel Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt | 2 +- Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt index f6cd3e4..aaf8d14 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt @@ -18,7 +18,7 @@ The available clocks are defined in dt-bindings/clock/mt*-clk.h. Also it uses the common reset controller binding from Documentation/devicetree/bindings/reset/reset.txt. The available reset outputs are defined in -dt-bindings/reset-controller/mt*-resets.h +dt-bindings/reset/mt*-resets.h Example: diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt index f25b854..2f6ff86 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.txt @@ -18,7 +18,7 @@ The available clocks are defined in dt-bindings/clock/mt*-clk.h. Also it uses the common reset controller binding from Documentation/devicetree/bindings/reset/reset.txt. The available reset outputs are defined in -dt-bindings/reset-controller/mt*-resets.h +dt-bindings/reset/mt*-resets.h Example: -- cgit v1.1 From 15be8179e46aa8adc303f8585acd3c626ca678dc Mon Sep 17 00:00:00 2001 From: Ilya Ledvich Date: Tue, 24 Nov 2015 16:02:08 +0200 Subject: ARM: dts: cm-t335: add initial support Add basic support for CompuLab cm-t335 module based on AM335X SoC. CM-T335 is a tiny computer-on-module (CoM) / system-on-module (SoM) The module is built around the Texas Instruments Sitara AM3352/4 system-on-chip. The CPU is supplemented with up-to 512MB DDR3 and up-to 1GB of on-board NAND storage, WiFi connected to SPI, Bluetooth, Analog audio, Gigabit Ethernet, CAN bus. Current patch adds support: UART0 and GPIO LED Detailed description can be found at the module site: http://www.compulab.co.il/products/computer-on-modules/cm-t335/ Signed-off-by: Ilya Ledvich [uri.mashiach@compulab.co.il: the default RAM amount reduced to 128MB to support also the minimal module configuration] Signed-off-by: Uri Mashiach Acked-by: Igor Grinberg Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/omap.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index 9f4e513..2154f97 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -138,6 +138,9 @@ Boards: - AM335X phyBOARD-WEGA: Single Board Computer dev kit compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx" +- AM335X CM-T335 : System On Module, built around the Sitara AM3352/4 + compatible = "compulab,cm-t335", "ti,am33xx" + - OMAP5 EVM : Evaluation Module compatible = "ti,omap5-evm", "ti,omap5" -- cgit v1.1 From 8e6ebfaa9b384088002baa10f7534efa73a0794e Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Tue, 27 Oct 2015 13:36:36 +0100 Subject: regulator: tps65217: remove tps65217.dtsi file remove tps65217.dtsi and adapt all boards, which used it. Signed-off-by: Heiko Schocher Tested-by: Keerthy Acked-by: Mark Brown Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/regulator/tps65217.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/regulator/tps65217.txt b/Documentation/devicetree/bindings/regulator/tps65217.txt index 4f05d20..d181096 100644 --- a/Documentation/devicetree/bindings/regulator/tps65217.txt +++ b/Documentation/devicetree/bindings/regulator/tps65217.txt @@ -26,7 +26,11 @@ Example: ti,pmic-shutdown-controller; regulators { + #address-cells = <1>; + #size-cells = <0>; + dcdc1_reg: dcdc1 { + reg = <0>; regulator-min-microvolt = <900000>; regulator-max-microvolt = <1800000>; regulator-boot-on; @@ -34,6 +38,7 @@ Example: }; dcdc2_reg: dcdc2 { + reg = <1>; regulator-min-microvolt = <900000>; regulator-max-microvolt = <3300000>; regulator-boot-on; @@ -41,6 +46,7 @@ Example: }; dcdc3_reg: dcc3 { + reg = <2>; regulator-min-microvolt = <900000>; regulator-max-microvolt = <1500000>; regulator-boot-on; @@ -48,6 +54,7 @@ Example: }; ldo1_reg: ldo1 { + reg = <3>; regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3300000>; regulator-boot-on; @@ -55,6 +62,7 @@ Example: }; ldo2_reg: ldo2 { + reg = <4>; regulator-min-microvolt = <900000>; regulator-max-microvolt = <3300000>; regulator-boot-on; @@ -62,6 +70,7 @@ Example: }; ldo3_reg: ldo3 { + reg = <5>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; @@ -69,6 +78,7 @@ Example: }; ldo4_reg: ldo4 { + reg = <6>; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-boot-on; -- cgit v1.1 From 6ea78309ad3ef6bbc6da69da7357d23d15c21fd5 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Mon, 30 Nov 2015 15:29:11 +0100 Subject: ARM: dts: rockchip: add veyron-brain board Similar to pinky, brain is a development model and probably also nearing extinction. But to keep pinky from being lonely I'll keep the two brain boards around as well, especially as they as well have easily accessible dut-connectors. Signed-off-by: Heiko Stuebner For the license change: Acked-by: Brian Norris --- Documentation/devicetree/bindings/arm/rockchip.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 8e985dd..2f8b35a 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -35,6 +35,11 @@ Rockchip platforms device tree bindings Required root node properties: - compatible = "netxeon,r89", "rockchip,rk3288"; +- Google Brain (dev-board): + Required root node properties: + - compatible = "google,veyron-brain-rev0", "google,veyron-brain", + "google,veyron", "rockchip,rk3288"; + - Google Jaq (Haier Chromebook 11 and more): Required root node properties: - compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", -- cgit v1.1 From 0e1410dda74ef1834916ce60d646ce13cfafb314 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Tue, 1 Dec 2015 17:03:04 +0100 Subject: ARM: dts: rockchip: add veyron-mickey board Also known as the Asus Chromebit. Signed-off-by: Chris Zhong Tested-by: Caesar Wang For the license change: Acked-by: Brian Norris Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.txt | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 2f8b35a..2fa0a21 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -54,6 +54,15 @@ Rockchip platforms device tree bindings "google,veyron-jerry-rev3", "google,veyron-jerry", "google,veyron", "rockchip,rk3288"; +- Google Mickey (Asus Chromebit CS10): + Required root node properties: + - compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7", + "google,veyron-mickey-rev6", "google,veyron-mickey-rev5", + "google,veyron-mickey-rev4", "google,veyron-mickey-rev3", + "google,veyron-mickey-rev2", "google,veyron-mickey-rev1", + "google,veyron-mickey-rev0", "google,veyron-mickey", + "google,veyron", "rockchip,rk3288"; + - Google Minnie (Asus Chromebook Flip C100P): Required root node properties: - compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3", -- cgit v1.1 From 686c47f1300534439fd550e4cbfe1776abceab5a Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Tue, 1 Dec 2015 15:54:56 +0200 Subject: ARM: dts: am437x: cm-t43: add basic support for sbc-t43 Add basic support for SBC-T43: a CM-T43 based single board computer. CM-T43 is an AM437x based System-on-Module designed to serve as a building block in embedded applications. SBC-T43 is composed of CM-T43 module on top of the SB-SOM-T43 baseboard. Basic support includes UART, GPIO, and I2C. Signed-off-by: Nikita Kiryanov Acked-by: Rob Herring Cc: Tony Lindgren Cc: Benoit Cousson Cc: Rob Herring Cc: Mark Rutland Cc: Pawel Moll Cc: Igor Grinberg Cc: Dmitry Lifshitz Cc: Ian Campbell Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/omap.txt | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index 2154f97..f003741 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -144,6 +144,12 @@ Boards: - OMAP5 EVM : Evaluation Module compatible = "ti,omap5-evm", "ti,omap5" +- AM437x CM-T43 + compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43" + +- AM437x SBC-T43 + compatible = "compulab,am437x-sbc-t43", "compulab,am437x-cm-t43", "ti,am4372", "ti,am43" + - AM43x EPOS EVM compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43" -- cgit v1.1 From 02fc7720c627274c66d253c6c4671deec546394a Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Tue, 1 Dec 2015 15:55:07 +0200 Subject: ARM: dts: sb-som: introduce SB-SOM baseboard CompuLab SB-SOM baseboard is a carrier board for multiple arm-based SoMs. It currently supports (with minor adjustments to assembly) CM-T43, CM-T54, and CM-QS600 modules. It is a building block in the SBC-T43 single board computer, which consists of cm-t43 on top of sb-som-t43. Signed-off-by: Nikita Kiryanov Cc: Tony Lindgren Cc: Benoit Cousson Cc: Mark Rutland Cc: Pawel Moll Cc: Igor Grinberg Cc: Dmitry Lifshitz Cc: Ian Campbell Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/compulab-boards.txt | 5 +++++ .../devicetree/bindings/display/panel/startek,startek-kd050c.txt | 4 ++++ Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 3 files changed, 10 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/compulab-boards.txt create mode 100644 Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/compulab-boards.txt b/Documentation/devicetree/bindings/arm/compulab-boards.txt new file mode 100644 index 0000000..71172d5 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/compulab-boards.txt @@ -0,0 +1,5 @@ +CompuLab SB-SOM is a multi-module baseboard capable of carrying CM-T43, CM-T54, +and CM-QS600 modules with minor modifications to the SB-SOM assembly. + +Required root node properties: + - compatible = should be "compulab,sb-som" diff --git a/Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt b/Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt new file mode 100644 index 0000000..70cd8d1 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/startek,startek-kd050c.txt @@ -0,0 +1,4 @@ +Startek Electronic Technology Co. KD050C 5.0" WVGA TFT LCD panel + +Required properties: +- compatible: should be "startek,startek-kd050c" diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 55df1d4..409b134 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -218,6 +218,7 @@ sony Sony Corporation spansion Spansion Inc. sprd Spreadtrum Communications Inc. st STMicroelectronics +startek Startek ste ST-Ericsson stericsson ST-Ericsson synology Synology, Inc. -- cgit v1.1 From 387450fc882ea24462b53e85b89d88a51aafa3aa Mon Sep 17 00:00:00 2001 From: Dmitry Lifshitz Date: Tue, 1 Dec 2015 20:03:03 +0200 Subject: ARM: dts: am57xx: cl-som-am57x: add basic module support Add support for CompuLab CM-SOM-AM57X board. CL-SOM-AM57x is a miniature System-on-Module (SoM) based on TI Sitara AM57x ARM Cortex-A15 System-on-Chip family. https://www.compulab.co.il/products/computer-on-modules/cl-som-am57x-ti-am5728-am5718-system-on-module/ Add basic DT support for standalone module (without a carrier board): * Memory configuration * Heartbeat led * I2C1 and I2C4 * PMIC * SATA Signed-off-by: Dmitry Lifshitz Acked-by: Igor Grinberg Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/omap.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index f003741..1b9cae5 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -159,6 +159,9 @@ Boards: - AM437x SK EVM: AM437x StarterKit Evaluation Module compatible = "ti,am437x-sk-evm", "ti,am4372", "ti,am43" +- AM57XX CL-SOM-AM57x + compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" + - DRA742 EVM: Software Development Board for DRA742 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7" -- cgit v1.1 From e1fdd060f08df588a577b9fd969e85878da4d610 Mon Sep 17 00:00:00 2001 From: Dmitry Lifshitz Date: Tue, 1 Dec 2015 20:03:13 +0200 Subject: ARM: dts: am57xx: sbc-am57x: add basic board support SBC-AM57x is a single board computer designed for industrial and embedded applications. It is based on the Texas Instruments Sitara AM57x system-on-chip family. SBC-AM57x is implemented with the CL-SOM-AM57x computer-on-module providing most of the functions, and SB-SOM-AM57x carrier board providing additional peripheral functions and connectors. https://www.compulab.co.il/products/sbcs/sbc-am57x-ti-am5728-am5718-single-board-computer/ https://www.compulab.co.il/products/computer-on-modules/cl-som-am57x-ti-am5728-am5718-system-on-module/ Add basic board support, including UART3, used as a serial console. Signed-off-by: Dmitry Lifshitz Acked-by: Igor Grinberg Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/omap.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index 1b9cae5..0b2c946 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -162,6 +162,9 @@ Boards: - AM57XX CL-SOM-AM57x compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" +- AM57XX SBC-AM57x + compatible = "compulab,sbc-am57x", "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7" + - DRA742 EVM: Software Development Board for DRA742 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7" -- cgit v1.1 From 5d3dc3938ee4649cbc47d1fd6f5716e798782ea5 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 29 Oct 2015 18:23:17 -0700 Subject: clk: iproc: Extend binding to cover BCM63138 Broadcom BCM63138 DSL SoCs have the same ARMPLL clocking infrastructure as the Cygnus and iProc chips, add a dedicated compatible string and document that the ARMPLL node is a valid node for this chip. Acked-by: Rob Herring Signed-off-by: Florian Fainelli Signed-off-by: Stephen Boyd --- Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt index ede65a5..0b35e71 100644 --- a/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt +++ b/Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt @@ -208,3 +208,8 @@ These clock IDs are defined in: ch3_unused lcpll_ports 4 BCM_NS2_LCPLL_PORTS_CH3_UNUSED ch4_unused lcpll_ports 5 BCM_NS2_LCPLL_PORTS_CH4_UNUSED ch5_unused lcpll_ports 6 BCM_NS2_LCPLL_PORTS_CH5_UNUSED + +BCM63138 +-------- +PLL and leaf clock compatible strings for BCM63138 are: + "brcm,bcm63138-armpll" -- cgit v1.1 From c6664ca0a368130efd6c337c1e1c298cb6b128e8 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 6 Dec 2015 23:28:26 +0000 Subject: dt-bindings: add Marvell core PLL and clock divider PMU documentation Add documentation for the Marvell clock divider driver, which is used to source clocks for the AXI bus, video decoder, GPU and LCD blocks. Acked-by: Andrew Lunn Acked-by: Sebastian Hesselbarth Acked-by: Rob Herring Signed-off-by: Russell King Signed-off-by: Gregory CLEMENT --- .../bindings/clock/dove-divider-clock.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/dove-divider-clock.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/clock/dove-divider-clock.txt b/Documentation/devicetree/bindings/clock/dove-divider-clock.txt new file mode 100644 index 0000000..e3eb0f6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/dove-divider-clock.txt @@ -0,0 +1,28 @@ +PLL divider based Dove clocks + +Marvell Dove has a 2GHz PLL, which feeds into a set of dividers to provide +high speed clocks for a number of peripherals. These dividers are part of +the PMU, and thus this node should be a child of the PMU node. + +The following clocks are provided: + +ID Clock +------------- +0 AXI bus clock +1 GPU clock +2 VMeta clock +3 LCD clock + +Required properties: +- compatible : shall be "marvell,dove-divider-clock" +- reg : shall be the register address of the Core PLL and Clock Divider + Control 0 register. This will cover that register, as well as the + Core PLL and Clock Divider Control 1 register. Thus, it will have + a size of 8. +- #clock-cells : from common clock binding; shall be set to 1 + +divider_clk: core-clock@0064 { + compatible = "marvell,dove-divider-clock"; + reg = <0x0064 0x8>; + #clock-cells = <1>; +}; -- cgit v1.1 From 9cfc5c90ad38c8fc11bfd39de42a107da00871ba Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 6 Dec 2015 23:52:21 +0000 Subject: dt-bindings: add Marvell PMU documentation Add the required DT binding documentation for the Marvell PMU driver. Acked-by: Rob Herring Acked-by: Arnd Bergmann Signed-off-by: Russell King Signed-off-by: Gregory CLEMENT --- Documentation/devicetree/bindings/soc/dove/pmu.txt | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/dove/pmu.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/soc/dove/pmu.txt b/Documentation/devicetree/bindings/soc/dove/pmu.txt new file mode 100644 index 0000000..edd40b7 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/dove/pmu.txt @@ -0,0 +1,56 @@ +Device Tree bindings for Marvell PMU + +Required properties: + - compatible: value should be "marvell,dove-pmu". + May also include "simple-bus" if there are child devices, in which + case the ranges node is required. + - reg: two base addresses and sizes of the PM controller and PMU. + - interrupts: single interrupt number for the PMU interrupt + - interrupt-controller: must be specified as the PMU itself is an + interrupt controller. + - #interrupt-cells: must be 1. + - #reset-cells: must be 1. + - domains: sub-node containing domain descriptions + +Optional properties: + - ranges: defines the address mapping for child devices, as per the + standard property of this name. Required when compatible includes + "simple-bus". + +Power domain descriptions are listed as child nodes of the "domains" +sub-node. Each domain has the following properties: + +Required properties: + - #power-domain-cells: must be 0. + +Optional properties: + - marvell,pmu_pwr_mask: specifies the mask value for PMU power register + - marvell,pmu_iso_mask: specifies the mask value for PMU isolation register + - resets: points to the reset manager (PMU node) and reset index. + +Example: + + pmu: power-management@d0000 { + compatible = "marvell,dove-pmu"; + reg = <0xd0000 0x8000>, <0xd8000 0x8000>; + interrupts = <33>; + interrupt-controller; + #interrupt-cells = <1>; + #reset-cells = <1>; + + domains { + vpu_domain: vpu-domain { + #power-domain-cells = <0>; + marvell,pmu_pwr_mask = <0x00000008>; + marvell,pmu_iso_mask = <0x00000001>; + resets = <&pmu 16>; + }; + + gpu_domain: gpu-domain { + #power-domain-cells = <0>; + marvell,pmu_pwr_mask = <0x00000004>; + marvell,pmu_iso_mask = <0x00000002>; + resets = <&pmu 18>; + }; + }; + }; -- cgit v1.1 From 7418111f88dfb92b33d9f765acba5fb45aefabeb Mon Sep 17 00:00:00 2001 From: Kapil Hali Date: Sat, 5 Dec 2015 06:53:40 -0500 Subject: dt-bindings: add SMP enable-method for Broadcom NSP Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's Northstar Plus CPU to the 32-bit ARM CPU device tree binding documentation file and create a new binding documentation for Northstar Plus CPU. Signed-off-by: Kapil Hali Acked-by: Rob Herring Signed-off-by: Florian Fainelli --- .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++ Documentation/devicetree/bindings/arm/cpus.txt | 1 + 2 files changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt new file mode 100644 index 0000000..677ef9d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt @@ -0,0 +1,39 @@ +Broadcom Northstar Plus SoC CPU Enable Method +--------------------------------------------- +This binding defines the enable method used for starting secondary +CPU in the following Broadcom SoCs: + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 + +The enable method is specified by defining the following required +properties in the corresponding secondary "cpu" device tree node: + - enable-method = "brcm,bcm-nsp-smp"; + - secondary-boot-reg = <...>; + +The secondary-boot-reg property is a u32 value that specifies the +physical address of the register which should hold the common +entry point for a secondary CPU. This entry is cpu node specific +and should be added per cpu. E.g., in case of NSP (BCM58625) which +is a dual core CPU SoC, this entry should be added to cpu1 node. + + +Example: + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + enable-method = "brcm,bcm-nsp-smp"; + secondary-boot-reg = <0xffff042c>; + reg = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 3a07a87..d191554 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -190,6 +190,7 @@ nodes to be present and contain the properties described below. "allwinner,sun6i-a31" "allwinner,sun8i-a23" "arm,psci" + "brcm,bcm-nsp-smp" "brcm,brahma-b15" "marvell,armada-375-smp" "marvell,armada-380-smp" -- cgit v1.1 From eab5c6bc5210e34f34bd93191c19cfbe762c2cad Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 24 Sep 2015 18:24:59 -0700 Subject: dt-binding: soc: qcom: Add Qualcomm SMSM device tree documentation This documents a device tree binding for the Qualcomm Shared Memory State Machine. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../devicetree/bindings/soc/qcom/qcom,smsm.txt | 104 +++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt new file mode 100644 index 0000000..a6634c7 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt @@ -0,0 +1,104 @@ +Qualcomm Shared Memory State Machine + +The Shared Memory State Machine facilitates broadcasting of single bit state +information between the processors in a Qualcomm SoC. Each processor is +assigned 32 bits of state that can be modified. A processor can through a +matrix of bitmaps signal subscription of notifications upon changes to a +certain bit owned by a certain remote processor. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,smsm" + +- qcom,ipc-N: + Usage: required + Value type: + Definition: three entries specifying the outgoing ipc bit used for + signaling the N:th remote processor + - phandle to a syscon node representing the apcs registers + - u32 representing offset to the register within the syscon + - u32 representing the ipc bit within the register + +- qcom,local-host: + Usage: optional + Value type: + Definition: identifier of the local processor in the list of hosts, or + in other words specifier of the column in the subscription + matrix representing the local processor + defaults to host 0 + +- #address-cells: + Usage: required + Value type: + Definition: must be 1 + +- #size-cells: + Usage: required + Value type: + Definition: must be 0 + += SUBNODES +Each processor's state bits are described by a subnode of the smsm device node. +Nodes can either be flagged as an interrupt-controller to denote a remote +processor's state bits or the local processors bits. The node names are not +important. + +- reg: + Usage: required + Value type: + Definition: specifies the offset, in words, of the first bit for this + entry + +- #qcom,state-cells: + Usage: required for local entry + Value type: + Definition: must be 1 - denotes bit number + +- interrupt-controller: + Usage: required for remote entries + Value type: + Definition: marks the entry as a interrupt-controller and the state bits + to belong to a remote processor + +- #interrupt-cells: + Usage: required for remote entries + Value type: + Definition: must be 2 - denotes bit number and IRQ flags + +- interrupts: + Usage: required for remote entries + Value type: + Definition: one entry specifying remote IRQ used by the remote processor + to signal changes of its state bits + + += EXAMPLE +The following example shows the SMEM setup for controlling properties of the +wireless processor, defined from the 8974 apps processor's point-of-view. It +encompasses one outbound entry and the outgoing interrupt for the wireless +processor. + +smsm { + compatible = "qcom,smsm"; + + #address-cells = <1>; + #size-cells = <0>; + + qcom,ipc-3 = <&apcs 8 19>; + + apps_smsm: apps@0 { + reg = <0>; + + #qcom,state-cells = <1>; + }; + + wcnss_smsm: wcnss@7 { + reg = <7>; + interrupts = <0 144 1>; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; -- cgit v1.1 From 2f5de46c598caba441da75b679f43def795936e7 Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Thu, 24 Sep 2015 18:25:00 -0700 Subject: dt-binding: soc: qcom: Introduce qcom, smp2p binding documentation Introduce binding documentation for the Qualcomm Shared Memory Point 2 Point protocol. Signed-off-by: Bjorn Andersson Signed-off-by: Andy Gross --- .../devicetree/bindings/soc/qcom/qcom,smp2p.txt | 104 +++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt new file mode 100644 index 0000000..5cc82b8 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt @@ -0,0 +1,104 @@ +Qualcomm Shared Memory Point 2 Point binding + +The Shared Memory Point to Point (SMP2P) protocol facilitates communication of +a single 32-bit value between two processors. Each value has a single writer +(the local side) and a single reader (the remote side). Values are uniquely +identified in the system by the directed edge (local processor ID to remote +processor ID) and a string identifier. + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,smp2p" + +- interrupts: + Usage: required + Value type: + Definition: one entry specifying the smp2p notification interrupt + +- qcom,ipc: + Usage: required + Value type: + Definition: three entries specifying the outgoing ipc bit used for + signaling the remote end of the smp2p edge: + - phandle to a syscon node representing the apcs registers + - u32 representing offset to the register within the syscon + - u32 representing the ipc bit within the register + +- qcom,smem: + Usage: required + Value type: + Definition: two identifiers of the inbound and outbound smem items used + for this edge + +- qcom,local-pid: + Usage: required + Value type: + Definition: specifies the identfier of the local endpoint of this edge + +- qcom,remote-pid: + Usage: required + Value type: + Definition: specifies the identfier of the remote endpoint of this edge + += SUBNODES +Each SMP2P pair contain a set of inbound and outbound entries, these are +described in subnodes of the smp2p device node. The node names are not +important. + +- qcom,entry-name: + Usage: required + Value type: + Definition: specifies the name of this entry, for inbound entries this + will be used to match against the remotely allocated entry + and for outbound entries this name is used for allocating + entries + +- interrupt-controller: + Usage: required for incoming entries + Value type: + Definition: marks the entry as inbound; the node should be specified + as a two cell interrupt-controller as defined in + "../interrupt-controller/interrupts.txt" + If not specified this node will denote the outgoing entry + +- #interrupt-cells: + Usage: required for incoming entries + Value type: + Definition: must be 2 - denoting the bit in the entry and IRQ flags + +- #qcom,state-cells: + Usage: required for outgoing entries + Value type: + Definition: must be 1 - denoting the bit in the entry + += EXAMPLE +The following example shows the SMP2P setup with the wireless processor, +defined from the 8974 apps processor's point-of-view. It encompasses one +inbound and one outbound entry: + +wcnss-smp2p { + compatible = "qcom,smp2p"; + qcom,smem = <431>, <451>; + + interrupts = <0 143 1>; + + qcom,ipc = <&apcs 8 18>; + + qcom,local-pid = <0>; + qcom,remote-pid = <4>; + + wcnss_smp2p_out: master-kernel { + qcom,entry-name = "master-kernel"; + + #qcom,state-cells = <1>; + }; + + wcnss_smp2p_in: slave-kernel { + qcom,entry-name = "slave-kernel"; + + interrupt-controller; + #interrupt-cells = <2>; + }; +}; -- cgit v1.1 From eb0fc0d6ae99305a5aecbcf8a67cce838547d638 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 30 Nov 2015 11:41:39 +0100 Subject: dt-bindings: soc: Add supplies for Mediatek SCPSYS unit The power domains in the SCPSYS unit are supplied by regulators. Add the properties for them to the binding document. Signed-off-by: Sascha Hauer Cc: devicetree@vger.kernel.org Acked-by: Rob Herring Signed-off-by: Matthias Brugger --- Documentation/devicetree/bindings/soc/mediatek/scpsys.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt index a6c8afc..e8f15e340 100644 --- a/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt +++ b/Documentation/devicetree/bindings/soc/mediatek/scpsys.txt @@ -21,6 +21,18 @@ Required properties: These are the clocks which hardware needs to be enabled before enabling certain power domains. +Optional properties: +- vdec-supply: Power supply for the vdec power domain +- venc-supply: Power supply for the venc power domain +- isp-supply: Power supply for the isp power domain +- mm-supply: Power supply for the mm power domain +- venc_lt-supply: Power supply for the venc_lt power domain +- audio-supply: Power supply for the audio power domain +- usb-supply: Power supply for the usb power domain +- mfg_async-supply: Power supply for the mfg_async power domain +- mfg_2d-supply: Power supply for the mfg_2d power domain +- mfg-supply: Power supply for the mfg power domain + Example: scpsys: scpsys@10006000 { -- cgit v1.1 From 67e044a510d0e00656ae2ab4f0ee30971a2f40e7 Mon Sep 17 00:00:00 2001 From: Jeffy Chen Date: Fri, 11 Dec 2015 09:30:52 +0800 Subject: ARM: dts: rockchip: add rk3228-evb board Initial release for rk3228 sdk board. Signed-off-by: Jeffy Chen Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 2fa0a21..56a12de 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -86,3 +86,7 @@ Rockchip platforms device tree bindings - Rockchip R88 board: Required root node properties: - compatible = "rockchip,r88", "rockchip,rk3368"; + +- Rockchip RK3228 Evaluation board: + Required root node properties: + - compatible = "rockchip,rk3228-evb", "rockchip,rk3228"; -- cgit v1.1 From d4eaf73b629fafda9c1a14fd72900dd0cfb610b3 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 7 Oct 2015 14:32:59 +0200 Subject: ARM: add DT bindings for the ARM11MPCore CPU cluster The ARM11MPCore has a Snoop Control Unit, but references to it were missing from the DT specification. Define a compatible string for this unit. Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/arm/scu.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/scu.txt b/Documentation/devicetree/bindings/arm/scu.txt index c447680..08a5878 100644 --- a/Documentation/devicetree/bindings/arm/scu.txt +++ b/Documentation/devicetree/bindings/arm/scu.txt @@ -10,10 +10,13 @@ References: Revision r2p0 - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual Revision r0p1 +- ARM11 MPCore: see DDI0360F ARM 11 MPCore Processor Technical Reference + Manial Revision r2p0 - compatible : Should be: "arm,cortex-a9-scu" "arm,cortex-a5-scu" + "arm,arm11mp-scu" - reg : Specify the base address and the size of the SCU register window. -- cgit v1.1 From 1478cebfa0b472f797134d6a1d6d7e1222fd1a96 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 13 Oct 2015 14:27:30 +0200 Subject: clk: add ARM syscon ICST device tree bindings This adds the device tree bindings for the ARM Syscon ICST oscillators, which is a register-level interface to the Integrated Device Technology (IDT) ICS525 and ICS307 serially programmable oscillators. Cc: devicetree@vger.kernel.org Cc: Michael Turquette Cc: linux-clk@vger.kernel.org Acked-by: Stephen Boyd Acked-by: Rob Herring Signed-off-by: Linus Walleij --- .../devicetree/bindings/clock/arm-syscon-icst.txt | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/arm-syscon-icst.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt new file mode 100644 index 0000000..8b7177c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/arm-syscon-icst.txt @@ -0,0 +1,40 @@ +ARM System Controller ICST clocks + +The ICS525 and ICS307 oscillators are produced by Integrated Devices +Technology (IDT). ARM integrated these oscillators deeply into their +reference designs by adding special control registers that manage such +oscillators to their system controllers. + +The ARM system controller contains logic to serialize and initialize +an ICST clock request after a write to the 32 bit register at an offset +into the system controller. Furthermore, to even be able to alter one of +these frequencies, the system controller must first be unlocked by +writing a special token to another offset in the system controller. + +The ICST oscillator must be provided inside a system controller node. + +Required properties: +- lock-offset: the offset address into the system controller where the + unlocking register is located +- vco-offset: the offset address into the system controller where the + ICST control register is located (even 32 bit address) +- compatible: must be one of "arm,syscon-icst525" or "arm,syscon-icst307" +- #clock-cells: must be <0> +- clocks: parent clock, since the ICST needs a parent clock to derive its + frequency from, this attribute is compulsory. + +Example: + +syscon: syscon@10000000 { + compatible = "syscon"; + reg = <0x10000000 0x1000>; + + oscclk0: osc0@0c { + compatible = "arm,syscon-icst307"; + #clock-cells = <0>; + lock-offset = <0x20>; + vco-offset = <0x0c>; + clocks = <&xtal24mhz>; + }; + (...) +}; -- cgit v1.1 From 994a5814eb7e6cac316546989b9f69d10626dfd2 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 27 Nov 2015 00:00:54 +0100 Subject: ARM: mvebu: add kirkwood compatibles for cloudengine boards This adds the compatible strings for Cloudengine PogoPlug E02 and series 4. The former already has a devicetree in the kernel. Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij Acked-by: Rob Herring Signed-off-by: Gregory CLEMENT --- Documentation/devicetree/bindings/arm/marvell,kirkwood.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt index 5171ad8..ab0c9cd 100644 --- a/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt +++ b/Documentation/devicetree/bindings/arm/marvell,kirkwood.txt @@ -24,6 +24,8 @@ board. Currently known boards are: "buffalo,lswxl" "buffalo,lsxhl" "buffalo,lsxl" +"cloudengines,pogo02" +"cloudengines,pogoplugv4" "dlink,dns-320" "dlink,dns-320-a1" "dlink,dns-325" -- cgit v1.1 From c6135a6fd1576e5daee67b0b2207f035a3eb4de0 Mon Sep 17 00:00:00 2001 From: Uri Mashiach Date: Sun, 13 Dec 2015 10:55:36 +0200 Subject: ARM: dts: cm-t335: add support for SBC-T335 Add basic support for the SBC-T335. CompuLab SBC-T335 is a single baseboard computer. The SBC-T335 is based on the Texas Instruments Cortex-A8 Sitara AM3354 SoC. Signed-off-by: Uri Mashiach Acked-by: Igor Grinberg Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/arm/omap/omap.txt | 3 +++ 1 file changed, 3 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index 0b2c946..a2bd593 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -141,6 +141,9 @@ Boards: - AM335X CM-T335 : System On Module, built around the Sitara AM3352/4 compatible = "compulab,cm-t335", "ti,am33xx" +- AM335X SBC-T335 : single board computer, built around the Sitara AM3352/4 + compatible = "compulab,sbc-t335", "compulab,cm-t335", "ti,am33xx" + - OMAP5 EVM : Evaluation Module compatible = "ti,omap5-evm", "ti,omap5" -- cgit v1.1 From 1929d0b5a821ed5bec3d1e683e63851fc51d05ee Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Fri, 11 Dec 2015 09:39:59 +0530 Subject: ARM: dts: DRA7: add entry for qspi mmap region Add qspi memory mapped region entries for DRA7xx based SoCs. Also, update the binding documents for the controller to document this change. Signed-off-by: Vignesh R Acked-by: Rob Herring Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/spi/ti_qspi.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index 601a360..809c3f3 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -15,6 +15,10 @@ Recommended properties: - spi-max-frequency: Definition as per Documentation/devicetree/bindings/spi/spi-bus.txt +Optional properties: +- syscon-chipselects: Handle to system control region contains QSPI + chipselect register and offset of that register. + Example: qspi: qspi@4b300000 { @@ -26,3 +30,16 @@ qspi: qspi@4b300000 { spi-max-frequency = <25000000>; ti,hwmods = "qspi"; }; + +For dra7xx: +qspi: qspi@4b300000 { + compatible = "ti,dra7xxx-qspi"; + reg = <0x4b300000 0x100>, + <0x5c000000 0x4000000>, + reg-names = "qspi_base", "qspi_mmap"; + syscon-chipselects = <&scm_conf 0x558>; + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <48000000>; + ti,hwmods = "qspi"; +}; -- cgit v1.1 From 2acb6c3ef81486781ffe08145c17b7dc1904e741 Mon Sep 17 00:00:00 2001 From: Vignesh R Date: Fri, 11 Dec 2015 09:40:00 +0530 Subject: ARM: dts: AM4372: add entry for qspi mmap region Add qspi memory mapped region entries for AM43xx based SoCs. Also, update the binding documents for the controller to document this change. Acked-by: Rob Herring Signed-off-by: Vignesh R Signed-off-by: Tony Lindgren --- Documentation/devicetree/bindings/spi/ti_qspi.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index 809c3f3..cc8304a 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -21,9 +21,10 @@ Optional properties: Example: +For am4372: qspi: qspi@4b300000 { - compatible = "ti,dra7xxx-qspi"; - reg = <0x47900000 0x100>, <0x30000000 0x3ffffff>; + compatible = "ti,am4372-qspi"; + reg = <0x47900000 0x100>, <0x30000000 0x4000000>; reg-names = "qspi_base", "qspi_mmap"; #address-cells = <1>; #size-cells = <0>; -- cgit v1.1 From 94cf32b97bbb043b99e914aacff1a6d7833daf58 Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Thu, 17 Dec 2015 22:21:50 +0800 Subject: ARM: dts: rockchip: add the kylin board for rk3036 This patchset is the initiation version to try work for kylin board. Signed-off-by: Caesar Wang Reviewed-by: Kees Cook Acked-by: Rob Herring Signed-off-by: Heiko Stuebner --- Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 56a12de..c980b2b 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -1,6 +1,10 @@ Rockchip platforms device tree bindings --------------------------------------- +- Kylin RK3036 board: + Required root node properties: + - compatible = "rockchip,kylin-rk3036", "rockchip,rk3036"; + - MarsBoard RK3066 board: Required root node properties: - compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a"; -- cgit v1.1 From 328c9d7e532801dcaad5569364fe399b4eb52200 Mon Sep 17 00:00:00 2001 From: Damien Riegel Date: Fri, 11 Dec 2015 12:08:12 -0500 Subject: of: add vendor prefix for Technologic Systems Signed-off-by: Damien Riegel Acked-by: Lee Jones Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 55df1d4..4df1198 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -223,6 +223,7 @@ stericsson ST-Ericsson synology Synology, Inc. tbs TBS Technologies tcl Toby Churchill Ltd. +technologic Technologic Systems thine THine Electronics, Inc. ti Texas Instruments tlm Trusted Logic Mobility -- cgit v1.1 From 7ee70f23e9f8f974914b0c6e16bf79882df560c8 Mon Sep 17 00:00:00 2001 From: Damien Riegel Date: Fri, 11 Dec 2015 12:08:13 -0500 Subject: of: documentation: add bindings documentation for TS-4800 This adds the documentation for the TS-4800 by Technologic Systems. Signed-off-by: Damien Riegel Acked-by: Rob Herring Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/arm/technologic.txt | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/technologic.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/technologic.txt b/Documentation/devicetree/bindings/arm/technologic.txt new file mode 100644 index 0000000..8422988 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/technologic.txt @@ -0,0 +1,6 @@ +Technologic Systems Platforms Device Tree Bindings +-------------------------------------------------- + +TS-4800 board +Required root node properties: + - compatible = "technologic,imx51-ts4800", "fsl,imx51"; -- cgit v1.1 From 577bc8fbdb3a8c93a6b45663299d08637bb7bfe7 Mon Sep 17 00:00:00 2001 From: Sean Cross Date: Mon, 21 Dec 2015 21:07:47 +0800 Subject: devicetree: bindings: Add vendor prefix for Kosagi Add a vendor prefix for Sutajio Ko-Usagi PTE Ltd., which goes by the more common name of Kosagi. Signed-off-by: Sean Cross Signed-off-by: Marek Vasut Cc: Rob Herring Cc: Fabio Estevam Signed-off-by: Shawn Guo --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 4df1198..7db6f92 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -123,6 +123,7 @@ jedec JEDEC Solid State Technology Association karo Ka-Ro electronics GmbH keymile Keymile GmbH kinetic Kinetic Technologies +kosagi Sutajio Ko-Usagi PTE Ltd. lacie LaCie lantiq Lantiq Semiconductor lenovo Lenovo Group Ltd. -- cgit v1.1 From f038f586c368b1730f51edf2619010b3b348fada Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Wed, 18 Nov 2015 09:33:07 +0100 Subject: dt-bindings: remove deprecated compatible string from exynos-hdmi samsung,exynos5-hdmi compatible was marked as deprecated in Jun 2013. It was never used since then. Signed-off-by: Andrzej Hajda Reviewed-by: Gustavo Padovan Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt index 1fd8cf9..d474f59 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos_hdmi.txt @@ -2,10 +2,9 @@ Device-Tree bindings for drm hdmi driver Required properties: - compatible: value should be one among the following: - 1) "samsung,exynos5-hdmi" - 2) "samsung,exynos4210-hdmi" - 3) "samsung,exynos4212-hdmi" - 4) "samsung,exynos5420-hdmi" + 1) "samsung,exynos4210-hdmi" + 2) "samsung,exynos4212-hdmi" + 3) "samsung,exynos5420-hdmi" - reg: physical base address of the hdmi and length of memory mapped region. - interrupts: interrupt number to the cpu. -- cgit v1.1 From ea22446a9d170bf7f32bd7f99036e17df918f054 Mon Sep 17 00:00:00 2001 From: Carlo Caione Date: Sun, 8 Nov 2015 13:18:56 +0100 Subject: Documentation: watchdog: Add new bindings for meson8b We make the documentation not meson6 specific anymore and add the new binding for meson8b SoC. Signed-off-by: Carlo Caione --- Documentation/devicetree/bindings/watchdog/meson-wdt.txt | 13 +++++++++++++ Documentation/devicetree/bindings/watchdog/meson6-wdt.txt | 13 ------------- 2 files changed, 13 insertions(+), 13 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/meson-wdt.txt delete mode 100644 Documentation/devicetree/bindings/watchdog/meson6-wdt.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/watchdog/meson-wdt.txt b/Documentation/devicetree/bindings/watchdog/meson-wdt.txt new file mode 100644 index 0000000..ae70185 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/meson-wdt.txt @@ -0,0 +1,13 @@ +Meson SoCs Watchdog timer + +Required properties: + +- compatible : should be "amlogic,meson6-wdt" or "amlogic,meson8b-wdt" +- reg : Specifies base physical address and size of the registers. + +Example: + +wdt: watchdog@c1109900 { + compatible = "amlogic,meson6-wdt"; + reg = <0xc1109900 0x8>; +}; diff --git a/Documentation/devicetree/bindings/watchdog/meson6-wdt.txt b/Documentation/devicetree/bindings/watchdog/meson6-wdt.txt deleted file mode 100644 index 9200fc2..0000000 --- a/Documentation/devicetree/bindings/watchdog/meson6-wdt.txt +++ /dev/null @@ -1,13 +0,0 @@ -Meson SoCs Watchdog timer - -Required properties: - -- compatible : should be "amlogic,meson6-wdt" -- reg : Specifies base physical address and size of the registers. - -Example: - -wdt: watchdog@c1109900 { - compatible = "amlogic,meson6-wdt"; - reg = <0xc1109900 0x8>; -}; -- cgit v1.1 From 0c6623e35992c08d0462504253c669363d3f7ccb Mon Sep 17 00:00:00 2001 From: Ilya Ledvich Date: Tue, 22 Dec 2015 11:10:59 +0200 Subject: ARM: dts: compulab: add new board description Add description for newly introduced Compulab devices: - CL-SOM-iMX7 - SBC-iMX7 Signed-off-by: Ilya Ledvich Acked-by: Rob Herring Signed-off-by: Arnd Bergmann --- .../devicetree/bindings/arm/compulab-boards.txt | 24 ++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/arm/compulab-boards.txt b/Documentation/devicetree/bindings/arm/compulab-boards.txt index 71172d5..42a1028 100644 --- a/Documentation/devicetree/bindings/arm/compulab-boards.txt +++ b/Documentation/devicetree/bindings/arm/compulab-boards.txt @@ -1,5 +1,25 @@ -CompuLab SB-SOM is a multi-module baseboard capable of carrying CM-T43, CM-T54, -and CM-QS600 modules with minor modifications to the SB-SOM assembly. +CompuLab SB-SOM is a multi-module baseboard capable of carrying: + - CM-T43 + - CM-T54 + - CM-QS600 + - CL-SOM-AM57x + - CL-SOM-iMX7 +modules with minor modifications to the SB-SOM assembly. Required root node properties: - compatible = should be "compulab,sb-som" + +Compulab CL-SOM-iMX7 is a miniature System-on-Module (SoM) based on +Freescale i.MX7 ARM Cortex-A7 System-on-Chip. + +Required root node properties: + - compatible = "compulab,cl-som-imx7", "fsl,imx7d"; + +Compulab SBC-iMX7 is a single board computer based on the +Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with +the CL-SOM-iMX7 System-on-Module providing most of the functions, +and SB-SOM-iMX7 carrier board providing additional peripheral +functions and connectors. + +Required root node properties: + - compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d"; -- cgit v1.1