From 4d52b2acefdfceae0e47ed08324a96f511dc80b1 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Tue, 26 May 2015 14:42:57 +0200 Subject: clk: mvebu: add missing CESA gate clk Even if not documented in the datasheet, the Armada 370 SoC can actually gate the CESA (crypto engine) clock. Add an entry in the gating_desc table to be able to reference the CESA gateclk in the crypto node. Signed-off-by: Boris Brezillon Acked-by: Gregory CLEMENT Signed-off-by: Michael Turquette --- Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt index 31c7c0c..660e649 100644 --- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt +++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt @@ -19,6 +19,7 @@ ID Clock Peripheral 9 pex1 PCIe Cntrl 1 15 sata0 SATA Host 0 17 sdio SDHCI Host +23 crypto CESA (crypto engine) 25 tdm Time Division Mplx 28 ddr DDR Cntrl 30 sata1 SATA Host 0 -- cgit v1.1