From 48b7bde0f6d5fd08d046b583cfa0118ad74c6caf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=B3=20Bilski?= Date: Tue, 4 Jul 2006 17:50:57 +0200 Subject: [CPUFREQ] Longhaul - Workaround issues with APIC. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is no need to worry about local APIC. There is need to worry about I/O APIC, because I/O APIC is replacing good old 8259. According to Nehemiah datasheet VIA is using 3-wire bus to connect local APIC to I/O APIC. "[...] When IA32_APIC_BASE[11] is set to 0, processor APICs based on the 3-wire APIC bus cannot be generally re-enabled until a system hardware reset. The 3-wire bus looses track of arbitration that would be necessary for complete re-enabling. Certain (local) APIC functionality can be enabled. [...]" So we must set disable bit for each interrupt in I/O APIC registers. Same situation as for PIC - we must poke registers direcly. How to do this? I don't know. So at the moment it is better to fail. Signed-off-by: Rafał Bilski Signed-off-by: Dave Jones --- arch/i386/kernel/cpu/cpufreq/longhaul.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c index d735cb4..dfd243f 100644 --- a/arch/i386/kernel/cpu/cpufreq/longhaul.c +++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c @@ -688,6 +688,18 @@ static int __init longhaul_init(void) if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6) return -ENODEV; +#ifdef CONFIG_SMP + if (num_online_cpus() > 1) { + return -ENODEV; + printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n"); + } +#endif +#ifdef CONFIG_X86_IO_APIC + if (cpu_has_apic) { + printk(KERN_ERR PFX "APIC detected. Longhaul is currently broken in this configuration.\n"); + return -ENODEV; + } +#endif switch (c->x86_model) { case 6 ... 9: return cpufreq_register_driver(&longhaul_driver); -- cgit v1.1