From c54b7bbbd25600007d452909e6fac39fd36bbc98 Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Wed, 25 Jan 2012 00:56:05 +0100 Subject: ARM: at91: coding style fixes This patch is mindless and does only fix the line length. The purpose is to facilitate the review of the next patches. Signed-off-by: Daniel Lezcano Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/pm.h | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 218d816..caac65f 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -20,9 +20,12 @@ static inline u32 sdram_selfrefresh_enable(void) return saved_lpr; } -#define sdram_selfrefresh_disable(saved_lpr) at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ - : : "r" (0)) +#define sdram_selfrefresh_disable(saved_lpr) \ + at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) + +#define wait_for_interrupt_enable() \ + asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ + : : "r" (0)) #elif defined(CONFIG_ARCH_AT91SAM9G45) #include @@ -59,6 +62,7 @@ static inline u32 sdram_selfrefresh_enable(void) at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ } while (0) + #define wait_for_interrupt_enable() cpu_do_idle() #else @@ -79,11 +83,15 @@ static inline u32 sdram_selfrefresh_enable(void) saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR); lpr = saved_lpr & ~AT91_SDRAMC_LPCB; - at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); + at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | + AT91_SDRAMC_LPCB_SELF_REFRESH); return saved_lpr; } -#define sdram_selfrefresh_disable(saved_lpr) at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() cpu_do_idle() +#define sdram_selfrefresh_disable(saved_lpr) \ + at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) + +#define wait_for_interrupt_enable() \ + cpu_do_idle() #endif -- cgit v1.1 From fa50ae9c100225964eafc7214c70a8c08e70e50e Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Wed, 25 Jan 2012 00:56:06 +0100 Subject: ARM: at91: declare header name Add the header and define the macro to prevent multiple inclusion like the others headers. Signed-off-by: Daniel Lezcano Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/pm.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index caac65f..715813e 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -1,3 +1,16 @@ +/* + * AT91 Power Management + * + * Copyright (C) 2005 David Brownell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __ARCH_ARM_MACH_AT91_PM +#define __ARCH_ARM_MACH_AT91_PM + #ifdef CONFIG_ARCH_AT91RM9200 #include @@ -95,3 +108,5 @@ static inline u32 sdram_selfrefresh_enable(void) cpu_do_idle() #endif + +#endif -- cgit v1.1 From b59160f6c017bfe33d3483ed9a6120701644af8a Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Wed, 25 Jan 2012 00:56:07 +0100 Subject: ARM: at91: remove wait_for_interrupt definition All the "wait_for_interrupt" definition are aliases to cpu_do_idle. Only the rm9200 has an asm routine to switch to wfi. But the cpu_do_idle for this platform has exactly the same asm routine. arch/arm/mm/proc-arm920.S .. ENTRY(cpu_arm920_do_idle) mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt .. Then it is safe to invoke cpu_do_idle for this platform. As all the wait_for_interrupts are definition for cpu_do_idle, let's remove it and replace its invokation by cpu_do_idle. Signed-off-by: Daniel Lezcano Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/pm.c | 2 +- arch/arm/mach-at91/pm.h | 9 --------- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 87be5aa..d7e8d4c 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -262,7 +262,7 @@ static int at91_pm_enter(suspend_state_t state) : /* no input */ : "r0"); saved_lpr = sdram_selfrefresh_enable(); - wait_for_interrupt_enable(); + cpu_do_idle(); sdram_selfrefresh_disable(saved_lpr); break; diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 715813e..38f9a13 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -36,10 +36,6 @@ static inline u32 sdram_selfrefresh_enable(void) #define sdram_selfrefresh_disable(saved_lpr) \ at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() \ - asm volatile ("mcr p15, 0, %0, c7, c0, 4" \ - : : "r" (0)) - #elif defined(CONFIG_ARCH_AT91SAM9G45) #include @@ -76,8 +72,6 @@ static inline u32 sdram_selfrefresh_enable(void) at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ } while (0) -#define wait_for_interrupt_enable() cpu_do_idle() - #else #include @@ -104,9 +98,6 @@ static inline u32 sdram_selfrefresh_enable(void) #define sdram_selfrefresh_disable(saved_lpr) \ at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) -#define wait_for_interrupt_enable() \ - cpu_do_idle() - #endif #endif -- cgit v1.1 From 00482a4078f4ff0dd0638e7f2fd83e34cc402ff7 Mon Sep 17 00:00:00 2001 From: Daniel Lezcano Date: Wed, 25 Jan 2012 00:56:08 +0100 Subject: ARM: at91: implement the standby function for pm/cpuidle This patch groups the self-refresh on/cpu_do_idle/self-refresh off into a single 'standby' function. The standby routine for rm9200 has been turned into an asm routine to have a better control of the self refresh and to prevent a memory access when running this code. Draining the write buffer is done automatically when switching for the self refresh on sam9, so the instruction is added to the rm9200 only. Signed-off-by: Daniel Lezcano Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/cpuidle.c | 11 +++------ arch/arm/mach-at91/pm.c | 12 +--------- arch/arm/mach-at91/pm.h | 53 +++++++++++++++++++++++++------------------- 3 files changed, 34 insertions(+), 42 deletions(-) diff --git a/arch/arm/mach-at91/cpuidle.c b/arch/arm/mach-at91/cpuidle.c index a851e6c9..555d956 100644 --- a/arch/arm/mach-at91/cpuidle.c +++ b/arch/arm/mach-at91/cpuidle.c @@ -39,20 +39,15 @@ static int at91_enter_idle(struct cpuidle_device *dev, { struct timeval before, after; int idle_time; - u32 saved_lpr; local_irq_disable(); do_gettimeofday(&before); if (index == 0) /* Wait for interrupt state */ cpu_do_idle(); - else if (index == 1) { - asm("b 1f; .align 5; 1:"); - asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */ - saved_lpr = sdram_selfrefresh_enable(); - cpu_do_idle(); - sdram_selfrefresh_disable(saved_lpr); - } + else if (index == 1) + at91_standby(); + do_gettimeofday(&after); local_irq_enable(); idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC + diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index d7e8d4c..d554e67 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -198,7 +198,6 @@ extern u32 at91_slow_clock_sz; static int at91_pm_enter(suspend_state_t state) { - u32 saved_lpr; at91_gpio_suspend(); at91_irq_suspend(); @@ -254,16 +253,7 @@ static int at91_pm_enter(suspend_state_t state) * For ARM 926 based chips, this requirement is weaker * as at91sam9 can access a RAM in self-refresh mode. */ - asm volatile ( "mov r0, #0\n\t" - "b 1f\n\t" - ".align 5\n\t" - "1: mcr p15, 0, r0, c7, c10, 4\n\t" - : /* no output */ - : /* no input */ - : "r0"); - saved_lpr = sdram_selfrefresh_enable(); - cpu_do_idle(); - sdram_selfrefresh_disable(saved_lpr); + at91_standby(); break; case PM_SUSPEND_ON: diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 38f9a13..bba9ce1 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -24,17 +24,25 @@ * still in self-refresh is "not recommended", but seems to work. */ -static inline u32 sdram_selfrefresh_enable(void) +static inline void at91rm9200_standby(void) { - u32 saved_lpr = at91_sys_read(AT91_SDRAMC_LPR); - - at91_sys_write(AT91_SDRAMC_LPR, 0); - at91_sys_write(AT91_SDRAMC_SRR, 1); - return saved_lpr; + u32 lpr = at91_sys_read(AT91_SDRAMC_LPR); + + asm volatile( + "b 1f\n\t" + ".align 5\n\t" + "1: mcr p15, 0, %0, c7, c10, 4\n\t" + " str %0, [%1, %2]\n\t" + " str %3, [%1, %4]\n\t" + " mcr p15, 0, %0, c7, c0, 4\n\t" + " str %5, [%1, %2]" + : + : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91_SDRAMC_LPR), + "r" (1), "r" (AT91_SDRAMC_SRR), + "r" (lpr)); } -#define sdram_selfrefresh_disable(saved_lpr) \ - at91_sys_write(AT91_SDRAMC_LPR, saved_lpr) +#define at91_standby at91rm9200_standby #elif defined(CONFIG_ARCH_AT91SAM9G45) #include @@ -42,14 +50,12 @@ static inline u32 sdram_selfrefresh_enable(void) /* We manage both DDRAM/SDRAM controllers, we need more than one value to * remember. */ -static u32 saved_lpr1; - -static inline u32 sdram_selfrefresh_enable(void) +static inline void at91sam9g45_standby(void) { - /* Those tow values allow us to delay self-refresh activation + /* Those two values allow us to delay self-refresh activation * to the maximum. */ u32 lpr0, lpr1; - u32 saved_lpr0; + u32 saved_lpr0, saved_lpr1; saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; @@ -63,14 +69,13 @@ static inline u32 sdram_selfrefresh_enable(void) at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); - return saved_lpr0; + cpu_do_idle(); + + at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); + at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } -#define sdram_selfrefresh_disable(saved_lpr0) \ - do { \ - at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); \ - at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); \ - } while (0) +#define at91_standby at91sam9g45_standby #else #include @@ -83,7 +88,7 @@ static inline u32 sdram_selfrefresh_enable(void) #warning Assuming EB1 SDRAM controller is *NOT* used #endif -static inline u32 sdram_selfrefresh_enable(void) +static inline void at91sam9_standby(void) { u32 saved_lpr, lpr; @@ -92,11 +97,13 @@ static inline u32 sdram_selfrefresh_enable(void) lpr = saved_lpr & ~AT91_SDRAMC_LPCB; at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH); - return saved_lpr; + + cpu_do_idle(); + + at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr); } -#define sdram_selfrefresh_disable(saved_lpr) \ - at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr) +#define at91_standby at91sam9_standby #endif -- cgit v1.1