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* KVM: Report IRQ injection status to userspace.Gleb Natapov2009-03-241-1/+1
| | | | | | | | | | | | IRQ injection status is either -1 (if there was no CPU found that should except the interrupt because IRQ was masked or ioapic was misconfigured or ...) or >= 0 in that case the number indicates to how many CPUs interrupt was injected. If the value is 0 it means that the interrupt was coalesced and probably should be reinjected. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: Export ioapic_get_delivery_bitmaskSheng Yang2008-12-311-0/+2
| | | | | | | It would be used for MSI in device assignment, for MSI dispatch. Signed-off-by: Sheng Yang <sheng@linux.intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: Move irqchip_in_kernel() from ioapic.h to irq.hXiantao Zhang2008-10-151-7/+0
| | | | | | | Moving irqchip_in_kernel() from ioapic.h to irq.h. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: irq ack notificationMarcelo Tosatti2008-10-151-1/+2
| | | | | | | | | | | | | | | | Based on a patch from: Ben-Ami Yassour <benami@il.ibm.com> which was based on a patch from: Amit Shah <amit.shah@qumranet.com> Notify IRQ acking on PIC/APIC emulation. The previous patch missed two things: - Edge triggered interrupts on IOAPIC - PIC reset with IRR/ISR set should be equivalent to ack (LAPIC probably needs something similar). Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> CC: Amit Shah <amit.shah@qumranet.com> CC: Ben-Ami Yassour <benami@il.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move ioapic code to common directory.Zhang Xiantao2008-01-301-0/+95
Move ioapic code to common, since IA64 also needs it. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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