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path: root/sound/soc/tegra/tegra_asoc_utils.h
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* ASoC: tegra: Fix typo in include guardRasmus Villemoes2014-08-221-1/+1
| | | | | | Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* ASoC: tegra: support new register layouts in Tegra124Stephen Warren2013-10-141-0/+1
| | | | | | | | | | | | | | | | Tegra124 introduces some small changes to the layout of some registers. Modify the affected drivers to program those registers appropriately based on which SoC they're running on. Tegra124 also introduced some new modules on the AHUB configlink register bus. These will require new entries in configlink_clocks[] in the AHUB driver. However, supporting that change likely relies on switching Tegra to the common reset framework, so I'll defer that change for now. Based-on-work-by: Arun Shamanna Lakshmi <aruns@nvidia.com> Based-on-work-by: Songhee Baek <sbaek@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
* ASoC: tegra: add Tegra114 support to tegra_asoc_utils.cStephen Warren2013-03-251-0/+1
| | | | | | | | | | | | | | | Tegra114 requires different PLL rates. Modify the code to know about this. On Tegra114 only for now, use regular clk_get() rather than clk_get_sys() to retrieve clocks. This assumes that the clocks will be represented in device tree. We can assure that from the start of any Tegra114 audio support. For older chips, I'll add the required clocks properties to the device trees this kernel cycle, and switch this code to only support the "new_clocks" path next cycle. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ASoC: tegra: add function to set ac97 rateLucas Stach2012-12-241-0/+1
| | | | | | | | | AC97 uses a fixed rate, unrelated to the sample rate. Add a function to make the setup more trivial. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ASoC: tegra: utils: add support for Tegra30 devicesStephen Warren2012-04-061-2/+7
| | | | | | | | | Tegra30 has some additional clocks that need to be manipulated, names some clocks differently, runs PLLs at different base rates, etc. The utility code needs to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ASoC: Tegra: Don't return mclk_changed from utils_set_rateStephen Warren2011-04-201-1/+1
| | | | | | | | | | | | | Only the clock programming code needs to know whether the clocks changed, and that is encapsulated within tegra_asoc_utils_set_rate(). The machine driver's call to snd_soc_dai_set_sysclk(codec_dai, ...) is safe irrespective of whether the clocks changed. (Applying Mark's TrimSlice review comments to the existing driver) Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ASoC: Tegra: utils: Don't use global variablesStephen Warren2011-01-311-3/+17
| | | | | | | | | | | | Instead, have the machine driver provide storage for the utility data somehow. For Harmony in particular, store this within struct tegra_harmony, itself referenced by snd_soc_card's drvdata. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* ASoC: tegra: Machine utility codeStephen Warren2011-01-101-0/+31
Many portions of Tegra ASoC machine drivers will be similar or identical. To avoid cut/paste, this file will act as a repository for all that common code. For now, it solely includes code to reprogram the audio PLL for 44.1KHz- vs. 48KHz-based sample rates. Signed-Off-By: Stephen Warren <swarren@nvidia.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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