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path: root/sound/soc/codecs/pcm512x.h
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* ASoC: pcm512x: Avoid the PLL for the DAC clock, if possiblePeter Rosin2015-01-281-1/+3
| | | | | | | | | | | | | | | The PLL introduces jitter, which in turn introduces noice if used to clock the DAC. Thus, avoid the PLL output, and use the PLL input to drive the DAC clock, if possible. This is described for the PCM5142/PCM5242 chips in the answers to the forum post "PCM5142/PCM5242 DAC clock source" at the TI E2E community pages (1). (1) http://e2e.ti.com/support/data_converters/audio_converters/f/64/t/389994 Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: pcm512x: Support mastering BCLK/LRCLK using the PLLPeter Rosin2015-01-281-1/+43
| | | | | | | | | | | | | | | | | | | Using the PLL in master mode requires using an external connection between one of the GPIO pins (configured as PLL/4 output) and the SCK pin. It also requires the external clock to be fed to some other GPIO pin instead of the SCK pin. This is described for the PCM5122 chip in the answers to the forum post "PCM5122 DAC as I2S master troubles with PLL mode" at the TI E2E community pages (1). The clocking functionality is also much better described in the datasheet for the chip PCM5242, which seems to be register compatible with PCM512x and PCM514x (which both have severely lacking datasheets). (1) http://e2e.ti.com/support/data_converters/audio_converters/f/64/t/267830 Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: pcm512x: Support mastering BCLK/LRCLK without using the PLLPeter Rosin2015-01-281-1/+56
| | | | | | | | Use register field names from the seemingly compatible PCM5242 datasheet, as the PCM512x and PCM514x datasheets are severly lacking. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: pcm512x: Fix spelling of register field names.Peter Rosin2015-01-281-3/+3
| | | | | Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Mark Brown <broonie@kernel.org>
* ASoC: pcm512x: Split out bus driversMark Brown2014-03-091-0/+9
| | | | | | | Move to the new style of defining the bus interfaces in separate modules in order to simplify dependencies. Signed-off-by: Mark Brown <broonie@linaro.org>
* ASoC: pcm512x: Implement analogue volume controlMark Brown2014-02-071-0/+8
| | | | | | | There are some analogue volume controls in page 1 of the register map so implement support for them now that we can access the registers. Signed-off-by: Mark Brown <broonie@linaro.org>
* ASoC: pcm512x: Implement paging supportMark Brown2014-02-071-57/+69
| | | | | | | | | | | | | | The PCM512x devices use a paged register map covering the entire register range. Implement support for this, mapping pages in at addresses starting at 0x100 for ease of use (though since the pages are numbered from 0 there is going to be an off by one when looking at the first byte as a page number). Also mark the new registers as accessible with the exception of the coefficient RAM which is a bit fiddly and may benefit from some extra handling to linearise the blocks. Signed-off-by: Mark Brown <broonie@linaro.org>
* ASoC: pcm512x: Add PCM512x driverMark Brown2014-02-061-0/+142
The PCM512x devices are a family of monolithic CMOS integrated circuits that include a stereo digital-to-analog converter and additional support circuitry. This is an initial driver which supports some core functionality for the device which covers common use cases but does not cover all features. Currently only slave clocking modes with automatic clock configuration are supported and most of the DSP configuration for the device is not enabled. Signed-off-by: Mark Brown <broonie@linaro.org>
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