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* include/asm-x86/a.out-core.h: checkpatch cleanups - formatting onlyJoe Perches2008-04-171-5/+7
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* include/asm-x86/alternative.h: checkpatch cleanups - formatting onlyJoe Perches2008-04-171-5/+4
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* include/asm-x86/acpi.h: checkpatch cleanups - formatting onlyJoe Perches2008-04-171-4/+4
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* undo "x86: fix breakage of vSMP irq operations"Ingo Molnar2008-04-171-29/+0
| | | | | | | | | | revert: "x86: fix breakage of vSMP irq operations" the irqflags.h unification will solve this in a cleaner way. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: fix smpboot integrationYinghai Lu2008-04-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | > yhlu@mpk:~/xx/xx/kernel/x86/linux-2.6> git-bisect bad > d1c707188ad646c8094cac9afb1738e7d0196ff2 is first bad commit > commit d1c707188ad646c8094cac9afb1738e7d0196ff2 > Author: Glauber de Oliveira Costa <gcosta@redhat.com> > Date: Wed Mar 19 14:25:53 2008 -0300 > > x86: include mach_apic.h in smpboot_64.c and smpboot.c > > After the inclusion, a lot of files needs fixing for conflicts, > some of them in the headers themselves, to accomodate for both > i386 and x86_64 versions. > > [ mingo@elte.hu: build fix ] > > Signed-off-by: Glauber Costa <gcosta@redhat.com> > Signed-off-by: Ingo Molnar <mingo@elte.hu> > > :040000 040000 19f574e64bb8003bbe984f3a8c1315db969dfdcd > 6ffe96588c77bc936705599fa110107856201115 M arch > :040000 040000 61269347ad4f384ed85cc87c4f2d004ed94492ac > 8f5c713da25579a3cdf63db3d4c2f795261d0521 M include > yhlu@mpk:~/xx/xx/kernel/x86/linux-2.6> > attached patch fixes that.
* x86: increase max physical memory size of 64-bitJack Steiner2008-04-171-2/+2
| | | | | | | | | Increase the maximum physical address size of x86_64 system to 44-bits. This is in preparation for future chips that support larger physical memory sizes. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: bitops asm constraint fixesJan Beulich2008-04-171-19/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This (simplified) piece of code didn't behave as expected due to incorrect constraints in some of the bitops functions, when X86_FEATURE_xxx is referring to other than the first long: int test(struct cpuinfo_x86 *c) { if (cpu_has(c, X86_FEATURE_xxx)) clear_cpu_cap(c, X86_FEATURE_xxx); return cpu_has(c, X86_FEATURE_xxx); } I'd really like understand, though, what the policy of (not) having a "memory" clobber in these operations is - currently, this appears to be totally inconsistent. Also, many comments of the non-atomic functions say those may also be re-ordered - this contradicts the use of "asm volatile" in there, which again I'd like to understand. As much as all of these, using 'int' for the 'nr' parameter and 'void *' for the 'addr' one is in conflict with Documentation/atomic_ops.txt, especially because bt{,c,r,s} indeed take the bit index as signed (which hence would really need special precaution) and access the full 32 bits (if 'unsigned long' was used properly here, 64 bits for x86-64) pointed at, so invalid uses like referencing a 'char' array cannot currently be caught. Finally, the code with and without this patch relies heavily on the -fno-strict-aliasing compiler switch and I'm not certain this really is a good idea. In the light of all of this I'm sending this as RFC, as fixing the above might warrant a much bigger patch... Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: enable PAT for amd k8 and fam10hYinghai Lu2008-04-171-0/+1
| | | | | | | | | make known_pat_cpu to think amd k8 and fam10h is ok too. also make tom2 below to be WRBACK Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: PAT fixIngo Molnar2008-04-171-2/+8
| | | | | | build fix for !CONFIG_MTRR. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: PAT add ioremap_wc() interfacevenkatesh.pallipadi@intel.com2008-04-172-0/+5
| | | | | | | | | | Introduce ioremap_wc for wc remap. (generic wrapper is in a later patch) Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: PAT add set_memory_wc() interfacevenkatesh.pallipadi@intel.com2008-04-171-0/+2
| | | | | | | | | | Add a set_memory_wc interface(), similar to set_memory_uc interface. Callers has to call set_memory_uc, set_memory_wb and set_memory_wc, set_memory_wb as pairs. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: PAT use reserve free memtype in set_memory_ucvenkatesh.pallipadi@intel.com2008-04-171-0/+2
| | | | | | | | | | | | Use reserve_memtype and free_memtype interfaces in set_memory_uc/set_memory_wb interfaces to avoid aliasing. Usage model of set_memory_uc and set_memory_wb is for RAM memory and users will first call set_memory_uc and call set_memory_wb after use to reset the attribute. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: PAT make ioremap_change_attr non-staticvenkatesh.pallipadi@intel.com2008-04-171-0/+3
| | | | | | | | | Make ioremap_change_attr() non-static and use prot_val in place of ioremap_mode. This interface is used in subsequent PAT patches. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: PAT infrastructure patchvenkatesh.pallipadi@intel.com2008-04-175-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sets up pat_init() infrastructure. PAT MSR has following setting. PAT |PCD ||PWT ||| 000 WB _PAGE_CACHE_WB 001 WC _PAGE_CACHE_WC 010 UC- _PAGE_CACHE_UC_MINUS 011 UC _PAGE_CACHE_UC We are effectively changing WT from boot time setting to WC. UC_MINUS is used to provide backward compatibility to existing /dev/mem users(X). reserve_memtype and free_memtype are new interfaces for maintaining alias-free mapping. It is currently implemented in a simple way with a linked list and not optimized. reserve and free tracks the effective memory type, as a result of PAT and MTRR setting rather than what is actually requested in PAT. pat_init piggy backs on mtrr_init as the rules for setting both pat and mtrr are same. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: early memtest to find bad ramYinghai Lu2008-04-171-0/+3
| | | | | | | | | | | | | do simple memtest after init_memory_mapping use find_e820_area_size to find all ram range that is not reserved. and do some simple bits test to find some bad ram. if find some bad ram, use reserve_early to exclude that range. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: processor.h - use PAGE_SIZE instead of numeric valueCyrill Gorcunov2008-04-171-1/+1
| | | | | | | | | | This patch replaces numeric constant with an appropriate macro Also 0x800000000000UL is changed to bit shifting which is complement to the code comment (thanks hpa for notice) Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: simplify sync_test_bit()Jan Beulich2008-04-171-20/+1
| | | | | | | | There really is no need for a redundant implementation here, just keep the alternative name for allowing consumers to use consistent naming. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: remove the write-only timer_uses_ioapic_pin_0Adrian Bunk2008-04-171-1/+0
| | | | | | | | | | This patch removes the write-only timer_uses_ioapic_pin_0 (gsi can't be <= 15 in the line of it's fake usage in mpparse_32.c). Spotted by the GNU C compiler. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: fix build breakage when PCI is define and PARAVIRT is notRavikiran G Thirumalai2008-04-171-5/+2
| | | | | | | | | | | | | | | - Fix the the build breakage when PARAVIRT is defined but PCI is not This fixes problem reported at: http://marc.info/?l=linux-kernel&m=120525966600698&w=2 - Make is_vsmp_box() available even when PARAVIRT is not defined. This is needed to determine if tsc's are reliable as a time source even when PARAVIRT is not defined. - split vsmp_init to use is_vsmp_box() and set_vsmp_pv_ops() set_vsmp_pv_ops will do nothing if PCI is not enabled in the config. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: make struct mpc_config_translation NUMAQ-onlyAlexey Starikovskiy2008-04-173-12/+10
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: remove mpc_oem_bus_info()Alexey Starikovskiy2008-04-176-40/+2
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: remove mpc_oem_pci_bus()Alexey Starikovskiy2008-04-176-29/+2
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: remove mpc_apic_id()Alexey Starikovskiy2008-04-176-47/+0
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: use get_bios_ebda in mpparse_64.cAlexey Starikovskiy2008-04-171-0/+0
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: introduce smpboot_clear_io_apicGlauber de Oliveira Costa2008-04-172-0/+9
| | | | | | | | | x86_64 has two nr_ioapics = 0 statements. In 32-bit, it can be done too. We do it through the smpboot_clear_io_apic() inline function, to cope with subarchitectures (visws) that does not compile mpparse in Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: assign nr_ioapics = 0 in smpboot_hooks.hGlauber de Oliveira Costa2008-04-171-0/+2
| | | | | | | change smpboot_setup_io_apic() by to match x86_64 behaviour Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: integrate do_boot_cpuGlauber de Oliveira Costa2008-04-171-0/+3
| | | | | | | | | | This is a very large patch, because it depends on a lot of auxiliary static functions. But they all have been modified to the point that they're sufficiently close now. So they're just merged in smpboot.c Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: change boot_cpu_id to boot_cpu_physical_apicidGlauber de Oliveira Costa2008-04-174-10/+3
| | | | | | | | | This is to match i386. The former name was cuter, but the current is more meaningful and more general, since cpu_id can be a logical id. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: move stack_start to smp.hGlauber de Oliveira Costa2008-04-171-0/+7
| | | | | | | | | voyager would conflict with it, but the types are ultimately compatible. So remove the extern definition from voyager_smp.c in favour of the common one Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: include mach_apic.h in smpboot_64.c and smpboot.cGlauber de Oliveira Costa2008-04-175-15/+17
| | | | | | | | | | | After the inclusion, a lot of files needs fixing for conflicts, some of them in the headers themselves, to accomodate for both i386 and x86_64 versions. [ mingo@elte.hu: build fix ] Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: call nmi_watchdog_default in i386Glauber de Oliveira Costa2008-04-171-1/+3
| | | | | | | this does not exist, so it will be an empty macro Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: unify nmi_32.h and nmi_64.hGlauber de Oliveira Costa2008-04-173-152/+89
| | | | | | | | Two more files goes away. nmi_64.h and nmi_32.h gives birth to nmi.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: wipe get_nmi_reason out of nmi_64.hGlauber de Oliveira Costa2008-04-171-2/+0
| | | | | | | use mach_traps when it is supposed to be used. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: fix alloc_bootmem_pages_node macroGlauber de Oliveira Costa2008-04-171-1/+1
| | | | | | | missing a semicolon Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: make node to apic mapping declarations unconditionalGlauber de Oliveira Costa2008-04-171-4/+4
| | | | | | | | Instead of declaring them inside of X86_64 ifdef, do it unconditionally Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: define bios to apicid mappingGlauber de Oliveira Costa2008-04-173-12/+6
| | | | | | | | This mapping already exists in x86_64, just provide it for i386 Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: unify extern masks declarationGlauber de Oliveira Costa2008-04-173-19/+12
| | | | | | | take them off smp_{32,64}.h and move to smp.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: provide APIC_INTEGRATED definition for x86_64Glauber de Oliveira Costa2008-04-171-1/+5
| | | | | | | it is always integrated, so define as 1. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: merge smp_store_cpu_infoGlauber de Oliveira Costa2008-04-172-2/+2
| | | | | | | now that it is the same between arches, put it into smpboot.c Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: use start_ipi_hook in x86_64Glauber de Oliveira Costa2008-04-172-4/+3
| | | | | | | | It is used to match i386. The definition for the non-paravirt case is moved to smp.h instead of smp_32.h Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: move mp_bus_id_to_node to numa.cAlexey Starikovskiy2008-04-172-2/+1
| | | | Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: move mp_bus_id_to_local to numa.cAlexey Starikovskiy2008-04-172-1/+2
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: make mp_bus_id_to_type optionalAlexey Starikovskiy2008-04-171-1/+5
| | | | | | | [ mingo@elte.hu: fix boot regression. ] Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: add mp_bus_not_pci bitmap to mpparse_32.cAlexey Starikovskiy2008-04-171-2/+1
| | | | | Signed-off: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: get boot_cpu_id as early for k8_scan_nodesYinghai Lu2008-04-172-0/+4
| | | | | | | | | | | | | | | | | | | | | When acpi=off or there is no SRAT defined, apicid_to_node is got from K8 Northbridge PCI configuration space in k8_scan_nodes() in arch/x86_64/mm/k8toplogy.c. The problem is that it assumes bsp apic id is 0 at that point. For four socket system with Quad core cpus installed, all cpus apic id is offset by 4, and bsp apic id is 4. For eight socket system with dual core cpus installed, all cpus apic id is offset by 2, and bsp apic id is 2. We need get boot_cpu_id --- bsp apic id, before k8_scan_nodes by called. So create early_acpi_boot_init and early_get_smp_config for get boot_cpu_id. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: move quad_local_to_mp_bus_id to numa.cAlexey Starikovskiy2008-04-172-1/+2
| | | | | Signed-off-by: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: correct/clarify comment in nops.hMikael Pettersson2008-04-171-0/+2
| | | | | | | | | | | | <asm-x86/nops.h> describes certain multibyte instructions as "generic" nops when in fact they aren't nops at all in 64-bit mode (missing REX.W causing truncation of a register). Update the comment to state that K8 or P6 style nops should be used in 64-bit mode. This matches what the alternatives code does. Signed-off-by: Mikael Pettersson <mikpe@it.uu.se> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: prevent unconditional writes to DebugCtl MSRJan Beulich2008-04-171-0/+9
| | | | | | | | | | | | | | Otherwise, enabling (or better, subsequent disabling) of single stepping would cause a kernel oops on CPUs not having this MSR. The patch could have been added a conditional to the MSR write in user_disable_single_step(), but centralizing the updates seems safer and (looking forward) better manageable. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Markus Metzger <markus.t.metzger@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: add AMD Northbridge MSR definitionstephane eranian2008-04-171-0/+1
| | | | | | | | adds AMD Northbridge config MSR definition Signed-off-by: Stephane Eranian <eranian@gmail.com> Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: add cpu_has_arch_perfmonstephane eranian2008-04-171-0/+1
| | | | | | | | adds cpu_has_arch_perfmon to test presence of architectural perfmon on Intel x86 processor Signed-off-by: Stephane Eranian <eranian@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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