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* net/wan/fsl_ucc_hdlc: add hdlc-bus supportHolger Brunck2017-05-181-0/+5
| | | | | | | | | | | | | | | | | | This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can be enabled with the "fsl,hdlc-bus" property in the DTS node of the corresponding ucc. This aligns the configuration of the UPSMR and GUMR registers to what is done in our ucc_hdlc driver (that only support hdlc-bus mode) and with the QuickEngine's documentation for hdlc-bus mode. GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal is ignored. The brkpt_support is enabled to set the HBM1 bit in the CMXUCR register to configure an open-drain connected HDLC bus. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* fsl/qe: add bit description for SYNL register for GUMRHolger Brunck2017-05-181-0/+4
| | | | | | | | | Add the bitmask for the two bit SYNL register according to the QUICK Engine Reference Manual. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* soc/fsl/qe: get rid of immrbar_virt_to_phys()Christophe Leroy2017-04-301-19/+0
| | | | | | | | immrbar_virt_to_phys() is not used anymore Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Acked-by: Li Yang <pku.leo@gmail.com> Signed-off-by: Scott Wood <oss@buserror.net>
* net: ethernet: ucc_geth: fix MEM_PART_MURAM modeChristophe Leroy2017-04-301-0/+1
| | | | | | | | | | | | Since commit 5093bb965a163 ("powerpc/QE: switch to the cpm_muram implementation"), muram area is not part of immrbar mapping anymore so immrbar_virt_to_phys() is not usable anymore. Fixes: 5093bb965a163 ("powerpc/QE: switch to the cpm_muram implementation") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Li Yang <pku.leo@gmail.com> Signed-off-by: Scott Wood <oss@buserror.net>
* fsl/qe: Do not prefix header guard with CONFIG_Andreas Ziegler2016-06-081-2/+2
| | | | | | | | The CONFIG_ prefix should only be used for options which can be configured through Kconfig and not for guarding headers. Signed-off-by: Andreas Ziegler <andreas.ziegler@fau.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* drivers/net: support hdlc function for QE-UCCZhao Qiang2016-06-072-2/+21
| | | | | | | | The driver add hdlc support for Freescale QUICC Engine. It support NMSI and TSA mode. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* fsl/qe: Add QE TDM libZhao Qiang2016-06-072-4/+95
| | | | | | | | | | QE has module to support TDM, some other protocols supported by QE are based on TDM. add a qe-tdm lib, this lib provides functions to the protocols using TDM to configurate QE-TDM. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* fsl/qe: Make regs resouce_size_tZhao Qiang2016-06-071-1/+1
| | | | | Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* fsl/qe: setup clock source for TDM modeZhao Qiang2016-06-073-0/+21
| | | | | | | | Add tdm clock configuration in both qe clock system and ucc fast controller. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* fsl/qe: add rx_sync and tx_sync for TDM modeZhao Qiang2016-06-072-0/+4
| | | | | | | | Rx_sync and tx_sync are used by QE-TDM mode, add them to struct ucc_fast_info. Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* qe: Make cpm_muram_alloc_common staticSaurabh Sengar2016-03-091-2/+0
| | | | | | | | as cpm_muram_alloc_common is used only in this file, making it static Signed-off-by: Saurabh Sengar <saurabh.truth@gmail.com> Signed-off-by: Scott Wood <oss@buserror.net>
* QE: Move QE from arch/powerpc to drivers/socZhao Qiang2015-12-226-0/+2005
ls1 has qe and ls1 has arm cpu. move qe from arch/powerpc to drivers/soc/fsl to adapt to powerpc and arm Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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