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* Merge tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds2015-02-118-27/+26
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MMC updates from Ulf Hansson: "MMC core: - Support for MMC power sequences. - SDIO function devicetree subnode parsing. - Refactor the hardware reset routines and enable it for SD cards. - Various code quality improvements, especially for slot-gpio. MMC host: - dw_mmc: Various fixes and cleanups. - dw_mmc: Convert to mmc_send_tuning(). - moxart: Fix probe logic. - sdhci: Various fixes and cleanups - sdhci: Asynchronous request handling support. - sdhci-pxav3: Various fixes and cleanups. - sdhci-tegra: Fixes for T114, T124 and T132. - rtsx: Various fixes and cleanups. - rtsx: Support for SDIO. - sdhi/tmio: Refactor and cleanup of header files. - omap_hsmmc: Use slot-gpio and common MMC DT parser. - Make all hosts to deal with errors from mmc_of_parse(). - sunxi: Various fixes and cleanups. - sdhci: Support for Fujitsu SDHCI controller f_sdh30" * tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc: (117 commits) mmc: sdhci-s3c: solve problem with sleeping in atomic context mmc: pwrseq: add driver for emmc hardware reset mmc: moxart: fix probe logic mmc: core: Invoke mmc_pwrseq_post_power_on() prior MMC_POWER_ON state mmc: pwrseq_simple: Add optional reference clock support mmc: pwrseq: Document optional clock for the simple power sequence mmc: pwrseq_simple: Extend to support more pins mmc: pwrseq: Document that simple sequence support more than one GPIO mmc: Add hardware dependencies for sdhci-pxav3 and sdhci-pxav2 mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes mmc: sdhci-pxav3: Extend binding with SDIO3 conf reg for the Armada 38x mmc: sdhci-pxav3: Fix Armada 38x controller's caps according to erratum ERR-7878951 mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor mmc: sdhci: switch voltage before sdhci_set_ios in runtime resume mmc: tegra: Write xfer_mode, CMD regs in together mmc: Resolve BKOPS compatability issue mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles mmc: dw_mmc: rockchip: remove incorrect __exit_p() mmc: dw_mmc: exynos: remove incorrect __exit_p() mmc: Fix menuconfig alignment of MMC_SDHCI_* options ...
| * mmc: Resolve BKOPS compatability issueAlexey Skidanov2015-01-292-1/+6
| | | | | | | | | | | | | | | | | | | | | | This patch is coming to fix compatibility issue of BKOPS_EN field of EXT_CSD. In eMMC-5.1, BKOPS_EN was changed, and now it has two operational bits: Bit 0 - MANUAL_EN Bit 1 - AUTO_EN In previous eMMC revisions, only Bit 0 was supported. Signed-off-by: Alexey Skidanov <alexey.skidanov@sandisk.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * mmc: core: Initial support for MMC power sequencesUlf Hansson2015-01-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System on chip designs may specify a specific MMC power sequence. To successfully detect an (e)MMC/SD/SDIO card, that power sequence must be followed while initializing the card. To be able to handle these SOC specific power sequences, let's add a MMC power sequence interface. It provides the following functions to help the mmc core to deal with these power sequences. mmc_pwrseq_alloc() - Invoked from mmc_of_parse(), to initialize data. mmc_pwrseq_pre_power_on()- Invoked in the beginning of mmc_power_up(). mmc_pwrseq_post_power_on()- Invoked at the end in mmc_power_up(). mmc_pwrseq_power_off()- Invoked from mmc_power_off(). mmc_pwrseq_free() - Invoked from mmc_free_host(), to free data. Each MMC power sequence provider will be responsible to implement a set of callbacks. These callbacks mirrors the functions above. This patch adds the skeleton, following patches will extend the core of the MMC power sequence and add support for a specific simple MMC power sequence. Do note, since the mmc_pwrseq_alloc() is invoked from mmc_of_parse(), host drivers needs to make use of this API to enable the support for MMC power sequences. Moreover the MMC power sequence support depends on CONFIG_OF. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
| * Merge branch 'tmio' into nextUlf Hansson2015-01-201-15/+0
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| | * mmc: sh_mobile_sdhi: remove .init/.cleanupKuninori Morimoto2015-01-201-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | No one is using .init/.cleanup callback function. Let's remove these. sdhi_ops and .cd_wakeup are also removed Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci: add a quirk for single block transactionsVincent Yang2015-01-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch defines a quirk to disable the block count for single block transactions. It is a preparation and will be used by Fujitsu SDHCI controller f_sdh30 driver. Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci: add a quirk for tuning work aroundVincent Yang2015-01-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch defines a quirk for tuning work around for some sdhci host controller. It sets both SDHCI_CTRL_EXEC_TUNING and SDHCI_CTRL_TUNED_CLK for tuning. It is a preparation and will be used by Fujitsu SDHCI controller f_sdh30 driver. Signed-off-by: Vincent Yang <Vincent.Yang@tw.fujitsu.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: slot-gpio: Allow host driver to provide isr for card-detect interruptsNeilBrown2015-01-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One of the reasons omap_hsmmc doesn't use the slot-gpio library is that it has some non-standard functionality in the card-detect interrupt service routine. To make it possible for omap_hsmmc (and maybe others) to be converted to use slot-gpio, add 'mmc_gpio_request_cd_isr' which provide an alternate isr to be register by the slot-gpio code. Signed-off-by: NeilBrown <neilb@suse.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: core: always check status after resetJohan Rudholm2015-01-191-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Always check if the card is alive after a successful reset. This allows us to remove mmc_hw_reset_check(), leaving mmc_hw_reset() as the only card reset interface. Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: sdhci: use pipeline mmc requests to improve performanceHaibo Chen2015-01-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is based on the patches by Per Forlin, Tony Lin and Ryan QIAN. This patch complete the API 'post_req' and 'pre_req' in sdhci host side, Test Env: 1. i.MX6Q-SABREAUTO board, CPU @ 996MHz, use ADMA in uSDHC controller. 2. Test command: $ echo 1 > /proc/sys/vm/drop_caches write to sd card: $ dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=2000 conv=fsync read the sd card: $ dd if=/dev/mmcblk0 of=/dev/null bs=1M count=2000 3. TOSHIBA 16GB SD3.0 card, running at 4 bit, SDR104 @ 198MHZ Performance with and without this patch: ------------------------------------------------- | | read speed | write speed | |------------------------------------------------ | with this patch | ~76.7 MB/s | ~23.3 MB/s | |------------------------------------------------ |without this patch | ~60.5 MB/s | ~22.5 MB/s | ------------------------------------------------- 4. SanDisk 8GB SD3.0 card, running at 4 bit, DDR50 @ 50MHZ Performance with and without this patch: ------------------------------------------------- | | read speed | write speed | |------------------------------------------------ | with this patch | ~40.5 MB/s | ~15.6 MB/s | |------------------------------------------------ |without this patch | ~36.1 MB/s | ~14.1 MB/s | ------------------------------------------------- 5. Kingston 8GB SD2.0 card, running at 4 bit, High-speed @ 50MHZ Performance with and without this patch: ------------------------------------------------- | | read speed | write speed | |------------------------------------------------ | with this patch | ~22.7 MB/s | ~8.2 MB/s | |------------------------------------------------ |without this patch | ~21.3 MB/s | ~8.0 MB/s | ------------------------------------------------- 6. About eMMC, Sandisk 8GB eMMC on i.MX6DL-sabresd board, CPU @ 792MHZ, eMMC running at 8 bit, DDR52 @ 52MHZ. Performance with and without this patch: ------------------------------------------------- | | read speed | write speed | |------------------------------------------------ | with this patch | ~37.3 MB/s | ~10.5 MB/s | |------------------------------------------------ |without this patch | ~33.4 MB/s | ~10.5 MB/s | ------------------------------------------------- Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: core: Make tuning block patterns staticUlf Hansson2015-01-191-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since previous patches removed the need for the tuning block patterns to be exported, let's move them close to the mmc_send_tuning() API. Those are now intended to be used only by the mmc core. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: slot-gpio: Rework how to handle allocation of slot-gpio dataUlf Hansson2015-01-191-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By moving the allocation of the slot-gpio data into mmc_alloc_host(), we can remove the slot-gpio internal calls to mmc_gpio_alloc(). This means mmc_gpio_alloc() has now only one caller left, which consequence allow us to simplify and remove some of the slot-gpio code. Additionally, this makes the slot-gpio mutex redundant, so let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: slot-gpio: Remove option to explicitly free requested CD/WP GPIOsUlf Hansson2015-01-191-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The slot-gpio uses the devm*_ managed functions. Still it provide APIs to explicitly free requested CD/WP GPIOs, but these API isn't being used. Therefore let's simplify slot-gpio by removing these unused APIs. If it later turns out we need some of them, we can always consider to restore the code. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
| * | mmc: dw_mmc: Protect read-modify-write of INTMASK with a lockDoug Anderson2015-01-191-0/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We're running into cases where our enabling of the SDIO interrupt in dw_mmc doesn't actually take effect. Specifically, adding patch like this: +++ b/drivers/mmc/host/dw_mmc.c @@ -1076,6 +1076,9 @@ static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) mci_writel(host, INTMASK, (int_mask | SDMMC_INT_SDIO(slot->id))); + int_mask = mci_readl(host, INTMASK); + if (!(int_mask & SDMMC_INT_SDIO(slot->id))) + dev_err(&mmc->class_dev, "failed to enable sdio irq\n"); } else { ...actually triggers the error message. That's because the dw_mci_enable_sdio_irq() unsafely does a read-modify-write of the INTMASK register. We can't just use the standard host->lock since that lock is not irq safe and mmc_signal_sdio_irq() (called from interrupt context) calls dw_mci_enable_sdio_irq(). Add a new irq-safe lock to protect INTMASK. An alternate solution to this is to punt mmc_signal_sdio_irq() to the tasklet and then protect INTMASK modifications by the standard host lock. This seemed like a bit more of a high-latency change. Reported-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* | Merge branch 'master' of ↵David S. Miller2015-01-261-2/+4
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== pull-request: wireless-drivers-next 2015-01-22 now a bigger pull request for net-next. Rafal found a UTF-8 bug in patchwork[1] and because of that two commits (d0c102f70aec and d0f66df5392a) have his name corrupted: Acked-by: Rafa? Mi?ecki <zajec5@gmail.com> Somehow I failed to spot that when I commited the patches. As rebasing public git trees is bad, I thought we can live with these and decided not to rebase. But I'll pay close attention to this in the future to make sure that it won't happen again. Also we requested an update to patchwork.kernel.org, the latest patchwork doesn't seem to have this bug. Also please note this pull request also adds one DT binding doc, but this was reviewed in the device tree list: .../bindings/net/wireless/qcom,ath10k.txt | 30 + Please let me know if you have any issues. [1] https://lists.ozlabs.org/pipermail/patchwork/2015-January/001261.html ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
| * brcmfmac: Add support for bcm43340/1 wireless chipsetsArend van Spriel2015-01-061-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the bcm43340 and bcm43341 wireless chipsets. These two chipsets are identical from wireless parts perspective. As such they use the same firmware image. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Rob Herring <rob.herring@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> [arend@broadcom.com: squash to single commit, remove 43341 chipid] Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by: Hante Meuleman <meuleman@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
* | mmc: sdhci: Disable re-tuning for HS400Adrian Hunter2015-01-121-0/+1
|/ | | | | | | | | | | | | | | | | | | | | Re-tuning for HS400 mode must be done in HS200 mode. Currently there is no support for that. That needs to be reflected in the code. Specifically, if tuning is executed in HS400 mode then return an error, and do not start the tuning timer if HS200 tuning is being done prior to switching to HS400. Note that periodic re-tuning is not expected to be needed for HS400 but re-tuning is still needed after the host controller has lost power. In the case of suspend/resume that is not necessary because the card is fully re-initialised. That just leaves runtime suspend/resume with no support for HS400 re-tuning. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Let mmc_send_tuning() to take struct mmc_host* as parameterUlf Hansson2014-12-081-1/+1
| | | | | | | | | | | To be able to use mmc_send_tuning() prior the struct mmc_card has been allocated, let's convert it to take the struct mmc_host* as parameter instead. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Dong Aisheng <b29396@freescale.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
* mmc: core: add core-level function for sending tuning commandsMinda Chen2014-11-261-0/+1
| | | | | | | | | | | | | | According to the SD card spec, Add a manual tuning command function for SDR104/HS200. Sending command 19 or command 21 to read data and compare with the tunning block pattern. This patch will help to decrease some platform private codes in SDHCI platform_execute_tuning() callbacks. Signed-off-by: Minda Chen <Minda.Chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: add support for the other bit of sdio interruptAddy Ke2014-11-261-0/+3
| | | | | | | | | | | The bit of sdio interrupt is 16 in designware implementation, but it is 24 on Rockchip SoCs.This patch add sdio_id0 for the number of slot0 in the SDIO interrupt registers. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Add HS400 support to SDHCI driverAdrian Hunter2014-11-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | MMC core already has support for HS400. Add HS400 support to SDHCI driver. The SDHC Standard specification does not define HS400 so consequently HS400 support is non-standard. However HS400 is not selected without the host controller setting the corresponding capability flags so host controllers not yet supporting HS400 will not be affected. To support that, a quirk SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 is introduced to enable the use of capabilities register reserved bit-63 to indicate HS400 support. Because HS400 is non-standard for SDHCI, it is possible that different vendors will do things in different ways. However HS200 support faced the same issue but currently there is only one solution. As such, no attempt has been made to provide for alternate HS400 solutions except for SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Clear also HS400 1.2V capability if 1.2V is not supportedAdrian Hunter2014-11-261-0/+1
| | | | | | | | 1.2V HS200 mode capability is cleared if there is not a voltage regulator that supports 1.2V. Do the same for 1.2V HS400 mode. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Add IDMAC 64-bit address mode supportPrabu Thangamuthu2014-11-261-0/+2
| | | | | | | | | | Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address mode from IP version 2.70a onwards. Updated the driver to support IDMAC 64-bit addressing mode. Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Add a quirk for AMD SDHC transfer mode register need to be ↵Vincent Wan2014-11-261-0/+2
| | | | | | | | | | | | | | | cleared for cmd without data SDHC controller in AMD chipsets require SDHC transfer mode register to be cleared for commands without data. The issue was uncovered during testing eMMC cards on KB/ML based platforms Signed-off-by: Vincent Wan <vincent.wan@amd.com> Signed-off-by: Wan Zongshun <mcuos.com@gmail.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Tested-by: Vikram B <vikram.b@amd.com> Tested-by: Raghavendra Swamy <raghavendra.swamy@amd.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Add 64-bit ADMA supportAdrian Hunter2014-11-101-0/+3
| | | | | | | | | | | | | | | | | | | Add 64-bit ADMA support including: - add 64-bit ADMA descriptor - add SDHCI_USE_64_BIT_DMA flag - set upper 32-bits of DMA addresses - ability to select 64-bit ADMA - ability to use 64-bit ADMA sizes and alignment - display "ADMA 64-bit" when host is added It is assumed that a 64-bit capable device has set a 64-bit DMA mask and *must* do 64-bit DMA. A driver has the opportunity to change that during the first call to ->enable_dma(). Similarly SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to implement. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Parameterize ADMA sizes and alignmentAdrian Hunter2014-11-101-0/+7
| | | | | | | | | | | | | In preparation for 64-bit ADMA, parameterize ADMA sizes and alignment. 64-bit ADMA has a larger descriptor because it contains a 64-bit address instead of a 32-bit address. Also data must be 8-byte aligned instead of 4-byte aligned. Consequently, sdhci_host members are added for descriptor, table, and buffer sizes and alignment. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Use 'void *' for not 'u8 *' for ADMA dataAdrian Hunter2014-11-101-2/+2
| | | | | | | | | | | It is kernel-style to use 'void *' for anonymous data. This is being applied to the ADMA bounce buffer which contains unaligned bytes, and to the ADMA descriptor table which will contain 32-bit ADMA descriptors or 64-bit ADMA descriptors when support is added. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Rename adma_desc to adma_tableAdrian Hunter2014-11-101-1/+1
| | | | | | | | | | In preparation for 64-bit ADMA, rename adma_desc to adma_table. That is because members will be added for descriptor size and table size, so using adma_desc (which is the table) is confusing. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Remove the redundant mmc_send_ext_csd() APIUlf Hansson2014-11-101-1/+0
| | | | | | | | Previous patches has replaced the calls to mmc_send_ext_csd() into mmc_get_ext_csd(), thus mmc_send_ext_csd() has become redundant. Let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Export mmc_get_ext_csd()Ulf Hansson2014-11-101-0/+1
| | | | | | | Callers of mmc_send_ext_csd() will be able to decrease code duplication by using mmc_get_ext_csd() instead. Let's make it available. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Remove old card detect infrastructureDoug Anderson2014-11-101-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dw_mmc driver had a bunch of code that ran whenever a card was ejected and inserted. However, this code was old and crufty and should be removed. Some evidence that it's really not needed: 1. Is is supposed to be legal to use 'cd-gpio' on dw_mmc instead of using the built-in card detect mechanism. The 'cd-gpio' code doesn't run any of the crufty old code but yet still works. 2. While looking at this, I realized that my old change (369ac86 mmc: dw_mmc: don't queue up a card detect at slot startup) actually castrated the old code a little bit already and nobody noticed. Specifically "last_detect_state" was left as 0 at bootup. That means that on the first card removal none of the crufty code ran. 3. I can run "while true; do dd if=/dev/mmcblk1 of=/dev/null; done" while ejecting and inserting an SD Card and the world doesn't explode. If some of the crufty old code is actually needed, we should justify it and also put it in some place where it will be run even with "cd-gpio". Note that in my case I'm using the "cd-gpio" mechanism but for various reasons the hardware triggers a dw_mmc "card detect" at bootup. That was actually causing a real bug. The card detect workqueue was running while the system was trying to enumerate the card. The "present != slot->last_detect_state" triggered and we were doing all kinds of crazy stuff and messing up enumeration. The new mechanism of just asking the core to check the card is much safer and then the bogus interrupt doesn't hurt. Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: alim.akhtar <alim.akhtar@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Report firmware version for eMMC 5.0 devices.Gwendal Grignou2014-11-102-0/+6
| | | | | | | | | | For eMMC 5.0 compliant device, firmware version is stored in ext_csd. Report firmware as a 64bit hexa decimal. Vendor can use hexa or ascii string to report firmware version. Also add FFU related EXT_CSD register and note if the device is FFU capable. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Remove unused mmc_list_to_card() macroUlf Hansson2014-11-101-2/+0
| | | | Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: block: Use dev_set|get_drvdata()Ulf Hansson2014-11-101-2/+0
| | | | | | | | | | In most of the cases mmc_get|set_drvdata() didn't simplify code, which should be the primary reason for such macros. Let's remove them and convert to the common device_driver macros, dev_set|get_drvdata() instead. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Convert mmc_driver to device_driverUlf Hansson2014-11-101-14/+2
| | | | | | | | | | | The struct mmc_driver adds an extra layer on top of the struct device_driver. That would be fine, if there were a good reason, but that's not the case. Let's simplify code by converting to the common struct device_driver instead and thus also removing superfluous overhead. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Don't export the to_sdio_driver macroUlf Hansson2014-11-101-2/+0
| | | | | | The macro is only used by the mmc core, so let's move it in there. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: Add quirk for always getting TC with stop cmdAdrian Hunter2014-10-031-0/+2
| | | | | | | | | Add a quirk for a host controller that always sets a Transfer Complete interrupt status for the stop command even when a busy response is not indicated. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: restore detect line inversion semanticsLinus Walleij2014-10-021-2/+2
| | | | | | | | | | | | | | | | | | | | commit 98e90de99a0c43bd434da814c882c4332441871e "mmc: host: switch OF parser to use gpio descriptors" switched the semantic behaviour of card detect and read only flags such that the inversion capability flag would only be set if inversion was explicitly specified in the device tree, in the hopes that no-one was using double inversion. It turns out that the XOR:ing between the explicit inversion was indeed in use, so we need to restore the old semantics where both ways of inversion are checked and the end result XOR:ed. Reported-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: core: Add new power_mode MMC_POWER_UNDEFINEDRoger Tseng2014-09-241-0/+1
| | | | | | | | | | | | | Add MMC_POWER_UNDEFINED for power_mode in struct mmc_ios and use it as the initial value of host->ios.power_mode. For hosts with MMC_CAP2_NO_PRESCAN_POWERUP, this makes the later mmc_power_off() do real power-off things instead of NOP, and further prevents state messed up in cards that was already initialized (eg. by BIOS of UEFI driver). Signed-off-by: Roger Tseng <rogerable@realtek.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: Consolidate emmc tuning blocksStephen Boyd2014-09-231-0/+5
| | | | | | | | | | The same tuning block exists in the dw_mmc h.c and sdhci-msm.c files. Move these into mmc.c so that they can be shared across drivers. Reported-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: Replace "enhanced_area_en" attribute by "partition_setting_completed"Grégory Soutadé2014-09-192-1/+3
| | | | | | | | | | Replace ext_csd "enhanced_area_en" attribute by "partition_setting_completed". It was used whether or not enhanced user area is defined and without checks of EXT_CSD_PARTITION_SETTING_COMPLETED bit. Signed-off-by: Grégory Soutadé <gsoutade@neotion.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: slot-gpio: add gpiod variant to get wp GPIOLinus Walleij2014-09-091-0/+3
| | | | | | | | | | This makes it possible to get the write protect (read only) GPIO line from a GPIO descriptor. Written to exactly mirror the card detect function. Acked-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: remove MMC_CAP2_NO_MULTI_READ flagsKuninori Morimoto2014-09-091-1/+0
| | | | | | | | | Now, mmc framework uses multi_io_quirk for I/O HW bug workaround. MMC_CAP2_NO_MULTI_READ flag is no longer needed Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: Add .multi_io_quirk callback for multi I/O HW bugKuninori Morimoto2014-09-091-0/+7
| | | | | | | | | | | | | | | | Historically, we have been using MMC_CAP* to handle host HW issues and currently the block layer uses MMC_CAP2_NO_MULTI_READ flag for a multi I/O HW bug workaround. There are a few tweaks needed to make MMC_CAP2_NO_MULTI_READ suite all situations. Therefore let's add an optional host ops callback to enable host drivers to return the number of blocks it allows per request. In a future patch and when host drivers have converted to the new callback, MMC_CAP2_NO_MULTI_READ shall be removed. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: sdhci: handle busy-end interrupt during commandChanho Min2014-09-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | It is fully legal for a controller to start handling busy-end interrupt before it has signaled that the command has completed. So make sure we do things in the proper order, Or it results that command interrupt is ignored so it can cause unexpected operations. This is founded at some toshiba emmc with the bellow warning. "mmc0: Got command interrupt 0x00000001 even though no command operation was in progress." This issue has been also reported by Youssef TRIKI: It is not specific to Toshiba devices, and happens with eMMC devices as well as SD card which support Auto-CMD12 rather than CMD23. Also, similar patch is submitted by: Gwendal Grignou <gwendal@chromium.org> Changes since v1: Fixed conflict with the next of git.linaro.org/people/ulf.hansson/mmc.git and Tested if issue is fixed again. Signed-off-by: Hankyung Yu <hankyung.yu@lge.com> Signed-off-by: Chanho Min <chanho.min@lge.com> Tested-by: Youssef TRIKI <youssef.triki@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Support voltage changesDoug Anderson2014-09-091-0/+2
| | | | | | | | | | | | For UHS cards we need the ability to switch voltages from 3.3V to 1.8V. Add support to the dw_mmc driver to handle this. Note that dw_mmc needs a little bit of extra code since the interface needs a special bit programmed to the CMD register while CMD11 is progressing. This means adding a few extra states to the state machine to track. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: use mmc_regulator_get_supply to handle regulatorsYuvaraj CD2014-09-091-1/+1
| | | | | | | | | | | This patch makes use of mmc_regulator_get_supply() to handle the vmmc and vqmmc regulators.Also it moves the code handling the these regulators to dw_mci_set_ios().It turned on the vmmc and vqmmc during MMC_POWER_UP and MMC_POWER_ON,and turned off during MMC_POWER_OFF. Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: implement Driver Stage Register handlingSascha Hauer2014-09-092-1/+5
| | | | | | | | | | | | | | | | | | | | Some eMMC and SD cards implement a DSR register that allows to tune raise/fall times and drive strength of the CMD and DATA outputs. The values to use depend on the card in use and the host. It might be needed to reduce the drive strength to prevent voltage peaks above the host's specification. Implement a 'dsr' devicetree property that allows to specify the value to set the DSR to. For non-dt setups the new members of mmc_host can be set by board code. This patch was initially authored by Sascha Hauer. It contains improvements authored by Markus Niebel and Uwe Kleine-König. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: Correct the value of MMC_NUM_PHY_PARTITIONYi Sun2014-09-091-2/+3
| | | | | | | | | eMMC card can support up to 7 physical partitions, including 2 boot, 1 RPMB and 4 GPs. Change MMC_NUM_PHY_PARTITION from 6 to 7, which is the correct value. Signed-off-by: Yi Sun <yi.y.sun@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
* mmc: dw_mmc: Slot quirk "disable-wp" is deprecated.Jaehoon Chung2014-08-111-0/+2
| | | | | | | | | | | | | Slot quirks "disable-wp" is deprecated. Instead, use the host quirk "disable-wp". (Because the slot-node is removed in dt-file.) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Sachin Kamat <sachin.kamat@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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