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path: root/include/linux/intel-iommu.h
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* iommu/vt-d: Add a check for 5-level paging supportSohil Mehta2018-01-171-0/+1
* iommu/vt-d: Add a check for 1GB page supportSohil Mehta2018-01-171-0/+1
* iommu/vt-d: Clear Page Request Overflow fault bitLu Baolu2017-11-031-0/+1
* iommu/vt-d: Use lo_hi_readq() / lo_hi_writeq()Andy Shevchenko2017-03-221-16/+2
*---. Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', 'arm/m...Joerg Roedel2017-02-101-8/+9
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| | | * iommu: Add sysfs bindings for struct iommu_deviceJoerg Roedel2017-02-101-1/+0
| | | * iommu: Introduce new 'struct iommu_device'Joerg Roedel2017-02-101-0/+2
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| | * iommu/vt-d: Fix some macros that are incorrectly specified in intel-iommuCQ Tang2017-01-311-7/+7
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* | iommu/vt-d: Fix PASID table allocationDavid Woodhouse2016-11-191-0/+1
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* iommu/vt-d: Clear PPR bit to ensure we get more page request interruptsDavid Woodhouse2016-02-151-0/+3
* iommu/vt-d: Implement SVM_FLAG_PRIVATE_PASID to allocate unique PASIDsDavid Woodhouse2015-10-151-0/+1
* iommu/vt-d: Add callback to device driver on page faultsDavid Woodhouse2015-10-151-0/+3
* iommu/vt-d: Implement page request handlingDavid Woodhouse2015-10-151-0/+26
* iommu/vt-d: Generalise DMAR MSI setup to allow for page request eventsDavid Woodhouse2015-10-151-1/+9
* iommu/vt-d: Add basic SVM PASID supportDavid Woodhouse2015-10-151-5/+63
* iommu/vt-d: Add initial support for PASID tablesDavid Woodhouse2015-10-151-0/+15
* iommu/vt-d: Introduce intel_iommu=pasid28, and pasid_enabled() macroDavid Woodhouse2015-10-151-1/+1
* iommu/vt-d: Use plain writeq() for dmar_writeq() where availableDavid Woodhouse2015-10-131-8/+6
* iommu/vt-d: Split up iommu->domains arrayJoerg Roedel2015-08-121-1/+1
* Merge tag 'iommu-updates-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2015-06-231-0/+5
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| * iommu/vt-d: Copy IR table from old kernel when in kdump modeJoerg Roedel2015-06-161-0/+1
| * iommu/vt-d: Detect pre enabled translationJoerg Roedel2015-06-161-0/+4
* | Merge branch 'x86-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2015-06-221-0/+5
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| * iommu, x86: Add cap_pi_support() to detect VT-d PI capabilityFeng Wu2015-06-121-0/+1
| * Merge branch 'x86/asm' into x86/apic, to resolve a conflictIngo Molnar2015-05-111-3/+15
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| * | irq_remapping/vt-d: Enhance Intel IR driver to support hierarchical irqdomainsJiang Liu2015-04-241-0/+4
* | | iommu/vt-d: Change PASID support to bit 40 of Extended Capability RegisterDavid Woodhouse2015-06-091-1/+2
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* | iommu/vt-d: Add new extended capabilities from v2.3 VT-d specificationDavid Woodhouse2015-03-251-0/+14
* | iommu/vt-d: kill bogus ecap_niotlb_iunits()David Woodhouse2015-03-251-3/+1
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* iommu/vt-d: Make use of IOMMU sysfs supportAlex Williamson2014-07-041-0/+3
* iommu/vt-d: Store PCI segment number in struct intel_iommuDavid Woodhouse2014-03-241-0/+1
* iommu/vt-d: keep shared resources when failed to initialize iommu devicesJiang Liu2014-01-091-1/+0
* iommu/vt-d: mark internal functions as staticJiang Liu2014-01-091-1/+0
* iommu/vt-d: use dedicated bitmap to track remapping entry allocation statusJiang Liu2014-01-071-0/+1
* x86/iommu: correct ICS register offsetLi, Zhen-Hua2013-09-241-1/+1
* iommu/dmar: Reserve mmio space used by the IOMMU, if the BIOS forgets toDonald Dutile2012-06-081-0/+2
* Merge branch 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds2011-10-261-2/+2
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| * locking, x86, iommu: Annotate qi->q_lock as rawThomas Gleixner2011-09-131-1/+1
| * locking, x86, iommu: Annotate iommu->register_lock as rawThomas Gleixner2011-09-131-1/+1
* | iommu: Rename the DMAR and INTR_REMAP config optionsSuresh Siddha2011-09-211-3/+3
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* dmar: support for parsing Remapping Hardware Static Affinity structureSuresh Siddha2009-10-051-0/+1
* intel-iommu: Fix kernel hang if interrupt remapping disabled in BIOSYouquan Song2009-09-111-0/+2
* VT-d: support the device IOTLBYu Zhao2009-05-181-0/+1
* VT-d: add device IOTLB invalidation supportYu Zhao2009-05-181-1/+13
* VT-d: parse ATSR in DMA Remapping Reporting StructureYu Zhao2009-05-181-0/+1
* intel-iommu: Clean up handling of "caching mode" vs. IOTLB flushing.David Woodhouse2009-05-101-5/+4
* intel-iommu: Clean up handling of "caching mode" vs. context flushing.David Woodhouse2009-05-101-4/+4
* Intel IOMMU Pass Through SupportFenghua Yu2009-04-291-0/+2
* intel-iommu: set compatibility format interruptHan, Weidong2009-04-031-0/+2
* Intel IOMMU Suspend/Resume Support - DMARFenghua Yu2009-04-031-0/+11
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