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path: root/include/asm-x86/cpufeature.h
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* x86: add NOPL as a synthetic CPU feature bitH. Peter Anvin2008-09-051-5/+6
* x86: add X86_FEATURE_XMM4_2 definitionsAustin Zhang2008-08-251-0/+2
* x86: APIC: remove apic_write_around(); use alternativesMaciej W. Rozycki2008-07-181-0/+1
* x86_64: add pseudo-features for 32-bit compat syscallJeremy Fitzhardinge2008-07-111-2/+2
*-. Merge branches 'x86/mmio', 'x86/delay', 'x86/idle', 'x86/oprofile', 'x86/debu...Ingo Molnar2008-07-081-0/+1
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| | * x86: add X86_FEATURE_IBS cpu featureRobert Richter2008-06-241-0/+1
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* | x86: setup_force_cpu_cap(): don't do clear_bit(non-unsigned-long)Andrew Morton2008-05-251-2/+2
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* x86: PAT infrastructure patchvenkatesh.pallipadi@intel.com2008-04-171-0/+1
* x86: add cpu_has_arch_perfmonstephane eranian2008-04-171-0/+1
* x86: clean up cpu capabilities accessesIngo Molnar2008-04-171-1/+5
* x86: add feature macros for the gbpages cpuid bitAndi Kleen2008-02-041-0/+2
* x86: unify CPU feature string namesH. Peter Anvin2008-02-041-3/+9
* x86: convert TSC disabling to generic cpuid disable bitmapAndi Kleen2008-01-301-0/+4
* x86: add framework to disable CPUID bits on the command lineAndi Kleen2008-01-301-0/+4
* x86: 64-bit, remove redundant cpu_has_ definitionsKyle McMartin2008-01-301-15/+0
* x86: remove the now unused X86_FEATURE_SYNC_RDTSCAndi Kleen2008-01-301-1/+1
* x86: Implement support to synchronize RDTSC with LFENCE on Intel CPUsAndi Kleen2008-01-301-0/+1
* x86: implement support to synchronize RDTSC through MFENCE on AMD CPUsAndi Kleen2008-01-301-0/+1
* x86: x86-64 wired cpu_has macrosRoland McGrath2008-01-301-0/+12
* x86: add set/clear_cpu_cap operationsJeremy Fitzhardinge2008-01-301-1/+4
* x86: clean up bitops-related warningsJeremy Fitzhardinge2008-01-301-1/+1
* x86: cleanup tlbflush.h variantsThomas Gleixner2008-01-301-0/+9
* x86: unify asm/cpufeature.hH. Peter Anvin2008-01-301-4/+187
* i386/x86_64: move headers to include/asm-x86Thomas Gleixner2007-10-111-0/+5
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