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* [PATCH] Define __raw_get_cpu_var and use itPaul Mackerras2006-06-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | There are several instances of per_cpu(foo, raw_smp_processor_id()), which is semantically equivalent to __get_cpu_var(foo) but without the warning that smp_processor_id() can give if CONFIG_DEBUG_PREEMPT is enabled. For those architectures with optimized per-cpu implementations, namely ia64, powerpc, s390, sparc64 and x86_64, per_cpu() turns into more and slower code than __get_cpu_var(), so it would be preferable to use __get_cpu_var on those platforms. This defines a __raw_get_cpu_var(x) macro which turns into per_cpu(x, raw_smp_processor_id()) on architectures that use the generic per-cpu implementation, and turns into __get_cpu_var(x) on the architectures that have an optimized per-cpu implementation. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] random: remove SA_SAMPLE_RANDOM from floppy driverMatt Mackall2006-06-251-2/+1
| | | | | | | | | The floppy driver is already calling add_disk_randomness as it should, so this was redundant. Signed-off-by: Matt Mackall <mpm@selenic.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Rewritten backlight infrastructure for portable Apple computersMichael Hanselmann2006-06-251-15/+15
| | | | | | | | | | | | | | | | This patch contains a total rewrite of the backlight infrastructure for portable Apple computers. Backward compatibility is retained. A sysfs interface allows userland to control the brightness with more steps than before. Userland is allowed to upload a brightness curve for different monitors, similar to Mac OS X. [akpm@osdl.org: add needed exports] Signed-off-by: Michael Hanselmann <linux-kernel@hansmi.ch> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpcLinus Torvalds2006-06-2238-217/+1129
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (139 commits) [POWERPC] re-enable OProfile for iSeries, using timer interrupt [POWERPC] support ibm,extended-*-frequency properties [POWERPC] Extra sanity check in EEH code [POWERPC] Dont look for class-code in pci children [POWERPC] Fix mdelay badness on shared processor partitions [POWERPC] disable floating point exceptions for init [POWERPC] Unify ppc syscall tables [POWERPC] mpic: add support for serial mode interrupts [POWERPC] pseries: Print PCI slot location code on failure [POWERPC] spufs: one more fix for 64k pages [POWERPC] spufs: fail spu_create with invalid flags [POWERPC] spufs: clear class2 interrupt status before wakeup [POWERPC] spufs: fix Makefile for "make clean" [POWERPC] spufs: remove stop_code from struct spu [POWERPC] spufs: fix spu irq affinity setting [POWERPC] spufs: further abstract priv1 register access [POWERPC] spufs: split the Cell BE support into generic and platform dependant parts [POWERPC] spufs: dont try to access SPE channel 1 count [POWERPC] spufs: use kzalloc in create_spu [POWERPC] spufs: fix initial state of wbox file ... Manually resolved conflicts in: drivers/net/phy/Makefile include/asm-powerpc/spu.h
| * [POWERPC] Fix mdelay badness on shared processor partitionsAnton Blanchard2006-06-211-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On partitioned PPC64 systems where a partition is given 1/10 of a processor, we have seen mdelay() delaying for 10 times longer than it should. The reason is that the generic mdelay(n) does n delays of 1 millisecond each. However, with 1/10 of a processor, we only get a one-millisecond timeslice every 10ms. Thus each 1 millisecond delay loop ends up taking 10ms elapsed time. The solution is just to use the PPC64 udelay function, which uses the timebase to ensure that the delay is based on elapsed time rather than how much processing time the partition has been given. (Yes, the generic mdelay uses the PPC64 udelay, but the problem is that the start time gets reset every millisecond, and each time it gets reset we lose another 9ms.) Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Andrew Morton <akpm@osdl.org>
| * [POWERPC] disable floating point exceptions for initArnd Bergmann2006-06-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Floating point exceptions should not be enabled by default, as this setting impacts the performance on some CPUs, in particular the Cell BE. Since the bits are inherited from parent processes, the place to change the default is the thread struct used for init. glibc sets this up correctly per thread in its fesetenv function, so user space should not be impacted by this setting. None of the other common libc implementations (uClibc, dietlibc, newlib, klibc) has support for fp exceptions, so they are unlikely to be hit by this either. There is a small risk that somebody wrote their own application that manually sets the fpscr bits instead of calling fesetenv, without changing the MSR bits as well. Those programs will break with this change. It probably makes sense to change glibc in the future to be more clever about FE bits, so that when running on a CPU where this is expensive, it disables exceptions ASAP, while it keeps them enabled on CPUs where running with exceptions on is cheaper than changing the state often. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Unify ppc syscall tablesAndreas Schwab2006-06-211-0/+306
| | | | | | | | | | | | | | | | | | Avoid duplication of the syscall table for the cell platform. Based on an idea from David Woodhouse. Signed-off-by: Andreas Schwab <schwab@suse.de> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] mpic: add support for serial mode interruptsMark A. Greer2006-06-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote: > On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote: > > MPC10x-style interrupt controllers have a serial mode that allows > > several interrupts to be clocked in through one INT signal. > > > > This patch adds the software support for that mode. > > You hard code the clock ratio... why not add a separate call to be > called after mpic_init, > something like mpic_set_serial_int(int mpic, int enable, int > clock_ratio) ? How's this? -- MPC10x-style interrupt controllers have a serial mode that allows several interrupts to be clocked in through one INT signal. This patch adds the software support for that mode. Signed-off-by: Mark A. Greer <mgreer@mvista.com> -- arch/powerpc/sysdev/mpic.c | 20 ++++++++++++++++++++ include/asm-powerpc/mpic.h | 10 ++++++++++ 2 files changed, 30 insertions(+) -- Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] spufs: one more fix for 64k pagesarnd@arndb.de2006-06-211-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPU context save/restore code is currently built for a 4k page size and we provide a _shipped version of it since most people don't have the spu toolchain that is needed to rebuild that code. This patch hardcodes the data structures to a 64k page alignment, which also guarantees 4k alignment but unfortunately wastes 60k of memory per SPU context that is created in the running system. We will follow up on this with another patch to reduce that overhead or maybe redo the context save/restore logic to do this part entirely different, but for now it should make experimental systems work with either page size. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] spufs: remove stop_code from struct spuMasato Noguchi2006-06-211-1/+0
| | | | | | | | | | | | | | | | | | | | This patch remove 'stop_code' -- discarded member of struct spu. It is written at initialize and interrupt, but never read in current implementation. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] spufs: fix spu irq affinity settingGeoff Levand2006-06-211-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This changes the hypervisor abstraction of setting cpu affinity to a higher level to avoid platform dependent interrupt controller routines. I replaced spu_priv1_ops:spu_int_route_set() with a new routine spu_priv1_ops:spu_cpu_affinity_set(). As a by-product, this change eliminated what looked like an existing bug in the set affinity code where spu_int_route_set() mistakenly called int_stat_get(). Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] spufs: further abstract priv1 register accessGeoff Levand2006-06-212-23/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support muti-platform binaries the spu hypervisor accessor routines must have runtime binding. I removed the existing statically linked routines in spu.h and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h that operate indirectly through an ops struct spu_priv1_ops. spu_priv1_mmio.c contains the instance of the accessor routines for running on raw hardware. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] cell: register SPUs as sysdevsJeremy Kerr2006-06-211-2/+3
| | | | | | | | | | | | | | | | | | | | | | SPUs are registered as system devices, exposing attributes through sysfs. Since the sysdev includes a kref, we can remove the one in struct spu (it isn't used at the moment anyway). Currently only the interrupt source and numa node attributes are added. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] cell: add RAS supportBenjamin Herrenschmidt2006-06-212-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a first version of support for the Cell BE "Reliability, Availability and Serviceability" features. It doesn't yet handle some of the RAS interrupts (the ones described in iic_is/iic_irr), I'm still working on a proper way to expose these. They are essentially a cascaded controller by themselves (sic !) though I may just handle them locally to the iic driver. I need also to sync with David Erb on the way he hooked in the performance monitor interrupt. So that's all for 2.6.17 and I'll do more work on that with my rework of the powerpc interrupt layer that I'm hacking on at the moment. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Add 8641 Register space and IRQ definitions.Jon Loeliger2006-06-213-0/+332
| | | | | | | | | | | | | | Signed-off-by: Jeff Brown <Jeff.Brown@freescale.com> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] check firmware state before suspendingDave C Boutcher2006-06-152-0/+11
| | | | | | | | | | | | | | | | | | | | Currently the kernel blindly halts all the processors and calls the ibm,suspend-me rtas call. If the firmware is not in the correct state, we then re-start all the processors and return. It is much smarter to first check the firmware state, and only if it is waiting, call the ibm,suspend-me call. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Fix HV bit handling on non partitioned machinesAnton Blanchard2006-06-151-2/+2
| | | | | | | | | | | | | | | | | | On non partitioned machines we currently set the HV bit in kernel space only. It turns out we are supposed to maintain the HV bit in both user and kernel space. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] node local IOMMU tablesAnton Blanchard2006-06-151-1/+2
| | | | | | | | | | | | | | | | Allocate IOMMU tables local to the relevant node. Signed-off-by: Anton Blanchard <anton@samba.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] pcibus_to_node fixesAnton Blanchard2006-06-152-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | of_node_to_nid returns -1 if the associativity cannot be found. This means pcibus_to_cpumask has to be careful not to pass a negative index into node_to_cpumask. Since pcibus_to_node could be used a lot, and of_node_to_nid is slow (it walks a list doing strcmps), lets also cache the node in the pci_controller struct. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Remove stale 64bit on 32bit kernel codeAnton Blanchard2006-06-151-19/+0
| | | | | | | | | | | | | | Remove some stale POWER3/POWER4/970 on 32bit kernel support. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] 64bit FPSCR supportAnton Blanchard2006-06-151-0/+13
| | | | | | | | | | | | | | | | | | | | Forthcoming machines will extend the FPSCR to 64 bits. We already had a 64-bit save area for the FPSCR, but we need to use a new form of the mtfsf instruction. Fortunately this new form is decoded as an ordinary mtfsf by existing 64-bit processors. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] MSI abstractionJake Moilanen2006-06-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of trying to make PPC64 MSI fit in a Intel-centric MSI layer, a simple short-term solution is to hook the pci_{en/dis}able_msi() calls and make a machdep call. The rest of the MSI functions are superfluous for what is needed at this time. Many of which can have machdep calls added as needed. Ben and Michael Ellerman are looking into rewrite the MSI layer to be more generic. However, in the meantime this works as a interim solution. Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Use 64k pages without needing cache-inhibited large pagesPaul Mackerras2006-06-155-8/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some POWER5+ machines can do 64k hardware pages for normal memory but not for cache-inhibited pages. This patch lets us use 64k hardware pages for most user processes on such machines (assuming the kernel has been configured with CONFIG_PPC_64K_PAGES=y). User processes start out using 64k pages and get switched to 4k pages if they use any non-cacheable mappings. With this, we use 64k pages for the vmalloc region and 4k pages for the imalloc region. If anything creates a non-cacheable mapping in the vmalloc region, the vmalloc region will get switched to 4k pages. I don't know of any driver other than the DRM that would do this, though, and these machines don't have AGP. When a region gets switched from 64k pages to 4k pages, we do not have to clear out all the 64k HPTEs from the hash table immediately. We use the _PAGE_COMBO bit in the Linux PTE to indicate whether the page was hashed in as a 64k page or a set of 4k pages. If hash_page is trying to insert a 4k page for a Linux PTE and it sees that it has already been inserted as a 64k page, it first invalidates the 64k HPTE before inserting the 4k HPTE. The hash invalidation routines also use the _PAGE_COMBO bit, to determine whether to look for a 64k HPTE or a set of 4k HPTEs to remove. With those two changes, we can tolerate a mix of 4k and 64k HPTEs in the hash table, and they will all get removed when the address space is torn down. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Remove unused paca->pgdir fieldPaul Mackerras2006-06-122-15/+0
| | | | | | | | | | | | | | The pgdir field in the paca was a leftover from the dynamic VSIDs patch, and is not used in the current kernel code. This removes it. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpcPaul Mackerras2006-06-091-0/+7
| | | | | | | | | | | | | | | | | | This gives the ability to control whether alignment exceptions get fixed up or reported to the process as a SIGBUS, using the existing PR_SET_UNALIGN and PR_GET_UNALIGN prctls. We do not implement the option of logging a message on alignment exceptions. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: Implement support for setting little-endian mode via prctlPaul Mackerras2006-06-092-22/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the PowerPC part of the code to allow processes to change their endian mode via prctl. This also extends the alignment exception handler to be able to fix up alignment exceptions that occur in little-endian mode, both for "PowerPC" little-endian and true little-endian. We always enter signal handlers in big-endian mode -- the support for little-endian mode does not amount to the creation of a little-endian user/kernel ABI. If the signal handler returns, the endian mode is restored to what it was when the signal was delivered. We have two new kernel CPU feature bits, one for PPC little-endian and one for true little-endian. Most of the classic 32-bit processors support PPC little-endian, and this is reflected in the CPU feature table. There are two corresponding feature bits reported to userland in the AT_HWCAP aux vector entry. This is based on an earlier patch by Anton Blanchard. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: oprofile support for POWER6Michael Neuling2006-06-092-3/+12
| | | | | | | | | | | | | | | | | | POWER6 moves some of the MMCRA bits and also requires some bits to be cleared each PMU interrupt. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: node-aware dma allocationsChristoph Hellwig2006-06-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Make sure dma_alloc_coherent allocates memory from the local node. This is important on Cell where we avoid going through the slow cpu interconnect. Note: I could only test this patch on Cell, it should be verified on some pseries machine by those that have the hardware. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: implement pcibus_to_node and pcibus_to_cpumaskChristoph Hellwig2006-06-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | On 64bit powerpc we can find out what node a pci bus hangs off, so implement the topology.h macros that export this information. For 32bit this seems a little more difficult, but I don't know of 32bit powerpc NUMA machines either, so let's leave it out for now. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: reorg RTAS delay codeJohn Rose2006-06-091-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to handle RTAS "busy" return codes in a more simple and consistent manner. Typical callers of RTAS shouldn't have to manage wait times and delay calls. This patch also changes the kernel to use msleep() rather than udelay() when a runtime delay is necessary. This will avoid CPU soft lockups for extended delay conditions. Signed-off-by: John Rose <johnrose@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: Fix buglet with MMU hash managementBenjamin Herrenschmidt2006-06-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our MMU hash management code would not set the "C" bit (changed bit) in the hardware PTE when updating a RO PTE into a RW PTE. That would cause the hardware to possibly to a write back to the hash table to set it on the first store access, which in addition to being a performance issue, might also hit a bug when running with native hash management (non-HV) as our code is specifically optimized for the case where no write back happens. Thus there is a very small therocial window were a hash PTE can become corrupted if that HPTE has just been upgraded to read write, a store access happens on it, and that races with another processor evicting that same slot. Since eviction (caused by an almost full hash) is extremely rare, the bug is very unlikely to happen fortunately. This fixes by allowing the updating of the protection bits in the native hash handling to also set (but not clear) the "C" bit, and, in order to also improve performances in the general case, by always setting that bit on newly inserted hash PTE so that writeback really never happens. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc vdso updatesBenjamin Herrenschmidt2006-06-094-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | This patch cleans up some locking & error handling in the ppc vdso and moves the vdso base pointer from the thread struct to the mm context where it more logically belongs. It brings the powerpc implementation closer to Ingo's new x86 one and also adds an arch_vma_name() function allowing to print [vsdo] in /proc/<pid>/maps if Ingo's x86 vdso patch is also applied. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] powerpc: enable PPC_PTRACE_[GS]ETREGS on ppc32Renzo Davoli2006-06-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | I have tested PPC_PTRACE_GETREGS and PPC_PTRACE_SETREGS on umview. I do not understand why historically these tags has been defined as PPC_PTRACE_GETREGS and PPC_PTRACE_SETREGS instead of simply PTRACE_[GS]ETREGS. The other "originality" is that the address must be put into the "addr" field instead of the "data" field as stated in the manual. Signed-off-by: renzo davoli <renzo@cs.unibo.it> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * Merge branch 'merge'Paul Mackerras2006-06-012-1/+4
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| * | [PATCH] remove powerpc bitops in favor of existing generic bitopsJon Mason2006-05-241-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There already exists a big endian safe bitops implementation in lib/find_next_bit.c. The code in it is 90%+ common with the powerpc specific version, so the powerpc version is redundant. This patch makes the necessary changes to use the generic bitops in powerpc, and removes the powerpc specific version. Signed-off-by: Jon Mason <jdmason@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: remove LogicalSlot from pci_dnStephen Rothwell2006-05-241-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | As we now store enough information in the device_node. Also the Flags field was not used either, do remove that. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: remove Irq from pci_dnStephen Rothwell2006-05-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | As we now store enough information in the device_node to allocate the irq number in pcibios_final_fixup. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: remove iSeries_Global_Device_ListStephen Rothwell2006-05-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | We can now scan the list of device nodes instead. This also allows us to remove the Device_list member of struct pci_dn. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: Add of_parse_dma_window()Jeremy Kerr2006-05-191-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function for generic parsing of dma-window properties (ie, ibm,dma-window and ibm,my-dma-window) of pci and virtual device nodes. This function will also be used by cell. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: udbg_printf() formatting attributejimix@watson.ibm.com2006-05-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows the compiler to catch any printf-like mismatches for udbg_printf(). After some brute force building I've only found issues with my own code and lparcfg.c It could break some developers, but IMHO that would be goodness. Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: Move crashkernel= handling into the kernel.Michael Ellerman2006-05-191-0/+3
| | | | | | | | | | | | | | | | | | This was missing a quilt ref. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: Kdump header cleanupMichael Ellerman2006-05-192-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to know the base address of the kdump kernel even when we're not a kdump kernel, so add a #define for it. Move the logic that sets the kdump kernelbase into kdump.h instead of page.h. Rename kdump_setup() to setup_kdump_trampoline() to make it clearer what it's doing, and add an empty definition for the !CRASH_DUMP case to avoid a Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: Unify mem= handlingMichael Ellerman2006-05-191-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently do mem= handling in three seperate places. And as benh pointed out I wrote two of them. Now that we parse command line parameters earlier we can clean this mess up. Moving the parsing out of prom_init means the device tree might be allocated above the memory limit. If that happens we'd have to move it. As it happens we already have logic to do that for kdump, so just genericise it. This also means we might have reserved regions above the memory limit, if we do the bootmem allocator will blow up, so we have to modify lmb_enforce_memory_limit() to truncate the reserves as well. Tested on P5 LPAR, iSeries, F50, 44p. Tested moving device tree on P5 and 44p and F50. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [PATCH] powerpc: whitespace cleanup in reg.hMichael Neuling2006-05-191-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | In reg.h we mostly have #define<space> but there are a few #define<tab> around. Clean these up so we use space exclusively. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | Merge ../linux-2.6Paul Mackerras2006-05-053-6/+38
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| * | | [PATCH] powerpc: kill union tce_entryOlof Johansson2006-04-291-26/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's been long overdue to kill the union tce_entry in the pSeries/iSeries TCE code, especially since I asked the Summit guys to do it on the code they copied from us. Also, while I was at it, I cleaned up some whitespace. Built and booted on pSeries, built on iSeries. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | [PATCH] powerpc: merge the rest of the vio codeStephen Rothwell2006-04-292-8/+35
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | [PATCH] powerpc: use a common vio_match_device routineStephen Rothwell2006-04-291-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This requires the compatible properties having vaules that are empty strings instead of just being empty properties. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | [PATCH] powerpc: use the device tree for the iSeries vio bus probeStephen Rothwell2006-04-291-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As an added bonus, since every vio_dev now has a device_node associated with it, hotplug now works. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | | Merge branch 'merge'Paul Mackerras2006-04-295-8/+36
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