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* [ARM] move include/asm-arm to arch/arm/include/asmRussell King2008-08-021-224/+0
| | | | | | | Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/plat* alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 5067/1: _raw_write_can_lock macro bugfixsurinder2008-06-021-1/+1
| | | | | | | | | | | The current __raw_write_can_lock macro tests whether the lock can be locked by checking if it is equal to 0x80000000, whereas the lock should be lockable if its value is 0 i.e. unlocked state is represented by 0. Hence the macro should test the value of lock against 0 and not 0x80000000. Signed-off-by: Surinder Pal Singh <srplsnh@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] Remove the last reference to rwlock_is_locked() macro.Robert P. J. Day2007-02-111-1/+0
| | | | | | | | | | Remove the lone, remaining reference to the long-deceased rwlock_is_locked() macro. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] Directed yield: cpu_relax variants for spinlocks and rw-locksMartin Schwidefsky2006-10-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | On systems running with virtual cpus there is optimization potential in regard to spinlocks and rw-locks. If the virtual cpu that has taken a lock is known to a cpu that wants to acquire the same lock it is beneficial to yield the timeslice of the virtual cpu in favour of the cpu that has the lock (directed yield). With CONFIG_PREEMPT="n" this can be implemented by the architecture without common code changes. Powerpc already does this. With CONFIG_PREEMPT="y" the lock loops are coded with _raw_spin_trylock, _raw_read_trylock and _raw_write_trylock in kernel/spinlock.c. If the lock could not be taken cpu_relax is called. A directed yield is not possible because cpu_relax doesn't know anything about the lock. To be able to yield the lock in favour of the current lock holder variants of cpu_relax for spinlocks and rw-locks are needed. The new _raw_spin_relax, _raw_read_relax and _raw_write_relax primitives differ from cpu_relax insofar that they have an argument: a pointer to the lock structure. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Paul Mackerras <paulus@samba.org> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [ARM] 3766/1: Fix typo in ARM _raw_read_trylockCatalin Marinas2006-09-061-1/+1
| | | | | | | | | Patch from Catalin Marinas A comma was missing between tmp and tmp2. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix ARM __raw_read_trylock() implementationRussell King2006-08-311-1/+15
| | | | | | | | Matthew Wilcox pointed out that the generic implementation of this is unfit for use. Here's an ARM optimised version instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3533/1: Implement the __raw_(read|write)_can_lock functions on ARMCatalin Marinas2006-05-191-0/+6
| | | | | | | | | | Patch from Catalin Marinas Recent patches introduced the write_can_lock() call in the kernel/ptrace.c file. Implement the __raw_* variants on ARM (SMP) as well. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM SMP] Use event instructions for spinlocksRussell King2005-12-011-2/+24
| | | | | | | | | | | | | ARMv6K CPUs have SEV (send event) and WFE (wait for event) instructions which allow the CPU clock to be suspended until another CPU issues a SEV, rather than spinning on the lock wasting power. Make use of these instructions. Note that WFE does not wait if an event has been sent since the last WFE cleared the event status, so although it may look racy, the instruction implementation ensures that these are dealt with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Fix ARM rwlock implementationsRussell King2005-11-021-3/+3
| | | | | | | fb1c8f93d869b34cacb8b8932e2b83d96a19d720 broke the ARM rwlock code since it only partially updated the rwlock implementation. Properly update it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] spinlock consolidationIngo Molnar2005-09-101-33/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (written by me and also containing many suggestions of Arjan van de Ven) does a major cleanup of the spinlock code. It does the following things: - consolidates and enhances the spinlock/rwlock debugging code - simplifies the asm/spinlock.h files - encapsulates the raw spinlock type and moves generic spinlock features (such as ->break_lock) into the generic code. - cleans up the spinlock code hierarchy to get rid of the spaghetti. Most notably there's now only a single variant of the debugging code, located in lib/spinlock_debug.c. (previously we had one SMP debugging variant per architecture, plus a separate generic one for UP builds) Also, i've enhanced the rwlock debugging facility, it will now track write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too. All locks have lockup detection now, which will work for both soft and hard spin/rwlock lockups. The arch-level include files now only contain the minimally necessary subset of the spinlock code - all the rest that can be generalized now lives in the generic headers: include/asm-i386/spinlock_types.h | 16 include/asm-x86_64/spinlock_types.h | 16 I have also split up the various spinlock variants into separate files, making it easier to see which does what. The new layout is: SMP | UP ----------------------------|----------------------------------- asm/spinlock_types_smp.h | linux/spinlock_types_up.h linux/spinlock_types.h | linux/spinlock_types.h asm/spinlock_smp.h | linux/spinlock_up.h linux/spinlock_api_smp.h | linux/spinlock_api_up.h linux/spinlock.h | linux/spinlock.h /* * here's the role of the various spinlock/rwlock related include files: * * on SMP builds: * * asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the * initializers * * linux/spinlock_types.h: * defines the generic type and initializers * * asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel * implementations, mostly inline assembly code * * (also included on UP-debug builds:) * * linux/spinlock_api_smp.h: * contains the prototypes for the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. * * on UP builds: * * linux/spinlock_type_up.h: * contains the generic, simplified UP spinlock type. * (which is an empty structure on non-debug builds) * * linux/spinlock_types.h: * defines the generic type and initializers * * linux/spinlock_up.h: * contains the __raw_spin_*()/etc. version of UP * builds. (which are NOPs on non-debug, non-preempt * builds) * * (included on UP-non-debug builds:) * * linux/spinlock_api_up.h: * builds the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. */ All SMP and UP architectures are converted by this patch. arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should be mostly fine. From: Grant Grundler <grundler@parisc-linux.org> Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU). Builds 32-bit SMP kernel (not booted or tested). I did not try to build non-SMP kernels. That should be trivial to fix up later if necessary. I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids some ugly nesting of linux/*.h and asm/*.h files. Those particular locks are well tested and contained entirely inside arch specific code. I do NOT expect any new issues to arise with them. If someone does ever need to use debug/metrics with them, then they will need to unravel this hairball between spinlocks, atomic ops, and bit ops that exist only because parisc has exactly one atomic instruction: LDCW (load and clear word). From: "Luck, Tony" <tony.luck@intel.com> ia64 fix Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjanv@infradead.org> Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Cc: Matthew Wilcox <willy@debian.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se> Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ARM SMP: Add ARMv6 memory barriersRussell King2005-07-261-15/+38
| | | | | | | | Convert explicit gcc asm-based memory barriers into smp_mb() calls. These change between barrier() and the ARMv6 data memory barrier instruction depending on whether ARMv6 SMP is enabled. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [PATCH] ARM SMP: Fix ARMv6 spinlock and semaphore implementationsRussell King2005-07-241-16/+19
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+169
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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