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path: root/drivers/video/omap2/dss/dispc.c
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* OMAPDSS: Change struct reg_field to dispc_reg_fieldJyri Sarha2014-04-141-3/+9
| | | | | | | | | Avoid colision with regmap's struct reg_field definition by renaming omapdss's struct reg_field to dispc_reg_field, and moving it inside dispc.c as that's the only place it is used. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: fix shared irq handlersTomi Valkeinen2014-04-141-7/+48
| | | | | | | | | | | | | | | | | | | | | | DSS uses shared irq handlers for DISPC and DSI, because on OMAP3, the DISPC and DSI share the same irq line. However, the irq handlers presume that the hardware is enabled, which, in theory, may not be the case with shared irq handlers. So if an interrupt happens while the DISPC/DSI is off, the kernel will halt as the irq handler tries to access the DISPC/DSI registers. In practice that should never happen, as both DSI and DISPC are in the same power domain. So if there's an IRQ for one of them, the other is also enabled. However, if CONFIG_DEBUG_SHIRQ is enabled, the kernel will generate a spurious IRQ, which then causes the problem. This patch adds an is_enabled field for both DISPC and DSI, which is used to track if the HW is enabled. For DISPC the code is slightly more complex, as the users of DISPC can register the interrupt handler, and we want to hide the is_enabled handling from the users of DISPC. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* Merge branch '3.15/dss-dt' into 3.15/fbdevTomi Valkeinen2014-03-201-8/+16
|\ | | | | | | Merge OMAP DSS DT support
| * OMAPDSS: Add DT support to DISPCTomi Valkeinen2014-03-191-0/+8
| | | | | | | | | | | | | | Add DT support to DISPC. Only thing needed here is the of_match_table. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit@ti.com>
| * OMAPDSS: DISPC: decimation rounding fixTomi Valkeinen2014-02-111-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver uses DIV_ROUND_UP when calculating decimated width & height. For example, when decimating with 3, the width is calculated as: width = DIV_ROUND_UP(width, decim_x); This yields bad results for some values. For example, 800/3=266.666..., which is rounded to 267. When the input width is set to 267, and pixel increment is set to 3, this causes the dispc to read a line of 801 pixels, i.e. it reads a wrong pixel at the end of the line. Even more pressing, the above rounding causes a BUG() in pixinc(), as the value of 801 is used to calculate row increment, leading to a bad value being passed to pixinc(). This patch fixes the decimation by removing the DIV_ROUND_UP()s when calculating width and height for decimation. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: convert pixel clock to common videomode styleTomi Valkeinen2014-03-051-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | omapdss has its own video-timings struct, but we want to move the common videomode. The first step is to change the omapdss's pixelclock unit from kHz to Hz. Also, omapdss uses "pixel_clock" field name, whereas the common videomode uses "pixelclock" field name. This patch changes the field name also, as that makes it easy to spot any non-converted pixel_clock uses. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: use DISPC register to detect context lossTomi Valkeinen2014-02-281-13/+11
|/ | | | | | | | | | | | | | Instead of relying on the OMAP specific omap_pm_get_dev_context_loss_count() to detect register context loss, we can achieve the same in a much simpler way by just observing the DISPC registers. We always set DISPC's load mode to LOAD_FRAME_ONLY, which is not the reset value. Thus we can just observe the load mode to see if we have lost register context. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit@ti.com>
* Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2014-01-291-1/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull drm updates from Dave Airlie: "Been a bit busy, first week of kids school, and waiting on other trees to go in before I could send this, so its a bit later than I'd normally like. Highlights: - core: timestamp fixes, lots of misc cleanups - new drivers: bochs virtual vga - vmwgfx: major overhaul for their nextgen virt gpu. - i915: runtime D3 on HSW, watermark fixes, power well work, fbc fixes, bdw is no longer prelim. - nouveau: gk110/208 acceleration, more pm groundwork, old overlay support - radeon: dpm rework and clockgating for CIK, pci config reset, big endian fixes - tegra: panel support and DSI support, build as module, prime. - armada, omap, gma500, rcar, exynos, mgag200, cirrus, ast: fixes - msm: hdmi support for mdp5" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (595 commits) drm/nouveau: resume display if any later suspend bits fail drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip drm/nouveau: implement hooks for needed for drm vblank timestamping support drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping drm/nv50: fill in crtc mode struct members from crtc_mode_fixup drm/radeon/dce8: workaround for atom BlankCrtc table drm/radeon/DCE4+: clear bios scratch dpms bit (v2) drm/radeon: set si_notify_smc_display_change properly drm/radeon: fix DAC interrupt handling on DCE5+ drm/radeon: clean up active vram sizing drm/radeon: skip async dma init on r6xx drm/radeon/runpm: don't runtime suspend non-PX cards drm/radeon: add ring to fence trace functions drm/radeon: add missing trace point drm/radeon: fix VMID use tracking drm: ast,cirrus,mgag200: use drm_can_sleep drm/gma500: Lock struct_mutex around cursor updates drm/i915: Fix the offset issue for the stolen GEM objects DRM: armada: fix missing DRM_KMS_FB_HELPER select drm/i915: Decouple GPU error reporting from ring initialisation ...
| * drm/omap: fix (un)registering irqs inside an irq handlerTomi Valkeinen2014-01-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | omapdrm (un)registers irqs inside an irq handler. The problem is that the (un)register function uses dispc_runtime_get/put() to enable the clocks, and those functions are not irq safe by default. This was kind of fixed in 48664b21aeeffb40c5fa06843f18052e2c4ec9ef (OMAPDSS: DISPC: set irq_safe for runtime PM), which makes dispc's runtime calls irq-safe. However, using pm_runtime_irq_safe in dispc makes the parent of dispc, dss, always enabled, effectively preventing PM for the whole DSS module. This patch makes omapdrm behave better by adding new irq (un)register functions that do not use dispc_runtime_get/put, and using those functions in interrupt context. Thus we can make dispc again non-irq-safe, allowing proper PM. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Rob Clark <robdclark@gmail.com>
* | OMAPDSS: DISPC: Fix 34xx overlay scaling calculationIvaylo Dimitrov2014-01-141-9/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 7faa92339bbb1e6b9a80983b206642517327eb75 OMAPDSS: DISPC: Handle synclost errors in OMAP3 introduces limits check to prevent SYNCLOST errors on OMAP3. However, it misses the logic found in Nokia kernels that is needed to correctly calculate whether 3 tap or 5 tap rescaler to be used as well as the logic to fallback to 3 taps if 5 taps clock results in too tight horizontal timings. Without that patch "horizontal timing too tight" errors are seen when a video with resolution above 640x350 is tried to be played. The patch is a forward-ported logic found in Nokia N900 and N9/50 kernels. Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: DISPC: Preload more data in pipeline DMAs for OMAP4+ SoCsArchit Taneja2014-01-131-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DISPC pipeline DMAs preload some bytes of pixel data in the vertical blanking region before the start of each frame. The preload ensures the pipeline doesn't underflow when the active region of the display starts. DISPC_GFX/VIDp_PRELOAD registers allow us to program how many bytes of data should be preloaded for each pipeline. Calculating a precise preload value would be a complex function of the pixel clock of the connected display, the vertical blanking duration and the interconnect traffic at that instance. If the register is left untouched, a default value is preloaded. We observe underflows for OMAP4+ SoCs for certain bandwidth intensive use cases with many other initiators active, and in situations where memory access isn't very efficient(like accessing Tiler mapped buffers and EMIF configured in non-interleaved more). The cause of the underflow is because the default preload value isn't sufficient for the DMA to reach a steady state. We configure the PRELOAD register such that the pipelines preload data up to the high threshold of the FIFO. Preloading lot of data for older SoCs can have a negative impact. Due to slower interconnects, it's possible that the DISPC DMA cannot preload up to the high threshold within the vertical blanking region of the panel. We leave the PRELOAD registers to their reset values since we haven't faced underflows with these SoCs because of low value of PRELOAD. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: DISPC: fix context restoreTomi Valkeinen2014-01-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | DISPC_MSTANDBY_CTRL register is used in the driver, but it's not restored in dispc_restore_context(), causing problems after resume. Instead of adding DISPC_MSTANDBY_CTRL to dispc_restore_context(), let's call _omap_dispc_initial_config() as the first thing in dispc_runtime_resume(). This will initialize the DISPC core registers properly, and will avoid similar issues in the future. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: DISPC: Add MFLAG definesTomi Valkeinen2013-12-301-0/+4
| | | | | | | | | | | | | | OMAP5 has MFLAG feature in DISPC. Add the register definition and dump it. The register is not used yet, though. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: fix missing EXPORT_SYMBOL()sTomi Valkeinen2013-12-301-0/+2
|/ | | | | | | | Functions dispc_ovl_set_fifo_threshold and dispc_ovl_compute_fifo_thresholds need to be exported. Add the EXPORT_SYMBOLs. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* Merge tag 'fbdev-3.13' of ↵Linus Torvalds2013-11-141-5/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux Pull fbdev changes from Tomi Valkeinen: "Nothing particularly stands out in this pull request. The biggest part of the changes are cleanups. Maybe one fix to mention is the "fb: reorder the lock sequence to fix potential dead lock" which hopefully fixes the fb locking issues reported by multiple persons. There are also a few commits that have changes to arch/arm/mach-at91 and arch/avr32, which have been acked by the maintainers" * tag 'fbdev-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (143 commits) fb: reorder the lock sequence to fix potential dead lock fbdev: shmobile-lcdcfb: Convert to clk_prepare/unprepare fbdev: shmobile-hdmi: Convert to clk_prepare/unprepare omapdss: Add new panel driver for Topolly td028ttec1 LCD. video: exynos_mipi_dsi: Unlock the mutex before returning video: da8xx-fb: remove unwanted define video: Remove unnecessary semicolons simplefb: use write-combined remapping simplefb: fix unmapping fb during destruction OMAPDSS: connector-dvi: fix releasing i2c_adapter OMAPDSS: DSI: fix perf measuring ifdefs framebuffer: Use fb_<level> framebuffer: Add fb_<level> convenience logging macros efifb: prevent null-deref when iterating dmi_list fbdev: fix error return code in metronomefb_probe() video: xilinxfb: Fix for "Use standard variable name convention" OMAPDSS: Fix de_level in videomode_to_omap_video_timings() video: xilinxfb: Simplify error path video: xilinxfb: Use devm_kzalloc instead of kzalloc video: xilinxfb: Use standard variable name convention ...
| * video: Remove unnecessary semicolonsJoe Perches2013-10-301-1/+1
| | | | | | | | | | | | | | These aren't necessary after switch, for, and if blocks. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAPDSS: DISPC: Fix assignment of 0/1 to bool variablesPeter Senna Tschudin2013-09-231-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert 0 to false and 1 to true when assigning values to bool variables. Inspired by commit 3db1cd5c05f35fb43eb134df6f321de4e63141f2. The simplified semantic patch that find this problem is as follows (http://coccinelle.lip6.fr/): @@ bool b; @@ ( -b = 0 +b = false | -b = 1 +b = true ) Signed-off-by: Peter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | OMAPDSS: DISPC: set irq_safe for runtime PMTomi Valkeinen2013-09-191-0/+1
|/ | | | | | | | | | | | | | | | | | | | We have a bug with omapdrm, where omapdrm calls dispc's pm_runtime function in atomic context, and dispc's pm_runtime is not marked as irq_safe: BUG: sleeping function called from invalid context at drivers/base/power/runtime.c:952 Dispc's runtime PM callbacks are irq safe, so we can just set the irq_safe flag to fix the issue. However, in the long term, I'd rather have omapdrm manage the runtime PM calls in a better way. Calling get/put for every small operation that touches the dispc registers is very inefficient. It'd be better and cleaner to have clear "in-use" and "not-in-use" states for dispc, so that we don't need to do register context restore for small operations, only to turn dispc off right afterwards. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: remove dispc's dependency to VENC/HDMITomi Valkeinen2013-06-171-13/+7
| | | | | | | | | | | | | | DISPC needs to know the clock rate for DIGIT (i.e. TV) channel, and this clock is provided by either VENC or HDMI modules. Currently DISPC will call a function in VENC/HDMI, asking what the clock rate is. This means we have a fixed dependency from DISPC to both VENC and HDMI. To have a more generic approach, and in particular to allow adding OMAP5 HDMI driver, we need to remove this dependency. This patch makes VENC/HDMI inform DISPC when the their clock changes, thus reversing the dependency and removing the issue. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDRM: fix overlay manager handlingTomi Valkeinen2013-06-171-0/+4
| | | | | | | | | | | | | | | | | | | | | Currently omapdrm creates crtcs, which map directly to DSS overlay managers, only on demand at init time. This would make it difficult to manage connecting the display entities in the future, as the code cannot just search for a suitable overlay manager. We cannot fix this the sane way, which would be to create crtcs for each overlay manager, because we need an overlay for each crtc. With limited number of overlays, that's not possible. So the solution for now is to detach the overlay manager from the crtc. crtcs are still created on demand at init time, but all overlay managers are always initialized by the omapdss. This way we can create and connect whole display pipelines from the overlay manager to the display, regardless of which crtcs omapdrm would create. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
*-. OMAPDSS: Merge omapdss topic branchesTomi Valkeinen2013-04-151-62/+114
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| | * OMAPDSS: DISPC: Revert to older DISPC Smart Standby mechanism for OMAP5Archit Taneja2013-04-101-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DISPC on OMAP5 has a more optimised mechanism of asserting Mstandby to achieve more power savings when DISPC is configured in Smart Standby mode. This mechanism leads to underflows when multiple DISPC pipes are enabled. There is a register field which can let us revert to the older mechanism of asserting Mstandby. Configure this field to prevent underflows. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| | * OMAPDSS: DISPC: Configure doublestride for NV12 when using 2D Tiler buffersArchit Taneja2013-04-101-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using a DISPC video pipeline to a fetch a NV12 buffer in a 2D container, we need to set set a doublestride bit in the video pipe's ATTRIBUTES register. This is needed because the stride for the UV plane(using a 16 bit Tiler container) is double the stride for the Y plane(using a 8 bit Tiler container) for the 0 or 180 degree views. The ROW_INC register is meant for the Y plane, and the HW will calculate the row increment needed for the UV plane by using double the stride value based on whether this bit is set or not. Set the bit when we are using a 2D Tiler buffer and when rotation is 0 or 180 degrees. The stride value is the same for 90 and 270 degree Tiler views, hence the bit shouldn't be set. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| | * omapdss: DISPC: add max pixel clock limits for LCD and TV managersArchit Taneja2013-04-101-5/+27
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each version of OMAP has a limitation on the maximum pixel clock frequency supported by an overlay manager. This limit isn't checked by omapdss. Add dispc feats for lcd and tv managers and check whether the target timings can be supported or not. The pixel clock limitations are actually more complex. They depend on which OPP OMAP is in, and they also depend on which encoder is the manager connected to. The OPP dependence is ignored as DSS forces the PM framework to be on OPP100 when DSS is enabled, and the encoder dependencies are ignored by DISPC for now. These limits should come from the encoder driver. The OMAP2 TRM doesn't mention the maximum pixel clock limit. This value is left as half of DSS_FCLK, as OMAP2 requires the PCD to be atleast 2. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAPDSS: remove unused old clock calculation codeTomi Valkeinen2013-04-031-48/+0
| | | | | | | | | | | | | | Now that the old clock calculation code is no longer used, we can remove it from the driver. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAPDSS: DISPC: add new clock calculation codeTomi Valkeinen2013-04-031-0/+60
| | | | | | | | | | | | | | | | | | Add new way to iterate over DISPC clock divisors. dispc_div_calc() provides a generic way to go over all the divisors, within given pixel clock range. dispc_div_calc() will call a callback function for each divider set, making the function reusable for all use cases. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
| * OMAPDSS: DISPC: store core clk rateTomi Valkeinen2013-04-031-9/+9
|/ | | | | | | Store dispc core clock rate so that it's available for calculations even if the HW is disabled. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: remove dispc fck usesTomi Valkeinen2012-12-121-14/+0
| | | | | | | | The previous patch changes dispc to get the dispc fck rate from dss core driver. This was the only use of the dispc fck in dispc, and thus we can now remove the clock handling. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: get dss clock rate from dss driverTomi Valkeinen2012-12-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Dispc currently gets dispc's fck with clk_get() and uses clk_get_rate() to get the rate for scaling calculations. This causes a problem with common clock framework, as omapdss uses the dispc functions inside a spinlock, and common clock framework uses a mutex in clk_get_rate(). Looking at the DSS clock tree, the above use of the dispc fck is not quite correct. The DSS_FCLK from PRCM goes to DSS core block, which has a mux to select the clock for DISPC from various options, so the current use of dispc fck bypasses that. Fortunately we never change the dispc clock mux for now. To fix the issue with clk_get_rate(), this patch caches the dss clock rate in dss.c when it is set. Dispc will then ask for the clock rate from dss. While this is not very elegant, it does fix the issue, and it's not totally wrong when considering that the dispc fck actually comes via dss. In the future we should probably look into common clock framework and see if that could be used to represent the DSS clock tree properly. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: export dispc functionsTomi Valkeinen2012-12-071-0/+23
| | | | | | Export DISPC functions. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: add dispc_ovl_check()Tomi Valkeinen2012-12-071-0/+40
| | | | | | | | | This patch adds a new function, dispc_ovl_check(), which can be used to verify scaling configuration for an overlay. The function gets both the overlay and overlay manager as parameters, so that the caller does not need to configure the hardware before using this function. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: move irq handling to dispc-compatTomi Valkeinen2012-12-071-426/+11
| | | | | | | | | | | The whole dispc irq handling system we currently have is only needed for compat layer, and thus can be moved from dispc.c to the compat layer. This is quite straigtforward, but we need to add new dispc functions to request and free the actual hardware irq: dispc_request_irq() and dispc_free_irq(). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: move omap_dispc_wait_for_irq_interruptible_timeout to dispc-compat.cTomi Valkeinen2012-12-071-57/+0
| | | | | | | | | | | | | We have two functions to wait for a dispc interrupt: int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout); int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, Of these, the former is not used at all, and can be removed. The latter is only used by the compat layer, and can be moved to the compat layer code. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: move blocking mgr enable/disable to compat layerTomi Valkeinen2012-12-071-175/+0
| | | | | | | | | | | | | dispc_mgr_enable_sync and dispc_mgr_disable_sync are only used with the compat mode. Non-compat will use the simpler enable and disable functions. This patch moves the synchronous enable/disable code to the compat layer. A new file is created, dispc-compat.c, which contains low level dispc compat code (versus apply.c, which contains slightly higher level compat code). Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: Use only "omapdss_dss" platform device to get context lost countArchit Taneja2012-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling a hwmod, omap_hwmod refers to the register mentioned in the hwmod struct's member 'prcm.omap4.context_offs' to see whether context was lost or not. It increments the context lost count for the hwmod and then clears the register. All the DSS hwmods have the same register(RM_DSS_DSS_CONTEXT) as context_offs. When DSS is enabled, the first hwmod to be enabled is the "dss_core" hwmod since it's corresponding platform device is the parent platform device("omapdss_dss"). The dss_core hwmod updates it's context lost count correctly and clears the register. When the hwmods corresponding to the children platform devices are enabled, they see that the register is clear, and don't increment their context lost count. Therefore, all the children platform devices never report a loss in context. The DISPC driver currently gets the context lost count for DSS power domain from it's corresponding platform device instance("omapdss_dispc"). The DISPC platform device is one of the child devices, and it's corresponding hwmod("dss_dispc") doesn't report the context lost count correctly. Modify dss_get_ctx_loss_count() such that it always takes the "omapdss_dss" platform device as it's input, move the function to dss.c so that it has access to that platform device. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: pass pclk & lclk to dispc_ovl_calc_scalingTomi Valkeinen2012-11-271-5/+5
| | | | | | | | | | | | In order to make the scaling calculations independent of the current hardware configuration (e.g. which manager is connected to this output), we need to change the calc funcs to get all the variables needed for the calculations via parameters. This patch changes dispc_ovl_calc_scaling to get pclk and lclk as parameters. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: pass pclk & lclk to calc_scalingTomi Valkeinen2012-11-271-9/+7
| | | | | | | | | | | In order to make the scaling calculations independent of the current hardware configuration (e.g. which manager is connected to this output), we need to change the calc funcs to get all the variables needed for the calculations via parameters. This patch changes calc_scaling to get pclk and lclk as parameters. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: pass pclk & lclk to check_horiz_timing_omap3Tomi Valkeinen2012-11-271-6/+5
| | | | | | | | | | | | In order to make the scaling calculations independent of the current hardware configuration (e.g. which manager is connected to this output), we need to change the calc funcs to get all the variables needed for the calculations via parameters. This patch changes check_horiz_timing_omap3() to get pclk and lclk as parameters. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: pass pclk to calc_core_clk()Tomi Valkeinen2012-11-271-19/+12
| | | | | | | | | | | In order to make the scaling calculations independent of the current hardware configuration (e.g. which manager is connected to this output), we need to change the calc funcs to get all the variables needed for the calculations via parameters. This patch changes calc_core_clk() function to get pclk as a parameter. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: pclk & lclk rates for writebackTomi Valkeinen2012-11-271-2/+12
| | | | | | | | | Change the dispc_plane_pclk_rate and dispc_plane_lclk_rate functions to return 0 if the given plane is the writeback plane. The clocks are not valid for WB, but returning 0 from these functions instead of running into BUG() will simplify the code that uses these functions. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: use WARN_ON() in dispc_mgr_goTomi Valkeinen2012-11-271-14/+2
| | | | | | | | dispc_mgr_go() should never be called with manager output disabled or if the GO bit is already set. Change the current silent returns to WARN_ONs. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: cleanup WB enable/is_enabled functionsTomi Valkeinen2012-11-271-2/+2
| | | | | | | | Instead of doing direct register reads/writes, dispc_wb_enable() and dispc_wb_is_enabled() functions can use the common overlay functions to set and check the enable bit. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Remove blocking code from dispc_wb_enable()Tomi Valkeinen2012-11-271-33/+2
| | | | | | | | | | WB will not be used with compat-mode, i.e. from omapfb. This means we don't need the current complex dispc_wb_enable function, but can have a simple register write version of the function. This patch removes all the extra code from dispc_wb_enable() Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: use get_framedone_irq in disable_digit_outTomi Valkeinen2012-11-271-9/+10
| | | | | | | | | | | | | dispc_mgr_disable_digit_out() needs to wait until the DIGIT output is turned off. This is done with either VSYNC irq on OMAP2/3 and FRAMEDONETV on OMAP4+. It currently uses a rather hacky way to decide what irq to use. This patch changes dispc_mgr_disable_digit_out to use dispc_mgr_get_framedone_irq to find out if there's framedone irq on this SoC, and if not, uses VSYNC. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: add no_framedone_tv featTomi Valkeinen2012-11-271-1/+10
| | | | | | | | | | | | OMAP2/3 do not have FRAMEDONETV irq, but later omaps do. We currently always return 0 from dispc_mgr_get_framedone_irq() for TV output to be compatible with OMAP2/3. This patch implements "no_framedone_tv" dispc-feature that is used in dispc_mgr_get_framedone_irq to return either 0 for OMAP2/3, or the correct IRQ number for FRAMEDONETV on OMAP4+. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: Add a dispc_features struct for OMAP5Archit Taneja2012-11-201-1/+18
| | | | | | | | | Add a dispc_features struct for OMAP5. Previously, OMAP5 used the same struct as OMAP4. The new struct for OMAP5 contains the updated register field offset and maximum limit for overlay manager width and height. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: Add overlay manager width and height limits as a dispc featureArchit Taneja2012-11-201-3/+25
| | | | | | | | | | | The overlay manager width and height vary in OMAP5 from previous OMAPs in terms of maximum limit and register field positions. Add parameters in dispc_features for these. Also remove params related to manager width and height from dss_features, as we want to maintain a feature list for individual IPs. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Use output width and height to calculate row/pix inc for ↵Archit Taneja2012-11-121-5/+13
| | | | | | | | | | | | | | | | | | | | | | writeback When calculating row and pixel increments for graphics and video pipes, we need to consider the dimensions of the input frame to know how to read from the buffer. Hence, we need to calculate these parameters from the input to the pipeline. For writeback, the row and pixel increments need to be calculated based on the output of the writeback pipeline, i.e, the dimensions of the frame after scaling. Ensure that dispc driver uses values of out_width and out_height when calling calc_dma/calc_tiler_rotation_offset. For graphics and video pipes, the original code passed the original height as frame_height to calc_dma_rotation_offset, and not the predecimated height. This is left as it is for now. We need to figure out why pre decimated height isn't needed. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Don't allow predecimation for writebackArchit Taneja2012-11-121-3/+8
| | | | | | | | | Since writeback writes to a buffer instead of reading from one, predecimation doesn't make sense for it. Configure the width and height predecimation limits to 1 if the plane is writeback. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Fix calc_scaling_44xx() bugs for writeback pipelineArchit Taneja2012-11-121-4/+6
| | | | | | | | | | | | | | | | | dispc_ovl_calc_scaling_44xx() doesn't work correctly for writeback. There are two issues with it: - the function tries to calculate pixel clock for the input plane using dispc_plane_pclk_rate(), calling this with writeback as input plane results in a BUG(), this function shouldn't be called for writeback at all. Fix this by calculating pixel clock only when we are not in mem to mem mode. - the maximum input_width is the product of the downscale ratio supported and the and the given output_width. This was calculated incorrectly by dividing output_width with maxdownscale. Fix this. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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