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path: root/drivers/video/omap2/dss/dispc.c
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* OMAPDSS: use sync versions of pm_runtime_putTomi Valkeinen2012-01-261-1/+1
| | | | | | | | | | | | | | | | | | | | omapdss doesn't work properly on system suspend. The problem seems to be the fact that omapdss uses pm_runtime_put() functions when turning off the hardware, and when system suspend is in process only sync versions are allowed. Using non-sync versions normally and sync versions when suspending would need rather ugly hacks to convey the information of suspending/not-suspending to different functions. Optimally the driver wouldn't even need to care about this, and the PM layer would handle syncing when suspend is in process. This patch changes all omapdss's pm_runtime_put calls to pm_runtime_put_sync. This fixes the suspend problem, and probably the performance penalty of always using sync versions is negligible. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Kevin Hilman <khilman@ti.com>
* OMAPDSS: DISPC: Update Scaling Clock LogicChandrabhanu Mahapatra2012-01-021-20/+46
| | | | | | | | | | | | | | | | | | | Clock requirements for scaling in OMAP2, OMAP3 and OMAP4 are different. In OMAP2 and OMAP3 the required clock rate is a function of pixel clock, vertical downscale ratio and horizontal downscale ratio whereas in OMAP4 it is a function of pixel clock and horizontal downscale ratio only. Selection of 3-tap vs 5-tap coefficients depends on clock rate line buffer width in OMAP3 whereas in OMAP4 it is independent of clock rate and line buffer width. In OMAP2 3-tap for vertical and 5-tap for horizontal scaling is used. In OMAP4 5-tap is used both for horizontal and vertical scaling for better performance. Also, the number and width of line buffers differs in OMAP3 and OMAP4. So, clock functions have been fined tuned for OMAP3 and support has been added added for OMAP4. This code has been tested on OMAP2, OMAP3 and OMAP4, and scaling issues due to clock errors have been resolved. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Update Fir CoefficientsChandrabhanu Mahapatra2012-01-021-118/+19
| | | | | | | | | | | | | | | | | | | | | | | | | The FIR coefficients present in kernel are being updated to new coefficients consisting of 24 coefficient tables, with 12 each for 3 tap and 5 tap scenario, which are chosen on the basis of DISPC up/downsampling filters M value. M is the inverse of low pass cut off frequency of the sampling filter. For vertical scaling 3 tap or 5 tap tables are used based on the clock rate and width of the line buffer whereas in OMAP2 3 tap is always used. For horizontal scaling however 5 tap tables are always used. New coefficients and the corresponding logic have been tested on OMAP2, OMAP3 and OMAP4. Horizontal and vertical scaling worked fine except for some 3 tap vs 5 tap issue during vertical upscaling and clock failing issues which is acknowledged in the next patch. Vertical upscaling was found to perform better under 5 taps. The 24 coefficient tables have been moved to another file dispc_coefs.c for proper maintainance. This code is written based on code written by Lajos Molnar <lajos@ti.com> in Android Kernel for scaling. Lajos Molnar <lajos@ti.com> had fine tuned the FIR coefficient selection process and reduced outliness and blockiness around images when upscaling more than 2 times. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: fix potential NULL pointer ref in OCP_ERR handling pathRob Clark2012-01-021-1/+2
| | | | | | | | | | | The dispc's error handler tries to disable all outputs when OCP_ERR happens. However, the code doesn't check if there actually is a display on each particular output, nor if there's a driver for the display. This may lead to NULL pointer reference. Signed-off-by: Rob Clark <rob@ti.com> [tomi.valkeinen@ti.com: added patch description] Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: add dispc_mgr_get_framedone_irqTomi Valkeinen2011-12-021-0/+14
| | | | | | | | | | | | | | | | | Add dispc_mgr_get_framedone_irq() which returns the irq number for FRAMEDONE for the given channel. Note that the function returns always 0 for DIGIT channel, even if OMAP4 does have FRAMEDONE_TV interrupt. The reason for this is that this function is currently used only to track manual updates, and thus FRAMEDONE_TV is not needed. If there's need in the future to also get the FRAMEDONE_TV this needs revisiting. However, as FRAMEDONE_TV doesn't exist on OMAP2/3, the use of this function for that purpose needs some extra code to handle the OMAP2/3 case. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Add dispc_mgr_get_vsync_irq()Tomi Valkeinen2011-12-021-0/+14
| | | | | | | Add dispc_mgr_get_vsync_irq() which returns the irq number for vsync on the given channel. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: remove unused functionsTomi Valkeinen2011-12-021-65/+0
| | | | | | | | | | | Remove unused functions: dispc_mgr_get_default_color dispc_mgr_get_trans_key dispc_mgr_trans_key_enabled dispc_mgr_alpha_fixed_zorder_enabled Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: setup manager with dispc_mgr_setup()Tomi Valkeinen2011-12-021-6/+20
| | | | | | | | Change manager configuration to be similar to overlay configuration by creating dispc_mgr_setup() which takes omap_overlay_manager_info as parameter. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: separate overlay channel from ovl_setupTomi Valkeinen2011-12-021-3/+37
| | | | | | | | Overlay channel is configured with ovl_setup, with all the other overlay attriutes. This patch separates overlay channel setup so that we can later configure the channel only when needed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: separate FIFO threshold setup from ovl_setupTomi Valkeinen2011-12-021-6/+4
| | | | | | | | Overlay FIFO thresholds are configured with ovl_setup, with all the other overlay attributes. This patch separates FIFO threshold setup so that we can later configure FIFO thresholds only when needed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: handle 0 out_width/out_height in ovl_setup()Tomi Valkeinen2011-12-021-9/+13
| | | | | | | | | | | | Overlay out_width/height are set to 0 when scaling is not used by the users of omapdss. Currently ovl_setup() expects the caller of ovl_setup() to convert those zero values to width or height. This patch makes ovl_setup() accept zero values for out_width/height, making calling ovl_setup() a bit simpler as the overlay_info can be just passed to this function without modifications. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: make dispc_ovl_set_fifo_threshold() publicTomi Valkeinen2011-12-021-2/+1
| | | | | | | Make dispc_ovl_set_fifo_threshold() public so that later patches can handle overlay fifo configuration. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: make dispc_ovl_set_channel_out() publicTomi Valkeinen2011-12-021-2/+1
| | | | | | | Make dispc_ovl_set_channel_out() public so that later patches can handle changing overlay's manager. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Flush posted writes when enabling outputsTomi Valkeinen2011-12-021-2/+8
| | | | | | | | Flush posted write in _enable_lcd_out() and _enable_digit_out(). This ensures the the lcd/digit bit is written before the code starts waiting for interrupts about enabling/disabling the output. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: skip scaling calculations when not scalingTomi Valkeinen2011-11-181-6/+5
| | | | | | | | | | | | | | | | | | | | | | Current code calculates scaling factors for video overlays even when the overlays are not scaled. Change the code to skip calculations when not scaling. This optimizes the code a bit, but also fixes a problem when configuring an overlay for a disabled display: if the display is disabled we don't necessarily know the pixel clock used when the display is enabled, and in some cases (like HDMI) the pixel clock is set to zero until a proper video mode is set later. A wrong pixel clock will mess up the scaling calculations, causing an error like: omapdss DISPC error: failed to set up scaling, required fclk rate = 0 Hz, current fclk rate = 170666666 Hz A proper fix would be to check later whether the clocks are enough for the scaling, at the point when the overlay or display is actually enabled, but this patch removes the problem for now. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* video: Add export.h for THIS_MODULE/EXPORT_SYMBOL to drivers/videoPaul Gortmaker2011-10-311-0/+1
| | | | | | | | | With module.h being implicitly everywhere via device.h, the absence of explicitly including something for EXPORT_SYMBOL went unnoticed. Since we are heading to fix things up and clean module.h from the device.h file, we need to explicitly include these files now. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* OMAPDSS: DISPC: zorder support for DSS overlaysArchit Taneja2011-10-031-0/+24
| | | | | | | | | | | | | | | | | Add zorder support on OMAP4, this feature allows deciding the visibility order of the overlays based on the zorder value provided as an overlay info parameter or a sysfs attribute of the overlay object. Use the overlay cap OMAP_DSS_OVL_CAP_ZORDER to determine whether zorder is supported for the overlay or not. Use dss feature FEAT_ALPHA_FREE_ZORDER if the caps are not available. Ensure that all overlays that are enabled and connected to the same manager have different zorders. Swapping zorders of 2 enabled overlays currently requires disabling one of the overlays. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: VIDEO3 pipeline supportArchit Taneja2011-10-031-3/+14
| | | | | | | | | | | Add support for VIDEO3 pipeline on OMAP4: - Add VIDEO3 pipeline information in dss_features and omapdss.h - Add VIDEO3 pipeline register coefficients in dispc.h - Create a new overlay structure corresponding to VIDEO3. - Make changes in dispc.c for VIDEO3 Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS/OMAP_VOUT: Fix incorrect OMAP3-alpha compatibility settingArchit Taneja2011-10-031-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP3, in order to enable alpha blending for LCD and TV managers, we needed to set LCDALPHABLENDERENABLE/TVALPHABLENDERENABLE bits in DISPC_CONFIG. On OMAP4, alpha blending is always enabled by default, if the above bits are set, we switch to an OMAP3 compatibility mode where the zorder values in the pipeline attribute registers are ignored and a fixed priority is configured. Rename the manager_info member "alpha_enabled" to "partial_alpha_enabled" for more clarity. Introduce two dss_features FEAT_ALPHA_FIXED_ZORDER and FEAT_ALPHA_FREE_ZORDER which represent OMAP3-alpha compatibility mode and OMAP4 alpha mode respectively. Introduce an overlay cap for ZORDER. The DSS2 user is expected to check for the ZORDER cap, if an overlay doesn't have this cap, the user is expected to set the parameter partial_alpha_enabled. If the overlay has ZORDER cap, the DSS2 user can assume that alpha blending is already enabled. Don't support OMAP3 compatibility mode for now. Trying to read/write to alpha_blending_enabled sysfs attribute issues a warning for OMAP4 and does not set the LCDALPHABLENDERENABLE/TVALPHABLENDERENABLE bits. Change alpha_enabled to partial_alpha_enabled in the omap_vout driver. Use overlay cap "OMAP_DSS_OVL_CAP_GLOBAL_ALPHA" to check if overlay supports alpha blending or not. Replace this with checks for VIDEO1 pipeline. Cc: linux-media@vger.kernel.org Cc: Lajos Molnar <molnar@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> Acked-by: Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: FEATURES: Create a range param to get max downscalingArchit Taneja2011-09-301-1/+1
| | | | | | | | | Create a dss_range_param member called FEAT_PARAM_DOWNSCALE to get the maximum downscaling possible on the current platform. Use this in dispc_ovl_calc_scaling(). Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Clean up scaling related clock and five tap calculationsArchit Taneja2011-09-301-58/+73
| | | | | | | | | Move DISPC scaling related code from dispc_ovl_setup() to a new function dispc_ovl_calc_scaling(). Use overlay caps to check if the overlay can scale or not. No functional changes are made. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Remove hardcoded use of PPL in five tap clock calculationArchit Taneja2011-09-301-2/+2
| | | | | | | | | | | The function calc_fclk_five_taps() uses a fixed value of pixels per line which is used in calculations to get the minimum fclk needed for scaling with five taps to work. Remove this by providing the width of the panel connected to the manager. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Get correct pixel clock for TV managerArchit Taneja2011-09-301-8/+29
| | | | | | | | | | | | | | dispc_mgr_pclk_rate() is used to calculate minimum required functional clock for scaling in calc_fclk() and calc_fclk_five_taps(). This function returns the correct pixel clock for LCD and LCD2 managers, but not for TV manager. Extend this function so that it gets the correct pixel clock for TV manager. This also prevents the crash we get when we try to scale overlays connected to TV manager. The current code leads to a BUG() being executed if we call dispc_mgr_pclk_rate() for the TV manager. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Create helper function dispc_mgr_is_lcd()Archit Taneja2011-09-301-9/+13
| | | | | | | | Create a helper function called dispc_mgr_is_lcd() which returns true if the manager is LCD or LCD2. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Pass overlay params as arguments to dispc_ovl_setup()Archit Taneja2011-09-301-7/+13
| | | | | | | | | | | | | dispc_ovl_enable_replication() and dispc_ovl_set_fifo_threshold() are currently called in configure_overlay(). These are the only functions which cause DISPC register writes of overlay parameters outside of dispc_ovl_setup(). Move these to dispc_ovl_setup() and pass replication, fifo_low and fifo_high thresholds as arguments to dispc_ovl_setup() in order to be aligned with other overlay parameters. No functional changes are made. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAPDSS: DISPC: Reduce the number of arguments in dispc_ovl_setup()Archit Taneja2011-09-301-67/+58
| | | | | | | | | | | | | | dispc_ovl_setup() currently takes a large number of overlay arguments, most of these are members of the overlay_info struct. Replace these arguments by passing a overlay_info pointer instead. In configure_overlay(), we create an overlay_info struct called new_oi, this is a copy of the overlay cache's overlay_info member. Update the new_oi parameters which could have been possibly changed in configure_overlay(). Pass its pointer pointer to dispc_ovl_setup(). Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: improve dispc_mgr_enable_digit_out()Tomi Valkeinen2011-09-301-20/+29
| | | | | | | | | | dispc_mgr_enable_digit_out() didn't handle HDMI case very well. Improve the function to use FRAMEDONETV interrupt to see when HDMI has been disabled. Cc: Mythri P K <mythripk@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: Fix minimum PCD valueTomi Valkeinen2011-09-301-4/+10
| | | | | | | | | | | | | | | | | | | | | | The current driver had a hardcoded minimum value of 2 for pixel clock divisor (PCD). This doesn't seem to be right. OMAP4 TRM says that PCD can be 1 when not downscaling, and inverted pixel clock (IPC) is off. OMAP3 TRM says the same, but also in the register descriptions that PCD value 1 is invalid. OMAP2 TRM says PCD 2 is the minimum. OMAP2 is still untested, but for both OMAP3 and OMAP4 PCD of 1 seems to work fine. This patch adds a new DSS feature, FEAT_PARAM_DSS_PCD, which is used to find the minimum and maximum PCD. The minimum is set to 2 for OMAP2, and 1 for OMAP3/4. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Clean up stallmode and io pad mode selectionArchit Taneja2011-09-301-26/+21
| | | | | | | | | | | | | | | | | | Split the function dispc_set_parallel_interface_mode() into 2 separate functions called dispc_mgr_set_io_pad_mode() and dispc_mgr_enable_stallmode(). The current function tries to set 2 different modes(io pad mode and stall mode) based on a parameter omap_parallel_interface_mode which loosely corresponds to the panel interface type. This isn't correct because a) these 2 modes are independent to some extent, b) we are currently configuring gpout0/gpout1 for DSI panels which is unnecessary, c) a DSI Video mode panel won't get configured correctly. Splitting the functions allows the interface driver to set these modes independently and hence allow more flexibility. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: rename manager related funcsTomi Valkeinen2011-09-301-49/+50
| | | | | | | | | | | | | | | | | Rename dispc's manager related functions as follows: - Remove prepending underscores, which were originally used to inform that the clocks needs to be enabled. This meaning is no longer valid. - Prepend the functions with dispc_mgr_* - Remove "channel" from the name, e.g. dispc_enable_channel -> dispc_mgr_enable The idea is to group manager related functions so that it can be deduced from the function name that it writes to manager spesific registers. All dispc_mgr_* functions have enum omap_channel as the first parameter. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: rename overlay related funcsTomi Valkeinen2011-09-301-74/+78
| | | | | | | | | | | | | | | | | Rename dispc's overlay related functions as follows: - Remove prepending underscores, which were originally used to inform that the clocks needs to be enabled. This meaning is no longer valid. - Prepend the functions with dispc_ovl_* - Remove "plane" from the name, e.g. dispc_set_plane_ba0 -> dispc_ovl_set_ba0 The idea is to group overlay related functions so that it can be deduced from the function name that it writes to overlay spesific registers. All dispc_ovl_* functions have enum omap_plane as the first parameter. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Add GLOBAL_ALPHA & PRE_MULT_ALPHA to ovl capsTomi Valkeinen2011-09-301-9/+4
| | | | | | | | | | | | | Add OMAP_DSS_OVL_CAP_GLOBAL_ALPHA and OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA to overlay capabilities. Use these instead of FEAT_GLOBAL_ALPHA, FEAT_GLOBAL_ALPHA_VID1 and FEAT_PRE_MULT_ALPHA in code. Remove FEAT_GLOBAL_ALPHA_VID1 and FEAT_PRE_MULT_ALPHA which are no longer used. FEAT_GLOBAL_ALPHA is still used to decide if the HW has global alpha register. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Archit Taneja <archit@ti.com>
* OMAP: DSS2: DISPC: use lookup tables for bit shiftsTomi Valkeinen2011-09-301-154/+50
| | | | | | | | Use lookup tables instead of switch/if in some DISPC functions to make the code cleaner. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Archit Taneja <archit@ti.com>
* OMAP: DSS2: Remove support for non-DISPC overlaysTomi Valkeinen2011-09-301-21/+1
| | | | | | | | | | | | | | | | | | Remove support for non-DISPC overlays and overlay managers. The support to possibly have non-DISPC overlays and managers was made to make it possible to use CPU and/or sDMA to update RFBI or DSI command mode displays. It is ok to remove the support, because: - No one has used the feature. - Display update without DISPC is very slow, so it is debatable if the update would even be usable. - Removal cleans up code. - If such a feature is needed later, it is better implemented outside omapdss driver. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Archit Taneja <archit@ti.com>
* OMAP: DSS2: Handle manager change in applyTomi Valkeinen2011-09-301-1/+3
| | | | | | | | | | | | | | | | Currently when changing the manager of an overlay, set_manager() directly calls dispc to set the overlay's destination. Change this to be more in line with other overlay configurations, and this will also remove the need to have dispc clocks enabled when calling set_manager(). A new field is added to overlay struct, "manager_changed". This is similar to "display_changed" field in manager struct, and is used to inform apply that the manager has changed and thus write to the registers is needed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: remove unneeded fck enable/disablesTomi Valkeinen2011-09-201-2/+0
| | | | | | | | | | | | | | Now that the HWMOD fmwk handles the fcks of DSS modules properly, the DSS driver no longer needs to explicitely enable/disable the fck. This patch removes the enables/disables of fck from dispc, dsi and dss. The clk_get(fck) is still needed there, as the modules need to know the frequency of the clock. For hdmi and venc this patch also removes the clk_get(fck), as they don't need the clock at all. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Use a macro to declare size of the fifo_size array in dispc.cArchit Taneja2011-09-141-2/+2
| | | | | | | | | | The array size of fifo_size array in the global dispc struct is currently hardcoded to 3. Replace this with the MAX_DSS_OVERLAYS macro in dss_features.h, use dss_features function to get the number of overlays instead of the ARRAY_SIZE macro in dispc_read_plane_fifo_sizes(). Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: Shorten _dispc_set_color_conv_coef()Archit Taneja2011-09-141-26/+16
| | | | | | | Iterate over overlay id's to shorten _dispc_set_color_conv_coef() Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: dispc_save_context() and dispc_restore_context() cleanupArchit Taneja2011-09-141-277/+125
| | | | | | | | Iterate over manager and overlay id's to shorten dispc_save_context() and dispc_restore_context(). Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: Shorten dispc_dump_regs()Archit Taneja2011-09-141-229/+99
| | | | | | | Iterate over manager and overlay id's to shorten dispc_dump_regs(). Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: Prepare dispc_dump_regs() for shorteningArchit Taneja2011-09-141-205/+239
| | | | | | | | | | | | | | | | Prepare dispc_dump_regs() to iterate over manager and overlay id's. Doing this requires modifications of the macro "DUMPREG" which currently needs us to specify the manager/overlay name to get the correct result. For example, in order to print the register DISPC_TIMING_H(OMAP_DSS_CHANNEL_LCD), we can't iterate over a varaible i and get the desired result through DUMPREG(DISPC_TIMING_H(i)). Split the registers into 3 sections, the first with no arguments(common registers), the second with one argument(manager/overlay id), and the third with two arguments(overlay id and coefficient index), redefine DUMPREG macros for each of these. Signed-off-by: Archit Taneja <archit@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS: dispc: enable/disable clocks in error handlerDima Zavin2011-09-141-0/+4
| | | | | | | | | There's no guarantee that the error handler worker thread will run while the dispc clocks are on. Explicitly enable/disable them. Signed-off-by: Dima Zavin <dima@android.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: Fix context save/restoreTomi Valkeinen2011-07-251-59/+38
| | | | | | | | | | | | | | The current method of saving and restoring the context could cause a restore before saving, effectively "restoring" zero values to registers. Add ctx_valid field to indicate if the saved context is valid and can be restored. Also restructure the code to save the ctx_loss_count in save_context(), which makes more sense than the previous method of storing new ctx_loss_count in dispc_need_ctx_restore. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: DISPC: remove finegrained clk enables/disablesTomi Valkeinen2011-07-251-146/+19
| | | | | | | | | | | | dispc.c enables and disables clocks in almost every function to make sure the clocks are enabled when the function is called. This is rather unoptimal way to handle the problem. With pm_runtime other components have to call dispc_runtime_get() to enable dispc clocks before calling any other dispc functions. Thus the finegrained clk enables/disables can be removed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Use PM runtime & HWMOD supportTomi Valkeinen2011-07-251-101/+225
| | | | | | | | | | | | Use PM runtime and HWMOD support to handle enabling and disabling of DSS modules. Each DSS module will have get and put functions which can be used to enable and disable that module. The functions use pm_runtime and hwmod opt-clocks to enable the hardware. Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Fix FIFO threshold and burst size for OMAP4Tomi Valkeinen2011-07-011-8/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA FIFO threshold registers and burst size registers have changed for OMAP4. The current code only handles OMAP2/3 case, and so the values are a bit off for OMAP4. A summary of the differences between OMAP2/3 and OMAP4: Burst size: OMAP2/3: 4 x 32 bits / 8 x 32 bits / 16 x 32 bits OMAP4: 2 x 128 bits / 4 x 128 bits / 8 x 128 bits Threshold size: OMAP2/3: in bytes (8 bit units) OMAP4: in 128bit units This patch fixes the issue by creating two new helper functions in dss_features: dss_feat_get_buffer_size_unit() and dss_feat_get_burst_size_unit(). These return (in bytes) the unit size for threshold registers and unit size for burst size register, respectively, and are used to calculate correct values. For the threshold size the usage is straightforward. However, the burst size register has different multipliers for OMAP2/3 and OMAP4. This patch solves the problem by defining the multipliers for the burst size as 2x, 4x and 8x, which fit fine for the OMAP4 burst size definition (i.e. burst size unit for OMAP4 is 128bits), but requires a slight twist on OMAP2/3 by defining the burst size unit as 64bit. As the driver in practice always uses the maximum burst size, and no use case currently exists where we would want to use a smaller burst size, this patch changes the driver to hardcode the burst size when initializing DISPC. This makes the threshold configuration code somewhat simpler. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Add Color Phase Rotation supportTomi Valkeinen2011-07-011-0/+34
| | | | | | | | | | | | | Add Color Phase Rotation (CPR) support and sysfs files to enable CPR and to set the CPR coefficient matrix. CPR is enabled via manager?/cpr_enable file, and the coefficient matrix is set via manager?/cpr_coef file. The values in cpr_coef are in the following order: RR RG RB GR GG GB BR BG BB Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Add new FEAT definitions for features missing from OMAP2Tomi Valkeinen2011-07-011-54/+91
| | | | | | | | OMAP2 doesn't have CPR, PRELOAD nor FIR_COEF_V registers. Add new feature definitions for those, and check the feature before accessing those registers. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: remove extra includes from include/video/omapdss.hTomi Valkeinen2011-07-011-0/+1
| | | | | | | | | omapdss.h included platform_device.h and atomic.h, neither of which is needed by omapdss.h. Remove those includes from omapdss.h, and fix the affected .c files which did not include platform_device.h even though they should. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* OMAP: DSS2: Add support for NV12 formatAmber Jain2011-05-231-32/+169
| | | | | | | | | | | | | | | | | | | | Add the support for NV12 color format. Configure base address for UV component of NV12 color format. Change the way chroma scaling is handled for YUV formats on OMAP4 by enabling chroma-resampling for video pipeline and hence using FIR2 register set for scaling UV. Changes to _dispc_set_scaling(), because of the reason above, are: - call _dispc_set_scaling_common() to handle scaling for all color formats except for OMAP4 where it only handles scaling for RGB or Y-component - call _dispc_set_scaling_uv() for special handling required for UV component on OMAP4. - dispc_set_scaling_uv() also resets chroma-resampling bit for RGB color modes. Contains chroma scaling (_dispc_set_scaling_uv) design and implemented by Lajos Molnar <molnar@ti.com> Signed-off-by: Amber Jain <amber@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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