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path: root/drivers/video/exynos/exynos_dp_core.h
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* video: exynos_dp: remove redundant parametersAjay Kumar2012-11-291-7/+2
| | | | | | | | | This patch cleans up few redundant parameters keeping the same functionality intact. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
* video: exynos_dp: Enable hotplug interruptsSean Paul2012-11-291-0/+9
| | | | | | | | | | | Enable hotplug interrupts and move the hotplug scheduling into the interrupt handler. This allows us to introduce a screen at any time while we're running. [jg1.han@samsung.com: moved the bit masking of hotplug interrupts] Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
* video: exynos_dp: Move hotplug into a workqueueSean Paul2012-11-291-0/+1
| | | | | | | | | | Move the hotplug related code from probe and resume into a workqueue. This allows us to initialize the DP driver (and resume it) when there is no monitor connected. Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
* video: exynos_dp: Add device tree support to DP driverAjay Kumar2012-11-291-0/+2
| | | | | | | | | This patch enables device tree based discovery support for DP driver. The driver is modified to handle platform data in both the cases: with DT and non-DT. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com>
* video: exynos_dp: change return type of exynos_dp_init_video to voidJingoo Han2012-08-231-1/+1
| | | | | | | | This patch changes return type of exynos_dp_init_video to void, because the return value is unnecessary. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: exynos_dp: Fix get_pll_lock_status return valueSean Paul2012-08-231-1/+1
| | | | | | | | | | Fix the return value of exynos_dp_get_pll_lock_status to reflect what it actually returns. Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Olof Johansson <olofj@chromium.org> Acked-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: exynos_dp: adjust voltage swing and pre-emphasis during Link TrainingJingoo Han2012-08-231-1/+1
| | | | | | | | | | | | | | This patch adds adjustement for voltage swing and pre-emphasis during Link Training procedure. According to the DP specification, unless all the LANEx_CR_DONE bits are set, the transmitter must read the ADJUST_REQUEST_LANEx_x, increase the voltage swing according to the request, and update the TRAINING_LANEx_SET bytes to match the new voltage swing setting. Refer to the DP specification v1.1a, Section 3.5.1.3 Link Training. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: exynos_dp: remove duplicated declarations from header fileJingoo Han2012-06-241-4/+0
| | | | | | | | Some functions are declared twice in header file; thus, these declarations are unnecessary. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: exynos_dp: move sw reset prioir to enabling sw defined functionJingoo Han2012-05-291-0/+1
| | | | | | | | The sw reset should be called prioir to enabling sw defined function, according to datasheet. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: exynos_dp: use devm_ functionsJingoo Han2012-05-291-1/+0
| | | | | | | | The devm_ functions allocate memory that is released when a driver detaches. This makes the code smaller and a bit simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: exynos_dp: add analog and pll control settingJingoo Han2012-04-161-0/+1
| | | | | | | | | | | | | | | | | | This patch adds analog and pll control setting. This control setting is used for DP TX PHY block to set the values as below. It is beneficial to improve analog characteristics. - TX terminal registor is 50 Ohm. - Reference clock of PHY is 24 MHz. - Power source for TX digital logic is 1.0625 V. - Power source for internal clock driver is 1.0625 V. - PLL VCO range setting is 600 uA. - Power down ring osc is turned off. - AUX terminal resistor is 50 Ohm. - AUX channel current is 8 mA and multiplied by 2. - TX channel output amplitude is 400 mV. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
* video: support DP controller driverJingoo Han2012-02-131-0/+206
Samsung EXYNOS SoC such Exynos5 has DP controller and embedded DP panel can be used. This patch supports DP driver based on Samsung EXYNOS SoC chip. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
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